git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4086 35acf78f-673a-0410-8e92-d51de3d6d3f4
gdisirio
parent
27b44b5bec
commit
e64da09625
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@ -100,7 +100,7 @@
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#define GPIOC_LCD_MOSI 3
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#define GPIOC_ETH_RMII_RXD0 4
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#define GPIOC_ETH_RMII_RXD1 5
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#define GPIOC_DCMI_D0 6
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#define GPIOC_DCMI_D0_US6_TX 6
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#define GPIOC_I2S3_MCK 7
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#define GPIOC_DCMI_D2 8
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#define GPIOC_DCMI_D3 9
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@ -119,11 +119,11 @@
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#define GPIOD_USELESS5 5
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#define GPIOD_LCD_CS 6
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#define GPIOD_USELESS7 7
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#define GPIOD_USELESS8 8
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#define GPIOD_USELESS9 9
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#define GPIOD_USART3_TX 8
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#define GPIOD_USART3_RX 9
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#define GPIOD_USELESS10 10
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#define GPIOD_USELESS11 11
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#define GPIOD_USELESS12 12
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#define GPIOD_USART3_CTS 11
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#define GPIOD_USART3_RTS 12
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#define GPIOD_USB_HS_FAULT 13
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#define GPIOD_USELESS14 14
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#define GPIOD_USELESS15 15
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@ -316,7 +316,7 @@
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* PC3 - GPIOC_LCD_MOSI (output push-pull).
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* PC4 - GPIOC_ETH_RMII_RXD0 (alternate 11).
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* PC5 - GPIOC_ETH_RMII_RXD1 (alternate 11).
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* PC6 - GPIOC_DCMI_D0 (input pull-up).
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* PC6 - GPIOC_DCMI_D0_US6_TX (alternate 8).
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* PC7 - GPIOC_I2S3_MCK (alternate 6).
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* PC8 - GPIOC_DCMI_D2 (input pull-up).
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* PC9 - GPIOC_DCMI_D3 (input pull-up).
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@ -333,7 +333,7 @@
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PIN_MODE_OUTPUT(GPIOC_LCD_MOSI) | \
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PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD0) | \
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PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD1) | \
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PIN_MODE_INPUT(GPIOC_DCMI_D0) | \
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PIN_MODE_ALTERNATE(GPIOC_DCMI_D0_US6_TX) | \
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PIN_MODE_ALTERNATE(GPIOC_I2S3_MCK) | \
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PIN_MODE_INPUT(GPIOC_DCMI_D2) | \
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PIN_MODE_INPUT(GPIOC_DCMI_D3) | \
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@ -345,14 +345,14 @@
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PIN_MODE_INPUT(GPIOC_OSC32_OUT))
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#define VAL_GPIOC_OTYPER 0x00000000
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#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOC_PUPDR (PIN_PUDR_PULLUP(GPIOC_DCMI_D0) | \
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PIN_PUDR_PULLUP(GPIOC_DCMI_D2) | \
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#define VAL_GPIOC_PUPDR (PIN_PUDR_PULLUP(GPIOC_DCMI_D2) | \
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PIN_PUDR_PULLUP(GPIOC_DCMI_D3))
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#define VAL_GPIOC_ODR 0xFFFFFFF3
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#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ETH_RMII_MDC, 11) | \
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PIN_AFIO_AF(GPIOC_ETH_RMII_RXD0, 11) | \
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PIN_AFIO_AF(GPIOC_ETH_RMII_RXD1, 11) | \
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PIN_AFIO_AF(GPIOC_ETH_RMII_MDC, 6))
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PIN_AFIO_AF(GPIOC_DCMI_D0_US6_TX, 8) | \
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PIN_AFIO_AF(GPIOC_I2S3_MCK, 6))
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SPI3_SCK, 6) | \
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PIN_AFIO_AF(GPIOC_SPI3_MISO, 6) | \
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PIN_AFIO_AF(GPIOC_SPI3_MOSI, 6))
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@ -368,11 +368,11 @@
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* PD5 - GPIOD_USELESS5 (input pull-up).
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* PD6 - GPIOD_LCD_CS (output push-pull).
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* PD7 - GPIOD_USELESS7 (input pull-up).
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* PD8 - GPIOD_USELESS8 (input pull-up).
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* PD9 - GPIOD_USELESS9 (input pull-up).
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* PD8 - GPIOD_USART3_TX (alternate 8).
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* PD9 - GPIOD_USART3_RX (alternate 8).
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* PD10 - GPIOD_USELESS10 (input pull-up).
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* PD11 - GPIOD_USELESS11 (input pull-up).
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* PD12 - GPIOD_USELESS12 (input pull-up).
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* PD11 - GPIOD_USART3_CTS (alternate 8).
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* PD12 - GPIOD_USART3_RTS (alternate 8).
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* PD13 - GPIOD_USB_HS_FAULT (input floating).
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* PD14 - GPIOD_USELESS14 (input pull-up).
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* PD15 - GPIOD_USELESS15 (input pull-up).
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@ -385,11 +385,11 @@
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PIN_MODE_INPUT(GPIOD_USELESS5) | \
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PIN_MODE_OUTPUT(GPIOD_LCD_CS) | \
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PIN_MODE_INPUT(GPIOD_USELESS7) | \
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PIN_MODE_INPUT(GPIOD_USELESS8) | \
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PIN_MODE_INPUT(GPIOD_USELESS9) | \
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PIN_MODE_ALTERNATE(GPIOD_USART3_TX) | \
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PIN_MODE_ALTERNATE(GPIOD_USART3_RX) | \
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PIN_MODE_INPUT(GPIOD_USELESS10) | \
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PIN_MODE_INPUT(GPIOD_USELESS11) | \
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PIN_MODE_INPUT(GPIOD_USELESS12) | \
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PIN_MODE_ALTERNATE(GPIOD_USART3_CTS) | \
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PIN_MODE_ALTERNATE(GPIOD_USART3_RTS) | \
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PIN_MODE_INPUT(GPIOD_USB_HS_FAULT) | \
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PIN_MODE_INPUT(GPIOD_USELESS14) | \
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PIN_MODE_INPUT(GPIOD_USELESS15))
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@ -400,16 +400,15 @@
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PIN_PUDR_PULLUP(GPIOD_USELESS4) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS5) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS7) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS8) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS9) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS10) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS11) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS12) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS14) | \
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PIN_PUDR_PULLUP(GPIOD_USELESS15))
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#define VAL_GPIOD_ODR 0xFFFFFFFF
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#define VAL_GPIOD_AFRL 0x00000000
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#define VAL_GPIOD_AFRH 0x00000000
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#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_USART3_TX, 8) | \
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PIN_AFIO_AF(GPIOD_USART3_RX, 8) | \
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PIN_AFIO_AF(GPIOD_USART3_CTS, 8) | \
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PIN_AFIO_AF(GPIOD_USART3_RTS, 8))
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/*
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* Port E setup.
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@ -532,7 +531,7 @@
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* PG6 - GPIOG_RIGHT (input floating).
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* PG7 - GPIOG_UP (input floating).
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* PG8 - GPIOG_DOWN (input floating).
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* PG9 - GPIOG_USART6_RX (input floating).
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* PG9 - GPIOG_USART6_RX (alternate 8).
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* PG10 - GPIOG_10 (input pull-up).
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* PG11 - GPIOG_LEFT (input floating).
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* PG12 - GPIOG_12 (input pull-up).
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@ -549,7 +548,7 @@
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PIN_MODE_INPUT(GPIOG_RIGHT) | \
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PIN_MODE_INPUT(GPIOG_UP) | \
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PIN_MODE_INPUT(GPIOG_DOWN) | \
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PIN_MODE_INPUT(GPIOG_USART6_RX) | \
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PIN_MODE_ALTERNATE(GPIOG_USART6_RX) | \
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PIN_MODE_INPUT(GPIOG_10) | \
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PIN_MODE_INPUT(GPIOG_LEFT) | \
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PIN_MODE_INPUT(GPIOG_12) | \
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@ -568,7 +567,8 @@
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PIN_PUDR_PULLUP(GPIOG_12))
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#define VAL_GPIOG_ODR 0xFFFFFFFF
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#define VAL_GPIOG_AFRL 0x00000000
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#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_ETH_RMII_TXD0, 11) | \
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#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_USART6_RX, 8) | \
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PIN_AFIO_AF(GPIOG_ETH_RMII_TXD0, 11) | \
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PIN_AFIO_AF(GPIOG_ETH_RMII_TXD1, 11))
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/*
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