Cortex-M4 officially supported.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3491 35acf78f-673a-0410-8e92-d51de3d6d3f4

docs/reports/STM32F407-168-GCC.txt

@@ -6,10 +6,10 @@ Settings: SYSCLK=168, ACR=0x705 (5 wait states)
 *** ChibiOS/RT test suite
 ***
 *** Kernel:       2.3.4unstable
-*** Compiled:     Nov  6 2011 - 12:43:29
+*** Compiled:     Nov 13 2011 - 12:07:02
 *** Compiler:     GCC 4.6.0
-*** Architecture: ARMv7-M
-*** Core Variant: Cortex-M3
+*** Architecture: ARMv7-ME
+*** Core Variant: Cortex-M4
 *** Port Info:    Advanced kernel mode
 *** Platform:     STM32F4 High Performance & DSP
 *** Test Board:   ST STM32F4-Discovery

os/ports/GCC/ARMCMx/LPC11xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/GCC/ARMCMx/LPC13xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h

@@ -35,7 +35,7 @@
 /**
  * @brief   Cortex core model.
  */
-#define CORTEX_MODEL            CORTEX_M3
+#define CORTEX_MODEL            CORTEX_M4
 
 /**
  * @brief   Systick unit presence.
@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          TRUE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          TRUE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          TRUE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/GCC/ARMCMx/chcore.h

@@ -50,8 +50,9 @@
 #include "cmparams.h"
 
 /* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) ||           \
+    (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
 #warning "untested Cortex-M model"
 #else
 #error "unknown or unsupported Cortex-M model"

os/ports/IAR/ARMCMx/LPC11xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/IAR/ARMCMx/LPC13xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          TRUE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          TRUE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          TRUE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/IAR/ARMCMx/chcore.h

@@ -50,9 +50,10 @@
 #include "cmparams.h"
 
 /* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
-#error "untested Cortex-M model, manually remove this check in chcore.h"
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) ||           \
+    (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
+#error "untested Cortex-M model"
 #else
 #error "unknown or unsupported Cortex-M model"
 #endif

os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          FALSE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h

@@ -47,6 +47,11 @@
  */
 #define CORTEX_HAS_MPU          TRUE
 
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          FALSE
+
 /**
  * @brief   Number of bits in priority masks.
  */

os/ports/RVCT/ARMCMx/chcore.h

@@ -50,8 +50,9 @@
 #include "cmparams.h"
 
 /* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) ||           \
+    (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
 #warning "untested Cortex-M model"
 #else
 #error "unknown or unsupported Cortex-M model"

readme.txt

@@ -84,6 +84,8 @@
   (backported to 2.2.8).
 - FIX: Fixed broken TIM8 support in STM32 PWM driver (bug 3418620).
 - FIX: Fixed halconf.h file corrupted in some STM32 demos (bug 3418626).
+- NEW: Removed the warning about the "untested M4 platform", now it is
+  tested and officially supported.
 - NEW: Reorganized the STM32F1xx hal_lld_xxx.h files in order to distribute
   the capability macros into the appropriate file (previously those were all
   in the common hal_lld.h).