I2C. Added startup functions for I2C1 and I2C3 interfaces.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3554 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
59014aa2be
commit
e05d85d2bd
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@ -126,9 +126,11 @@ static uint32_t i2c_get_event(I2CDriver *i2cp){
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}
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}
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/**
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* @brief I2C interrupts handler.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*/
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static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
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static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
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I2C_TypeDef *dp = i2cp->id_i2c;
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I2C_TypeDef *dp = i2cp->id_i2c;
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@ -160,8 +162,11 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
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}
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}
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/**
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* @brief DMA rx end IRQ handler.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*/
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static void i2c_lld_serve_rx_end_irq(I2CDriver *i2cp){
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static void i2c_lld_serve_rx_end_irq(I2CDriver *i2cp){
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dmaStreamDisable(i2cp->dmarx);
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dmaStreamDisable(i2cp->dmarx);
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@ -173,16 +178,21 @@ static void i2c_lld_serve_rx_end_irq(I2CDriver *i2cp){
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}
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}
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/**
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* @brief DMA tx enr IRQ handler.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*/
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static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp){
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static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp){
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dmaStreamDisable(i2cp->dmatx);
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dmaStreamDisable(i2cp->dmatx);
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}
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}
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/**
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* @brief I2C error handler.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*/
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static void i2c_serve_error_interrupt(I2CDriver *i2cp) {
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static void i2c_serve_error_interrupt(I2CDriver *i2cp) {
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i2cflags_t flags;
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i2cflags_t flags;
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I2C_TypeDef *reg;
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I2C_TypeDef *reg;
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@ -231,10 +241,23 @@ static void i2c_serve_error_interrupt(I2CDriver *i2cp) {
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}
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}
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#if STM32_I2C_USE_I2C1 || defined(__DOXYGEN__)
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#if STM32_I2C_USE_I2C1 || defined(__DOXYGEN__)
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#error "Unrealized yet"
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/**
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* @brief I2C1 event interrupt handler.
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*/
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CH_IRQ_HANDLER(I2C1_EV_IRQHandler) {
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CH_IRQ_PROLOGUE();
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i2c_serve_event_interrupt(&I2CD1);
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CH_IRQ_EPILOGUE();
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}
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/**
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* @brief I2C1 error interrupt handler.
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*/
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CH_IRQ_HANDLER(I2C1_ER_IRQHandler) {
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CH_IRQ_PROLOGUE();
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i2c_serve_error_interrupt(&I2CD1);
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_I2C_USE_I2C1 */
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#endif /* STM32_I2C_USE_I2C1 */
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#if STM32_I2C_USE_I2C2 || defined(__DOXYGEN__)
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#if STM32_I2C_USE_I2C2 || defined(__DOXYGEN__)
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@ -257,19 +280,36 @@ CH_IRQ_HANDLER(I2C2_ER_IRQHandler) {
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#endif /* STM32_I2C_USE_I2C2 */
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#endif /* STM32_I2C_USE_I2C2 */
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#if STM32_I2C_USE_I2C3 || defined(__DOXYGEN__)
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#if STM32_I2C_USE_I2C3 || defined(__DOXYGEN__)
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#error "Unrealized yet"
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/**
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* @brief I2C3 event interrupt handler.
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*/
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CH_IRQ_HANDLER(I2C3_EV_IRQHandler) {
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CH_IRQ_PROLOGUE();
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i2c_serve_event_interrupt(&I2CD3);
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CH_IRQ_EPILOGUE();
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}
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/**
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* @brief I2C3 error interrupt handler.
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*/
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CH_IRQ_HANDLER(I2C3_ER_IRQHandler) {
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CH_IRQ_PROLOGUE();
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i2c_serve_error_interrupt(&I2CD3);
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_I2C_USE_I2C3 */
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#endif /* STM32_I2C_USE_I2C3 */
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/**
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/**
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* @brief Low level I2C driver initialization.
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* @brief Low level I2C driver initialization.
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*/
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*/
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void i2c_lld_init(void) {
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void i2c_lld_init(void) {
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#if STM32_I2C_USE_I2C1
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#if STM32_I2C_USE_I2C1
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#error "Unrealized yet"
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i2cObjectInit(&I2CD1);
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#endif /* STM32_I2C_USE_I2C */
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I2CD1.id_i2c = I2C1;
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I2CD1.dmarx = STM32_DMA_STREAM(STM32_I2C_I2C1_RX_DMA_STREAM);
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I2CD1.dmatx = STM32_DMA_STREAM(STM32_I2C_I2C1_TX_DMA_STREAM);
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#endif /* STM32_I2C_USE_I2C1 */
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#if STM32_I2C_USE_I2C2
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#if STM32_I2C_USE_I2C2
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i2cObjectInit(&I2CD2);
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i2cObjectInit(&I2CD2);
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@ -277,13 +317,14 @@ void i2c_lld_init(void) {
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I2CD2.dmarx = STM32_DMA_STREAM(STM32_I2C_I2C2_RX_DMA_STREAM);
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I2CD2.dmarx = STM32_DMA_STREAM(STM32_I2C_I2C2_RX_DMA_STREAM);
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I2CD2.dmatx = STM32_DMA_STREAM(STM32_I2C_I2C2_TX_DMA_STREAM);
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I2CD2.dmatx = STM32_DMA_STREAM(STM32_I2C_I2C2_TX_DMA_STREAM);
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#endif /* STM32_I2C_USE_I2C2 */
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#endif /* STM32_I2C_USE_I2C2 */
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}
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#if STM32_I2C_USE_I2C3
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#if STM32_I2C_USE_I2C3
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#error "Unrealized yet"
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i2cObjectInit(&I2CD3);
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#endif /* STM32_I2C_USE_I2C */
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I2CD3.id_i2c = I2C3;
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I2CD3.dmarx = STM32_DMA_STREAM(STM32_I2C_I2C3_RX_DMA_STREAM);
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I2CD3.dmatx = STM32_DMA_STREAM(STM32_I2C_I2C3_TX_DMA_STREAM);
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#endif /* STM32_I2C_USE_I2C3 */
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}
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/**
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/**
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@ -296,15 +337,29 @@ void i2c_lld_start(I2CDriver *i2cp) {
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if (i2cp->id_state == I2C_STOP) { /* If in stopped state then enables the I2C clock.*/
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if (i2cp->id_state == I2C_STOP) { /* If in stopped state then enables the I2C clock.*/
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#if STM32_I2C_USE_I2C1
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#if STM32_I2C_USE_I2C1
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// if (&I2CD1 == i2cp) {
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if (&I2CD1 == i2cp) {
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// NVICEnableVector(I2C1_EV_IRQn,
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// CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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bool_t b;
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// NVICEnableVector(I2C1_ER_IRQn,
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b = dmaStreamAllocate(i2cp->dmarx,
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// CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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STM32_I2C_I2C1_IRQ_PRIORITY,
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// rccEnableI2C1(FALSE);
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(stm32_dmaisr_t)i2c_lld_serve_rx_end_irq,
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// }
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(void *)i2cp);
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#error "Unrealized yet"
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chDbgAssert(!b, "uart_lld_start(), #3", "stream already allocated");
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#endif
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b = dmaStreamAllocate(i2cp->dmatx,
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STM32_I2C_I2C1_IRQ_PRIORITY,
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(stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
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(void *)i2cp);
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chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
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rccEnableI2C1(FALSE);
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NVICEnableVector(I2C1_EV_IRQn,
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CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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NVICEnableVector(I2C1_ER_IRQn,
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CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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i2cp->dmamode |= STM32_DMA_CR_CHSEL(I2C1_RX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2C_I2C1_DMA_PRIORITY);
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}
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#endif /* STM32_I2C_USE_I2C1 */
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#if STM32_I2C_USE_I2C2
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#if STM32_I2C_USE_I2C2
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if (&I2CD2 == i2cp) {
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if (&I2CD2 == i2cp) {
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@ -330,6 +385,32 @@ void i2c_lld_start(I2CDriver *i2cp) {
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STM32_DMA_CR_PL(STM32_I2C_I2C2_DMA_PRIORITY);
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STM32_DMA_CR_PL(STM32_I2C_I2C2_DMA_PRIORITY);
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}
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}
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#endif /* STM32_I2C_USE_I2C2 */
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#endif /* STM32_I2C_USE_I2C2 */
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#if STM32_I2C_USE_I2C3
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if (&I2CD3 == i2cp) {
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bool_t b;
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b = dmaStreamAllocate(i2cp->dmarx,
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STM32_I2C_I2C3_IRQ_PRIORITY,
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(stm32_dmaisr_t)i2c_lld_serve_rx_end_irq,
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(void *)i2cp);
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chDbgAssert(!b, "uart_lld_start(), #3", "stream already allocated");
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b = dmaStreamAllocate(i2cp->dmatx,
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STM32_I2C_I2C3_IRQ_PRIORITY,
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(stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
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(void *)i2cp);
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chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
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rccEnableI2C3(FALSE);
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NVICEnableVector(I2C3_EV_IRQn,
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CORTEX_PRIORITY_MASK(STM32_I2C_I2C3_IRQ_PRIORITY));
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NVICEnableVector(I2C3_ER_IRQn,
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CORTEX_PRIORITY_MASK(STM32_I2C_I2C3_IRQ_PRIORITY));
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i2cp->dmamode |= STM32_DMA_CR_CHSEL(I2C3_RX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2C_I2C3_DMA_PRIORITY);
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}
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#endif /* STM32_I2C_USE_I2C2 */
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}
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}
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i2cp->dmamode |= STM32_DMA_CR_PSIZE_BYTE |
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i2cp->dmamode |= STM32_DMA_CR_PSIZE_BYTE |
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STM32_DMA_CR_MSIZE_BYTE |
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STM32_DMA_CR_MSIZE_BYTE |
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@ -346,20 +427,10 @@ void i2c_lld_start(I2CDriver *i2cp) {
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i2cp->id_i2c->CR1 |= 1; /* enable interface */
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i2cp->id_i2c->CR1 |= 1; /* enable interface */
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}
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}
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#if STM32_I2C_USE_I2C3
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// if (&I2CD1 == i2cp) {
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// NVICEnableVector(I2C1_EV_IRQn,
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// CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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// NVICEnableVector(I2C1_ER_IRQn,
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// CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
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// rccEnableI2C1(FALSE);
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// }
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#error "Unrealized yet"
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#endif /* STM32_I2C_USE_I2C3 */
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/**
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* @brief Reset interface via RCC.
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*/
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void i2c_lld_reset(I2CDriver *i2cp){
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void i2c_lld_reset(I2CDriver *i2cp){
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chDbgCheck((i2cp->id_state == I2C_STOP)||(i2cp->id_state == I2C_READY),
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chDbgCheck((i2cp->id_state == I2C_STOP)||(i2cp->id_state == I2C_READY),
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"i2c_lld_reset: invalid state");
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"i2c_lld_reset: invalid state");
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}
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}
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/**
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* @brief Receive data via the I2C bus as master.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] slave_addr slave device address
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* @param[in] rxbuf pointer to the receive buffer
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* @param[in] rxbytes number of bytes to be received
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*/
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void i2c_lld_master_receive(I2CDriver *i2cp, uint8_t slave_addr,
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void i2c_lld_master_receive(I2CDriver *i2cp, uint8_t slave_addr,
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uint8_t *rxbuf, size_t rxbytes){
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uint8_t *rxbuf, size_t rxbytes){
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}
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}
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/**
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/**
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* @brief Transmits data via the I2C bus as master.
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* @brief Transmits data via the I2C bus as master.
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*
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*
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@ -458,8 +528,6 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint8_t slave_addr,
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}
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}
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/**
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/**
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* @brief Set clock speed.
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* @brief Set clock speed.
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*
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*
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