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Fixed bug 3536950. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4318 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2012-06-21 17:14:33 +00:00
parent 472033935b
commit dbe26c3e6e
2 changed files with 19 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
os/hal/platforms/STM32/icu_lld.c
View File

@ -133,7 +133,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@ -150,7 +150,7 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
CH_IRQ_PROLOGUE();
@ -169,7 +169,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM2_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
CH_IRQ_PROLOGUE();
@ -188,7 +188,7 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM3_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
CH_IRQ_PROLOGUE();
@ -207,7 +207,7 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM4_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
CH_IRQ_PROLOGUE();
@ -226,7 +226,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM5_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
CH_IRQ_PROLOGUE();
@ -245,7 +245,7 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@ -262,7 +262,7 @@ CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
*
* @isr
*/
CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
CH_IRQ_PROLOGUE();
@ -340,9 +340,9 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD1 == icup) {
rccEnableTIM1(FALSE);
rccResetTIM1();
nvicEnableVector(TIM1_CC_IRQn,
nvicEnableVector(STM32_TIM1_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
nvicEnableVector(TIM1_UP_IRQn,
nvicEnableVector(STM32_TIM1_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK2;
}
@ -351,7 +351,7 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD2 == icup) {
rccEnableTIM2(FALSE);
rccResetTIM2();
nvicEnableVector(TIM2_IRQn,
nvicEnableVector(STM32_TIM2_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM2_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@ -360,7 +360,7 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD3 == icup) {
rccEnableTIM3(FALSE);
rccResetTIM3();
nvicEnableVector(TIM3_IRQn,
nvicEnableVector(STM32_TIM3_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM3_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@ -369,7 +369,7 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD4 == icup) {
rccEnableTIM4(FALSE);
rccResetTIM4();
nvicEnableVector(TIM4_IRQn,
nvicEnableVector(STM32_TIM4_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM4_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@ -379,7 +379,7 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD5 == icup) {
rccEnableTIM5(FALSE);
rccResetTIM5();
nvicEnableVector(TIM5_IRQn,
nvicEnableVector(STM32_TIM5_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM5_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@ -388,10 +388,10 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD8 == icup) {
rccEnableTIM8(FALSE);
rccResetTIM8();
nvicEnableVector(TIM8_CC_IRQn,
nvicEnableVector(STM32_TIM8_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM8_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
nvicEnableVector(TIM8_UP_IRQn,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK2;
}
#endif

2
readme.txt
View File

@ -81,6 +81,8 @@
*****************************************************************************
*** 2.5.0 ***
- FIX: Fixed wrong priority assigned to TIM8 in STM32 ICU driver (bug 3536950)
(backported to 2.4.2).
- FIX: Fixed TIM8 not working in STM32 GPT driver (bug 3536523)(backported
to 2.4.2).
- FIX: Fixed timer overflow not working in STM32 ICU driver for TIM1/TIM8 (bug