RTC. STM32F4xx. Testhal application moved to OLIMEX_STM32_E407_REV_D board.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8092 35acf78f-673a-0410-8e92-d51de3d6d3f4master
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9c863974f8
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d9d6cffd9e
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@ -27,7 +27,7 @@
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<link>
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<name>board</name>
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<type>2</type>
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<locationURI>CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY</locationURI>
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<locationURI>CHIBIOS/os/hal/boards/OLIMEX_STM32_E407_REV_D</locationURI>
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</link>
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<link>
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<name>os</name>
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@ -92,7 +92,7 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk
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include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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@ -54,7 +54,7 @@ static THD_FUNCTION(blink_thd, arg){
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(void)arg;
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while (true) {
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chThdSleepMilliseconds(100);
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palTogglePad(GPIOB, GPIOB_LED_R);
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palTogglePad(GPIOC, GPIOC_LED);
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}
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}
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@ -64,7 +64,7 @@ static THD_FUNCTION(blink_thd, arg){
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static void anabiosis(void) {
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chSysLock();
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF);
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PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF);
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RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F |
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RTC_ISR_TSOVF | RTC_ISR_TSF);
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__WFI();
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@ -243,7 +243,7 @@ static const ShellCommand commands[] = {
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*
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*/
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static const ShellConfig shell_cfg1 = {
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(BaseSequentialStream *)&SD2,
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(BaseSequentialStream *)&SD6,
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commands
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};
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@ -276,7 +276,7 @@ int main(void){
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rtcSTM32SetPeriodicWakeup(&RTCD1, NULL);
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/* Shell initialization.*/
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sdStart(&SD2, &ser_cfg);
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sdStart(&SD6, &ser_cfg);
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shellInit();
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shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO);
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@ -31,8 +31,6 @@
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* 0...3 Lowest...Highest.
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*/
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#define STM32_USE_REVISION_A_FIX
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#define STM32F4xx_MCUCONF
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/*
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@ -46,7 +44,7 @@
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#define STM32_CLOCK48_REQUIRED TRUE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLM_VALUE 8
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#define STM32_PLLM_VALUE 12
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#define STM32_PLLN_VALUE 336
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#define STM32_PLLP_VALUE 2
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#define STM32_PLLQ_VALUE 7
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@ -235,11 +233,11 @@
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 FALSE
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#define STM32_SERIAL_USE_USART2 TRUE
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USE_USART3 FALSE
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#define STM32_SERIAL_USE_UART4 FALSE
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#define STM32_SERIAL_USE_UART5 FALSE
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#define STM32_SERIAL_USE_USART6 FALSE
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#define STM32_SERIAL_USE_USART6 TRUE
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART3_PRIORITY 12
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