Added advanced mode and BTRD handling to the STM32 PWM driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2011-04-01 13:06:44 +00:00
parent 875a7d8f41
commit d8420eb83a
18 changed files with 131 additions and 14 deletions

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@ -73,7 +73,10 @@ static PWMConfig pwmcfg = {
{PWM_OUTPUT_ACTIVE_HIGH, NULL} {PWM_OUTPUT_ACTIVE_HIGH, NULL}
}, },
/* HW dependent part.*/ /* HW dependent part.*/
0,
#if STM32_PWM_USE_ADVANCED
0 0
#endif
}; };
/* /*

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@ -90,6 +90,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 TRUE #define STM32_PWM_USE_TIM3 TRUE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -98,6 +98,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -394,7 +394,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
/* Output enables and polarities setup.*/ /* Output enables and polarities setup.*/
ccer = 0; ccer = 0;
switch (pwmp->config->channels[0].mode) { switch (pwmp->config->channels[0].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW: case PWM_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC1P; ccer |= TIM_CCER_CC1P;
case PWM_OUTPUT_ACTIVE_HIGH: case PWM_OUTPUT_ACTIVE_HIGH:
@ -402,7 +402,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
default: default:
; ;
} }
switch (pwmp->config->channels[1].mode) { switch (pwmp->config->channels[1].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW: case PWM_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC2P; ccer |= TIM_CCER_CC2P;
case PWM_OUTPUT_ACTIVE_HIGH: case PWM_OUTPUT_ACTIVE_HIGH:
@ -410,7 +410,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
default: default:
; ;
} }
switch (pwmp->config->channels[2].mode) { switch (pwmp->config->channels[2].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW: case PWM_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC3P; ccer |= TIM_CCER_CC3P;
case PWM_OUTPUT_ACTIVE_HIGH: case PWM_OUTPUT_ACTIVE_HIGH:
@ -418,7 +418,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
default: default:
; ;
} }
switch (pwmp->config->channels[3].mode) { switch (pwmp->config->channels[3].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW: case PWM_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC4P; ccer |= TIM_CCER_CC4P;
case PWM_OUTPUT_ACTIVE_HIGH: case PWM_OUTPUT_ACTIVE_HIGH:
@ -426,11 +426,44 @@ void pwm_lld_start(PWMDriver *pwmp) {
default: default:
; ;
} }
#if STM32_PWM_USE_ADVANCED
if (&PWMD1 == pwmp) {
switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC1NP;
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
ccer |= TIM_CCER_CC1NE;
default:
;
}
switch (pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC2NP;
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
ccer |= TIM_CCER_CC2NE;
default:
;
}
switch (pwmp->config->channels[2].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
ccer |= TIM_CCER_CC3NP;
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
ccer |= TIM_CCER_CC3NE;
default:
;
}
}
#endif /* STM32_PWM_USE_ADVANCED*/
pwmp->tim->CCER = ccer; pwmp->tim->CCER = ccer;
pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */ pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */
pwmp->tim->SR = 0; /* Clear pending IRQs. */ pwmp->tim->SR = 0; /* Clear pending IRQs. */
pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE; pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE;
#if STM32_PWM_USE_ADVANCED
pwmp->tim->BDTR = pwmp->config->bdtr | TIM_BDTR_MOE;
#else
pwmp->tim->BDTR = TIM_BDTR_MOE; pwmp->tim->BDTR = TIM_BDTR_MOE;
#endif
/* Timer configured and started.*/ /* Timer configured and started.*/
pwmp->tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN; pwmp->tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;
} }
@ -450,6 +483,7 @@ void pwm_lld_stop(PWMDriver *pwmp) {
pwmp->tim->CR1 = 0; /* Timer disabled. */ pwmp->tim->CR1 = 0; /* Timer disabled. */
pwmp->tim->DIER = 0; /* All IRQs disabled. */ pwmp->tim->DIER = 0; /* All IRQs disabled. */
pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */ pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */
pwmp->tim->BDTR = 0;
#if STM32_PWM_USE_TIM1 #if STM32_PWM_USE_TIM1
if (&PWMD1 == pwmp) { if (&PWMD1 == pwmp) {

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@ -40,10 +40,66 @@
*/ */
#define PWM_CHANNELS 4 #define PWM_CHANNELS 4
/**
* @brief Standard output modes mask.
*/
#define PWM_OUTPUT_MASK 0x07
/**
* @brief Output not driven, callback only.
*/
#define PWM_OUTPUT_DISABLED 0x00
/**
* @brief Positive PWM logic, active is logic level one.
*/
#define PWM_OUTPUT_ACTIVE_HIGH 0x01
/**
* @brief Inverse PWM logic, active is logic level zero.
*/
#define PWM_OUTPUT_ACTIVE_LOW 0x02
/**
* @brief Complementary output modes mask.
*/
#define PWM_COMPLEMENTARY_OUTPUT_MASK 0x70
/**
* @brief Complementary output not driven.
*/
#define PWM_COMPLEMENTARY_OUTPUT_DISABLED 0x00
/**
* @brief Complementary output, active is logic level one.
* @note This setting is only available if the configuration option
* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
* timers TIM1 and TIM8.
*/
#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10
/**
* @brief Complementary output, active is logic level zero.
* @note This setting is only available if the configuration option
* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
* timers TIM1 and TIM8.
*/
#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @brief If advanced timer features switch.
* @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
* enabled.
* @note The default is @p TRUE.
*/
#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
#define STM32_PWM_USE_ADVANCED TRUE
#endif
/** /**
* @brief PWMD1 driver enable switch. * @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included. * @details If set to @p TRUE the support for PWMD1 is included.
@ -154,10 +210,19 @@
#error "PWM driver activated but no TIM peripheral assigned" #error "PWM driver activated but no TIM peripheral assigned"
#endif #endif
#if STM32_PWM_USE_ADVANCED && !STM32_PWM_USE_TIM1
#error "advanced mode selected but no advanced timer assigned"
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @brief PWM mode type.
*/
typedef uint32_t pwmmode_t;
/** /**
* @brief PWM channel type. * @brief PWM channel type.
*/ */
@ -168,15 +233,6 @@ typedef uint8_t pwmchannel_t;
*/ */
typedef uint16_t pwmcnt_t; typedef uint16_t pwmcnt_t;
/**
* @brief PWM logic mode.
*/
typedef enum {
PWM_OUTPUT_DISABLED = 0, /**< Output not driven, callback only. */
PWM_OUTPUT_ACTIVE_HIGH = 1, /**< Idle is logic level 0. */
PWM_OUTPUT_ACTIVE_LOW = 2 /**< Idle is logic level 1. */
} pwmmode_t;
/** /**
* @brief PWM driver channel configuration structure. * @brief PWM driver channel configuration structure.
*/ */
@ -226,6 +282,13 @@ typedef struct {
* @note The value of this field should normally be equal to zero. * @note The value of this field should normally be equal to zero.
*/ */
uint16_t cr2; uint16_t cr2;
#if STM32_PWM_USE_ADVANCED || defined(__DOXYGEN__)
/**
* @brief TIM BDTR (break & dead-time) register initialization data.
* @note The value of this field should normally be equal to zero.
*/ \
uint16_t bdtr;
#endif
} PWMConfig; } PWMConfig;
/** /**

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@ -86,6 +86,7 @@
even from within callbacks. Formerly it was required to stop and restart even from within callbacks. Formerly it was required to stop and restart
the driver. the driver.
- Improved driver documentation. - Improved driver documentation.
- NEW: Added advanced mode to the STM32 PWM driver (TIM1 only).
- NEW: Added new ICU driver model, Input Capture Unit. - NEW: Added new ICU driver model, Input Capture Unit.
- NEW: ICU driver implementation for STM32. - NEW: ICU driver implementation for STM32.
- NEW: Implemented stack checking in the Cortex-Mx RVCT port (backported - NEW: Implemented stack checking in the Cortex-Mx RVCT port (backported

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -43,7 +43,10 @@ static PWMConfig pwmcfg = {
{PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_DISABLED, NULL} {PWM_OUTPUT_DISABLED, NULL}
}, },
0,
#if STM32_PWM_USE_ADVANCED
0 0
#endif
}; };
icucnt_t last_width, last_period; icucnt_t last_width, last_period;

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE

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@ -91,6 +91,7 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE