Added advanced mode and BTRD handling to the STM32 PWM driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
875a7d8f41
commit
d8420eb83a
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@ -73,7 +73,10 @@ static PWMConfig pwmcfg = {
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{PWM_OUTPUT_ACTIVE_HIGH, NULL}
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{PWM_OUTPUT_ACTIVE_HIGH, NULL}
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},
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},
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/* HW dependent part.*/
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/* HW dependent part.*/
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0,
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#if STM32_PWM_USE_ADVANCED
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0
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0
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#endif
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};
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};
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/*
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/*
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@ -90,6 +90,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 TRUE
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#define STM32_PWM_USE_TIM3 TRUE
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@ -91,6 +91,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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@ -91,6 +91,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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@ -98,6 +98,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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@ -394,7 +394,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
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/* Output enables and polarities setup.*/
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/* Output enables and polarities setup.*/
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ccer = 0;
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ccer = 0;
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switch (pwmp->config->channels[0].mode) {
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switch (pwmp->config->channels[0].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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case PWM_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC1P;
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ccer |= TIM_CCER_CC1P;
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case PWM_OUTPUT_ACTIVE_HIGH:
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case PWM_OUTPUT_ACTIVE_HIGH:
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@ -402,7 +402,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
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default:
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default:
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;
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;
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}
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}
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switch (pwmp->config->channels[1].mode) {
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switch (pwmp->config->channels[1].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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case PWM_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC2P;
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ccer |= TIM_CCER_CC2P;
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case PWM_OUTPUT_ACTIVE_HIGH:
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case PWM_OUTPUT_ACTIVE_HIGH:
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@ -410,7 +410,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
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default:
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default:
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;
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;
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}
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}
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switch (pwmp->config->channels[2].mode) {
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switch (pwmp->config->channels[2].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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case PWM_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC3P;
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ccer |= TIM_CCER_CC3P;
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case PWM_OUTPUT_ACTIVE_HIGH:
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case PWM_OUTPUT_ACTIVE_HIGH:
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@ -418,7 +418,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
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default:
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default:
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;
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;
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}
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}
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switch (pwmp->config->channels[3].mode) {
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switch (pwmp->config->channels[3].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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case PWM_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC4P;
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ccer |= TIM_CCER_CC4P;
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case PWM_OUTPUT_ACTIVE_HIGH:
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case PWM_OUTPUT_ACTIVE_HIGH:
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@ -426,11 +426,44 @@ void pwm_lld_start(PWMDriver *pwmp) {
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default:
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default:
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;
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;
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}
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}
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#if STM32_PWM_USE_ADVANCED
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if (&PWMD1 == pwmp) {
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switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC1NP;
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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ccer |= TIM_CCER_CC1NE;
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default:
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;
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}
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switch (pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC2NP;
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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ccer |= TIM_CCER_CC2NE;
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default:
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;
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}
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switch (pwmp->config->channels[2].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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ccer |= TIM_CCER_CC3NP;
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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ccer |= TIM_CCER_CC3NE;
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default:
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;
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}
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}
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#endif /* STM32_PWM_USE_ADVANCED*/
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pwmp->tim->CCER = ccer;
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pwmp->tim->CCER = ccer;
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pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */
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pwmp->tim->EGR = TIM_EGR_UG; /* Update event. */
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pwmp->tim->SR = 0; /* Clear pending IRQs. */
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pwmp->tim->SR = 0; /* Clear pending IRQs. */
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pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE;
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pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE;
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#if STM32_PWM_USE_ADVANCED
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pwmp->tim->BDTR = pwmp->config->bdtr | TIM_BDTR_MOE;
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#else
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pwmp->tim->BDTR = TIM_BDTR_MOE;
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pwmp->tim->BDTR = TIM_BDTR_MOE;
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#endif
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/* Timer configured and started.*/
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/* Timer configured and started.*/
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pwmp->tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;
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pwmp->tim->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;
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}
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}
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@ -450,6 +483,7 @@ void pwm_lld_stop(PWMDriver *pwmp) {
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pwmp->tim->CR1 = 0; /* Timer disabled. */
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pwmp->tim->CR1 = 0; /* Timer disabled. */
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pwmp->tim->DIER = 0; /* All IRQs disabled. */
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pwmp->tim->DIER = 0; /* All IRQs disabled. */
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pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */
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pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */
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pwmp->tim->BDTR = 0;
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#if STM32_PWM_USE_TIM1
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#if STM32_PWM_USE_TIM1
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if (&PWMD1 == pwmp) {
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if (&PWMD1 == pwmp) {
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@ -40,10 +40,66 @@
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*/
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*/
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#define PWM_CHANNELS 4
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#define PWM_CHANNELS 4
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/**
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* @brief Standard output modes mask.
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*/
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#define PWM_OUTPUT_MASK 0x07
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/**
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* @brief Output not driven, callback only.
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*/
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#define PWM_OUTPUT_DISABLED 0x00
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/**
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* @brief Positive PWM logic, active is logic level one.
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*/
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#define PWM_OUTPUT_ACTIVE_HIGH 0x01
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/**
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* @brief Inverse PWM logic, active is logic level zero.
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*/
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#define PWM_OUTPUT_ACTIVE_LOW 0x02
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/**
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* @brief Complementary output modes mask.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_MASK 0x70
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/**
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* @brief Complementary output not driven.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_DISABLED 0x00
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/**
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* @brief Complementary output, active is logic level one.
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* @note This setting is only available if the configuration option
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* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
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* timers TIM1 and TIM8.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10
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/**
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* @brief Complementary output, active is logic level zero.
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* @note This setting is only available if the configuration option
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* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
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* timers TIM1 and TIM8.
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*/
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#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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* @brief If advanced timer features switch.
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* @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
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* enabled.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
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#define STM32_PWM_USE_ADVANCED TRUE
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#endif
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/**
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/**
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* @brief PWMD1 driver enable switch.
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* @brief PWMD1 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @details If set to @p TRUE the support for PWMD1 is included.
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@ -154,10 +210,19 @@
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#error "PWM driver activated but no TIM peripheral assigned"
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#error "PWM driver activated but no TIM peripheral assigned"
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#endif
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#endif
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#if STM32_PWM_USE_ADVANCED && !STM32_PWM_USE_TIM1
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#error "advanced mode selected but no advanced timer assigned"
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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* @brief PWM mode type.
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*/
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typedef uint32_t pwmmode_t;
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/**
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/**
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* @brief PWM channel type.
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* @brief PWM channel type.
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*/
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*/
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@ -168,15 +233,6 @@ typedef uint8_t pwmchannel_t;
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*/
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*/
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typedef uint16_t pwmcnt_t;
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typedef uint16_t pwmcnt_t;
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/**
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* @brief PWM logic mode.
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*/
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typedef enum {
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PWM_OUTPUT_DISABLED = 0, /**< Output not driven, callback only. */
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PWM_OUTPUT_ACTIVE_HIGH = 1, /**< Idle is logic level 0. */
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PWM_OUTPUT_ACTIVE_LOW = 2 /**< Idle is logic level 1. */
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} pwmmode_t;
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/**
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/**
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* @brief PWM driver channel configuration structure.
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* @brief PWM driver channel configuration structure.
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*/
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*/
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@ -226,6 +282,13 @@ typedef struct {
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* @note The value of this field should normally be equal to zero.
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* @note The value of this field should normally be equal to zero.
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*/
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*/
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uint16_t cr2;
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uint16_t cr2;
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#if STM32_PWM_USE_ADVANCED || defined(__DOXYGEN__)
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/**
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* @brief TIM BDTR (break & dead-time) register initialization data.
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* @note The value of this field should normally be equal to zero.
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*/ \
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uint16_t bdtr;
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#endif
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} PWMConfig;
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} PWMConfig;
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/**
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/**
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@ -86,6 +86,7 @@
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even from within callbacks. Formerly it was required to stop and restart
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even from within callbacks. Formerly it was required to stop and restart
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the driver.
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the driver.
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- Improved driver documentation.
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- Improved driver documentation.
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- NEW: Added advanced mode to the STM32 PWM driver (TIM1 only).
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- NEW: Added new ICU driver model, Input Capture Unit.
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- NEW: Added new ICU driver model, Input Capture Unit.
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- NEW: ICU driver implementation for STM32.
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- NEW: ICU driver implementation for STM32.
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- NEW: Implemented stack checking in the Cortex-Mx RVCT port (backported
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- NEW: Implemented stack checking in the Cortex-Mx RVCT port (backported
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@ -91,6 +91,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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@ -91,6 +91,7 @@
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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@ -43,7 +43,10 @@ static PWMConfig pwmcfg = {
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{PWM_OUTPUT_DISABLED, NULL},
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{PWM_OUTPUT_DISABLED, NULL},
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{PWM_OUTPUT_DISABLED, NULL}
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{PWM_OUTPUT_DISABLED, NULL}
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},
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},
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0,
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#if STM32_PWM_USE_ADVANCED
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0
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0
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#endif
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};
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};
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icucnt_t last_width, last_period;
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icucnt_t last_width, last_period;
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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*/
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*/
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#define STM32_PWM_USE_ADVANCED TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
|
|
@ -91,6 +91,7 @@
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
*/
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED TRUE
|
||||||
#define STM32_PWM_USE_TIM1 TRUE
|
#define STM32_PWM_USE_TIM1 TRUE
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
|
|
@ -91,6 +91,7 @@
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
*/
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED TRUE
|
||||||
#define STM32_PWM_USE_TIM1 TRUE
|
#define STM32_PWM_USE_TIM1 TRUE
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
|
|
@ -91,6 +91,7 @@
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
*/
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED TRUE
|
||||||
#define STM32_PWM_USE_TIM1 TRUE
|
#define STM32_PWM_USE_TIM1 TRUE
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
|
|
@ -91,6 +91,7 @@
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
*/
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED TRUE
|
||||||
#define STM32_PWM_USE_TIM1 TRUE
|
#define STM32_PWM_USE_TIM1 TRUE
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
|
Loading…
Reference in New Issue