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Fixed bug #476. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6787 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2014-03-19 10:11:44 +00:00
parent 24204f0de8
commit d8208d1c37
2 changed files with 18 additions and 16 deletions
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32
os/hal/platforms/STM32L1xx/hal_lld.h
View File

@ -554,7 +554,7 @@
/** /**
* @brief HSE divider toward RTC setting. * @brief HSE divider toward RTC setting.
*/ */
#if !defined(STM32_RTCSEL) || defined(__DOXYGEN__) #if !defined(STM32_RTCPRE) || defined(__DOXYGEN__)
#define STM32_RTCPRE STM32_RTCPRE_DIV2 #define STM32_RTCPRE STM32_RTCPRE_DIV2
#endif #endif
/** @} */ /** @} */
@ -666,7 +666,7 @@
(STM32_MCOSEL == STM32_MCOSEL_HSE) || \ (STM32_MCOSEL == STM32_MCOSEL_HSE) || \
((STM32_MCOSEL == STM32_MCOSEL_PLL) && \ ((STM32_MCOSEL == STM32_MCOSEL_PLL) && \
(STM32_PLLSRC == STM32_PLLSRC_HSE)) || \ (STM32_PLLSRC == STM32_PLLSRC_HSE)) || \
(STM_RTC_SOURCE == STM32_RTCSEL_HSEDIV) (STM32_RTCSEL == STM32_RTCSEL_HSEDIV)
#error "required HSE clock is not enabled" #error "required HSE clock is not enabled"
#endif #endif
#endif /* !STM32_HSE_ENABLED */ #endif /* !STM32_HSE_ENABLED */
@ -674,7 +674,7 @@
/* LSI related checks.*/ /* LSI related checks.*/
#if STM32_LSI_ENABLED #if STM32_LSI_ENABLED
#else /* !STM32_LSI_ENABLED */ #else /* !STM32_LSI_ENABLED */
#if STM_RTCCLK == STM32_LSICLK #if STM32_RTCCLK == STM32_LSICLK
#error "required LSI clock is not enabled" #error "required LSI clock is not enabled"
#endif #endif
#endif /* !STM32_LSI_ENABLED */ #endif /* !STM32_LSI_ENABLED */
@ -688,7 +688,7 @@
#error "STM32_LSECLK outside acceptable range (1...1000kHz)" #error "STM32_LSECLK outside acceptable range (1...1000kHz)"
#endif #endif
#else /* !STM32_LSE_ENABLED */ #else /* !STM32_LSE_ENABLED */
#if STM_RTCCLK == STM32_LSECLK #if STM32_RTCCLK == STM32_LSECLK
#error "required LSE clock is not enabled" #error "required LSE clock is not enabled"
#endif #endif
#endif /* !STM32_LSE_ENABLED */ #endif /* !STM32_LSE_ENABLED */
@ -902,19 +902,19 @@
* @brief MCO divider clock. * @brief MCO divider clock.
*/ */
#if (STM32_MCOSEL == STM32_MCOSEL_NOCLOCK) || defined(__DOXYGEN__) #if (STM32_MCOSEL == STM32_MCOSEL_NOCLOCK) || defined(__DOXYGEN__)
#define STM_MCODIVCLK 0 #define STM32_MCODIVCLK 0
#elif STM32_MCOSEL == STM32_MCOSEL_HSI #elif STM32_MCOSEL == STM32_MCOSEL_HSI
#define STM_MCODIVCLK STM32_HSICLK #define STM32_MCODIVCLK STM32_HSICLK
#elif STM32_MCOSEL == STM32_MCOSEL_MSI #elif STM32_MCOSEL == STM32_MCOSEL_MSI
#define STM_MCODIVCLK STM32_MSICLK #define STM32_MCODIVCLK STM32_MSICLK
#elif STM32_MCOSEL == STM32_MCOSEL_HSE #elif STM32_MCOSEL == STM32_MCOSEL_HSE
#define STM_MCODIVCLK STM32_HSECLK #define STM32_MCODIVCLK STM32_HSECLK
#elif STM32_MCOSEL == STM32_MCOSEL_PLL #elif STM32_MCOSEL == STM32_MCOSEL_PLL
#define STM_MCODIVCLK STM32_PLLCLKOUT #define STM32_MCODIVCLK STM32_PLLCLKOUT
#elif STM32_MCOSEL == STM32_MCOSEL_LSI #elif STM32_MCOSEL == STM32_MCOSEL_LSI
#define STM_MCODIVCLK STM32_LSICLK #define STM32_MCODIVCLK STM32_LSICLK
#elif STM32_MCOSEL == STM32_MCOSEL_LSE #elif STM32_MCOSEL == STM32_MCOSEL_LSE
#define STM_MCODIVCLK STM32_LSECLK #define STM32_MCODIVCLK STM32_LSECLK
#else #else
#error "invalid STM32_MCOSEL value specified" #error "invalid STM32_MCOSEL value specified"
#endif #endif
@ -923,15 +923,15 @@
* @brief MCO output pin clock. * @brief MCO output pin clock.
*/ */
#if (STM32_MCOPRE == STM32_MCOPRE_DIV1) || defined(__DOXYGEN__) #if (STM32_MCOPRE == STM32_MCOPRE_DIV1) || defined(__DOXYGEN__)
#define STM_MCOCLK STM_MCODIVCLK #define STM32_MCOCLK STM32_MCODIVCLK
#elif STM32_MCOPRE == STM32_MCOPRE_DIV2 #elif STM32_MCOPRE == STM32_MCOPRE_DIV2
#define STM_MCOCLK (STM_MCODIVCLK / 2) #define STM32_MCOCLK (STM32_MCODIVCLK / 2)
#elif STM32_MCOPRE == STM32_MCOPRE_DIV4 #elif STM32_MCOPRE == STM32_MCOPRE_DIV4
#define STM_MCOCLK (STM_MCODIVCLK / 4) #define STM32_MCOCLK (STM32_MCODIVCLK / 4)
#elif STM32_MCOPRE == STM32_MCOPRE_DIV8 #elif STM32_MCOPRE == STM32_MCOPRE_DIV8
#define STM_MCOCLK (STM_MCODIVCLK / 8) #define STM32_MCOCLK (STM32_MCODIVCLK / 8)
#elif STM32_MCOPRE == STM32_MCOPRE_DIV16 #elif STM32_MCOPRE == STM32_MCOPRE_DIV16
#define STM_MCOCLK (STM_MCODIVCLK / 16) #define STM32_MCOCLK (STM32_MCODIVCLK / 16)
#else #else
#error "invalid STM32_MCOPRE value specified" #error "invalid STM32_MCOPRE value specified"
#endif #endif

2
readme.txt
View File

@ -89,6 +89,8 @@
***************************************************************************** *****************************************************************************
*** 2.7.0 *** *** 2.7.0 ***
- FIX: Fixed several macro errors in STM32L1xx HAL driver (bug #476)
(backported to 2.6.4).
- FIX: Fixed wrong STM32 RTCv2 alarms implementation (bug #475)(backported - FIX: Fixed wrong STM32 RTCv2 alarms implementation (bug #475)(backported
to 2.6.4). to 2.6.4).
- FIX: Fixed wrong ADC34 macros in STM32F30x HAL driver (bug #474) - FIX: Fixed wrong ADC34 macros in STM32F30x HAL driver (bug #474)