git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8210 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2015-08-13 09:59:30 +00:00
parent d8b4ba3e59
commit d676c45571
2 changed files with 19 additions and 19 deletions

View File

@ -428,25 +428,6 @@ void dmaInit(void) {
DMA1->HIFCR = 0xFFFFFFFFU;
DMA2->LIFCR = 0xFFFFFFFFU;
DMA2->HIFCR = 0xFFFFFFFFU;
#if defined(STM32F7XX)
/* If the DMA is in use then the DMA-accessible RAM must be programmed as
Write Through using the MPU, region zero is used with a size of 512kB,
the sub-regions are programmed as follow:
- 0..4, enabled, it is the normal, DMA-accessible, RAM.
- 5..7, disabled, beyond RAM area.
The system memory layout is used as "background" for the MPU regions.*/
mpuConfigureRegion(MPU_REGION_0,
0x20000000U,
MPU_RASR_ATTR_AP_RW_RW |
MPU_RASR_ATTR_CACHEABLE_WT_NWA |
MPU_RNR_REGION(5) |
MPU_RNR_REGION(6) |
MPU_RNR_REGION(7) |
MPU_RASR_SIZE_512K |
MPU_RASR_ENABLE);
mpuEnable(MPU_CTRL_PRIVDEFENA);
#endif
}
/**

View File

@ -128,6 +128,25 @@ void hal_lld_init(void) {
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#if defined(STM32F7XX)
/* If the DMA is in use then the DMA-accessible RAM must be programmed as
Write Through using the MPU, region zero is used with a size of 512kB,
the sub-regions are programmed as follow:
- 0..4, enabled, it is the normal, DMA-accessible, RAM.
- 5..7, disabled, beyond RAM area.
The system memory layout is used as "background" for the MPU regions.*/
mpuConfigureRegion(MPU_REGION_0,
0x20000000U,
MPU_RASR_ATTR_AP_RW_RW |
MPU_RASR_ATTR_CACHEABLE_WT_NWA |
MPU_RNR_REGION(5) |
MPU_RNR_REGION(6) |
MPU_RNR_REGION(7) |
MPU_RASR_SIZE_512K |
MPU_RASR_ENABLE);
mpuEnable(MPU_CTRL_PRIVDEFENA);
#endif
#endif
/* Programmable voltage detector enable.*/