From d4f1aca3dd28468cbc120ca13f3e720d130aaa58 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Aug 2013 14:37:29 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6200 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARMCM4-STM32F407-DISCOVERY/chconf.h | 2 +- os/hal/platforms/STM32/TIMv1/st_lld.c | 2 +- os/hal/platforms/STM32F4xx/stm32_isr.h | 124 +++++++++++----------- 3 files changed, 64 insertions(+), 64 deletions(-) diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h index 2efd81b54..2d9e90365 100644 --- a/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h +++ b/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h @@ -50,7 +50,7 @@ * measurements. */ #if !defined(CH_CFG_RTC_FREQUENCY) || defined(__DOXYGEN__) -#define CH_CFG_RTC_FREQUENCY 72000000 +#define CH_CFG_RTC_FREQUENCY 168000000 #endif /** diff --git a/os/hal/platforms/STM32/TIMv1/st_lld.c b/os/hal/platforms/STM32/TIMv1/st_lld.c index 45367878a..240328ff5 100644 --- a/os/hal/platforms/STM32/TIMv1/st_lld.c +++ b/os/hal/platforms/STM32/TIMv1/st_lld.c @@ -129,7 +129,7 @@ void st_lld_init(void) { rccEnableTIM2(FALSE); /* Initializing the counter in free running mode.*/ - STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1; + STM32_TIM2->PSC = STM32_TIMCLK1 / OSAL_SYSTICK_FREQUENCY - 1; STM32_TIM2->ARR = 0xFFFFFFFF; STM32_TIM2->CCMR1 = 0; STM32_TIM2->CCR[0] = 0; diff --git a/os/hal/platforms/STM32F4xx/stm32_isr.h b/os/hal/platforms/STM32F4xx/stm32_isr.h index fc655165a..0e936b3d6 100644 --- a/os/hal/platforms/STM32F4xx/stm32_isr.h +++ b/os/hal/platforms/STM32F4xx/stm32_isr.h @@ -36,23 +36,23 @@ /* * CAN units. */ -#define STM32_CAN1_TX_HANDLER CAN1_TX_IRQHandler -#define STM32_CAN1_RX0_HANDLER CAN1_RX0_IRQHandler -#define STM32_CAN1_RX1_HANDLER CAN1_RX1_IRQHandler -#define STM32_CAN1_SCE_HANDLER CAN1_SCE_IRQHandler -#define STM32_CAN2_TX_HANDLER CAN2_TX_IRQHandler -#define STM32_CAN2_RX0_HANDLER CAN2_RX0_IRQHandler -#define STM32_CAN2_RX1_HANDLER CAN2_RX1_IRQHandler -#define STM32_CAN2_SCE_HANDLER CAN2_SCE_IRQHandler +#define STM32_CAN1_TX_HANDLER Vector8C +#define STM32_CAN1_RX0_HANDLER Vector90 +#define STM32_CAN1_RX1_HANDLER Vector94 +#define STM32_CAN1_SCE_HANDLER Vector98 +#define STM32_CAN2_TX_HANDLER Vector13C +#define STM32_CAN2_RX0_HANDLER Vector140 +#define STM32_CAN2_RX1_HANDLER Vector144 +#define STM32_CAN2_SCE_HANDLER Vector148 -#define STM32_CAN1_TX_NUMBER CAN1_TX_IRQn -#define STM32_CAN1_RX0_NUMBER CAN1_RX0_IRQn -#define STM32_CAN1_RX1_NUMBER CAN1_RX1_IRQn -#define STM32_CAN1_SCE_NUMBER CAN1_SCE_IRQn -#define STM32_CAN2_TX_NUMBER CAN2_TX_IRQn -#define STM32_CAN2_RX0_NUMBER CAN2_RX0_IRQn -#define STM32_CAN2_RX1_NUMBER CAN2_RX1_IRQn -#define STM32_CAN2_SCE_NUMBER CAN2_SCE_IRQn +#define STM32_CAN1_TX_NUMBER 19 +#define STM32_CAN1_RX0_NUMBER 20 +#define STM32_CAN1_RX1_NUMBER 21 +#define STM32_CAN1_SCE_NUMBER 22 +#define STM32_CAN2_TX_NUMBER 63 +#define STM32_CAN2_RX0_NUMBER 64 +#define STM32_CAN2_RX1_NUMBER 65 +#define STM32_CAN2_SCE_NUMBER 66 /* * OTG units. @@ -62,67 +62,67 @@ #define STM32_OTG2_EP1OUT_HANDLER Vector168 #define STM32_OTG2_EP1IN_HANDLER Vector16C -#define STM32_OTG1_NUMBER OTG_FS_IRQn -#define STM32_OTG2_NUMBER OTG_HS_IRQn -#define STM32_OTG2_EP1OUT_NUMBER OTG_HS_EP1_OUT_IRQn -#define STM32_OTG2_EP1IN_NUMBER OTG_HS_EP1_IN_IRQn +#define STM32_OTG1_NUMBER 67 +#define STM32_OTG2_NUMBER 77 +#define STM32_OTG2_EP1OUT_NUMBER 74 +#define STM32_OTG2_EP1IN_NUMBER 75 /* * SDIO unit. */ -#define STM32_SDIO_HANDLER SDIO_IRQHandler +#define STM32_SDIO_HANDLER Vector104 -#define STM32_SDIO_NUMBER SDIO_IRQn +#define STM32_SDIO_NUMBER 49 /* * TIM units. */ -#define STM32_TIM1_UP_HANDLER TIM1_UP_IRQHandler -#define STM32_TIM1_CC_HANDLER TIM1_CC_IRQHandler -#define STM32_TIM2_HANDLER TIM2_IRQHandler -#define STM32_TIM3_HANDLER TIM3_IRQHandler -#define STM32_TIM4_HANDLER TIM4_IRQHandler -#define STM32_TIM5_HANDLER TIM5_IRQHandler -#define STM32_TIM6_HANDLER TIM6_IRQHandler -#define STM32_TIM7_HANDLER TIM7_IRQHandler -#define STM32_TIM8_UP_HANDLER TIM8_UP_IRQHandler -#define STM32_TIM8_CC_HANDLER TIM8_CC_IRQHandler -#define STM32_TIM9_HANDLER TIM1_BRK_IRQHandler -#define STM32_TIM11_HANDLER TIM1_TRG_COM_IRQHandler -#define STM32_TIM12_HANDLER TIM8_BRK_IRQHandler -#define STM32_TIM14_HANDLER TIM8_TRG_COM_IRQHandler +#define STM32_TIM1_UP_HANDLER VectorA4 +#define STM32_TIM1_CC_HANDLER VectorAC +#define STM32_TIM2_HANDLER VectorB0 +#define STM32_TIM3_HANDLER VectorB4 +#define STM32_TIM4_HANDLER VectorB8 +#define STM32_TIM5_HANDLER Vector108 +#define STM32_TIM6_HANDLER Vector118 +#define STM32_TIM7_HANDLER Vector11C +#define STM32_TIM8_UP_HANDLER VectorF0 +#define STM32_TIM8_CC_HANDLER VectorF8 +#define STM32_TIM9_HANDLER VectorA0 +#define STM32_TIM11_HANDLER VectorA8 +#define STM32_TIM12_HANDLER VectorEC +#define STM32_TIM14_HANDLER VectorF4 -#define STM32_TIM1_UP_NUMBER TIM1_UP_TIM10_IRQn -#define STM32_TIM1_CC_NUMBER TIM1_CC_IRQn -#define STM32_TIM2_NUMBER TIM2_IRQn -#define STM32_TIM3_NUMBER TIM3_IRQn -#define STM32_TIM4_NUMBER TIM4_IRQn -#define STM32_TIM5_NUMBER TIM5_IRQn -#define STM32_TIM6_NUMBER TIM6_IRQn -#define STM32_TIM7_NUMBER TIM7_IRQn -#define STM32_TIM8_UP_NUMBER TIM8_UP_TIM13_IRQn -#define STM32_TIM8_CC_NUMBER TIM8_CC_IRQn -#define STM32_TIM9_NUMBER TIM1_BRK_TIM9_IRQn -#define STM32_TIM11_NUMBER TIM1_TRG_COM_TIM11_IRQn -#define STM32_TIM12_NUMBER TIM8_BRK_TIM12_IRQn -#define STM32_TIM14_NUMBER TIM8_TRG_COM_TIM14_IRQn +#define STM32_TIM1_UP_NUMBER 25 +#define STM32_TIM1_CC_NUMBER 27 +#define STM32_TIM2_NUMBER 28 +#define STM32_TIM3_NUMBER 29 +#define STM32_TIM4_NUMBER 30 +#define STM32_TIM5_NUMBER 50 +#define STM32_TIM6_NUMBER 54 +#define STM32_TIM7_NUMBER 55 +#define STM32_TIM8_UP_NUMBER 44 +#define STM32_TIM8_CC_NUMBER 46 +#define STM32_TIM9_NUMBER 24 +#define STM32_TIM11_NUMBER 26 +#define STM32_TIM12_NUMBER 43 +#define STM32_TIM14_NUMBER 45 /* * USART units. */ -#define STM32_USART1_HANDLER USART1_IRQHandler -#define STM32_USART2_HANDLER USART2_IRQHandler -#define STM32_USART3_HANDLER USART3_IRQHandler -#define STM32_UART4_HANDLER UART4_IRQHandler -#define STM32_UART5_HANDLER UART5_IRQHandler -#define STM32_USART6_HANDLER USART6_IRQHandler +#define STM32_USART1_HANDLER VectorD4 +#define STM32_USART2_HANDLER VectorD8 +#define STM32_USART3_HANDLER VectorDC +#define STM32_UART4_HANDLER Vector110 +#define STM32_UART5_HANDLER Vector114 +#define STM32_USART6_HANDLER Vector15C -#define STM32_USART1_NUMBER USART1_IRQn -#define STM32_USART2_NUMBER USART2_IRQn -#define STM32_USART3_NUMBER USART3_IRQn -#define STM32_UART4_NUMBER UART4_IRQn -#define STM32_UART5_NUMBER UART5_IRQn -#define STM32_USART6_NUMBER USART6_IRQn +#define STM32_USART1_NUMBER 37 +#define STM32_USART2_NUMBER 38 +#define STM32_USART3_NUMBER 39 +#define STM32_UART4_NUMBER 52 +#define STM32_UART5_NUMBER 53 +#define STM32_USART6_NUMBER 71 /** @} */ /*===========================================================================*/