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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5375 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-03-07 13:33:42 +00:00
parent 1d6fc52f43
commit d2e3d96b8d
4 changed files with 278 additions and 26 deletions
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6
os/hal/platforms/SPC5xx/EDMA_v1/spc5_edma.c
View File

@ -69,7 +69,8 @@ CH_IRQ_HANDLER(vector10) {
/* If the channel is not associated then the error is simply discarded
else the error callback is invoked.*/
if (channels[channel] != NULL)
if ((channels[channel] != NULL) &&
(channels[channel]->dma_error_func != NULL))
channels[channel]->dma_error_func(channel,
channels[channel]->dma_param,
esr);
@ -695,8 +696,7 @@ edma_channel_t edmaChannelAllocate(const edma_channel_config_t *ccfg) {
edma_channel_t channel;
chDbgCheck((ccfg != NULL) && ((ccfg->dma_prio & 15) < 16) &&
(ccfg->dma_irq_prio < 16) &&
(ccfg->dma_func != NULL) && (ccfg->dma_error_func != NULL),
(ccfg->dma_irq_prio < 16),
"edmaChannelAllocate");
#if SPC5_EDMA_HAS_MUX

12
os/hal/platforms/SPC5xx/EDMA_v1/spc5_edma.h
View File

@ -126,8 +126,10 @@ typedef struct {
for this channel. */
uint8_t dma_irq_prio; /**< @brief IRQ priority level for
this channel. */
edma_callback_t dma_func; /**< @brief Channel callback. */
edma_error_callback_t dma_error_func; /**< @brief Channel error callback. */
edma_callback_t dma_func; /**< @brief Channel callback,
can be NULL if not required. */
edma_error_callback_t dma_error_func; /**< @brief Channel error callback,
can be NULL if not required. */
void *dma_param; /**< @brief Channel callback param. */
} edma_channel_config_t;
@ -229,7 +231,7 @@ typedef struct {
* @brief Sets the source address adjustment into a TCD.
*
* @param[in] tcdp pointer to an @p edma_tcd_t structure
* @param[in] iter the adjustment value
* @param[in] slast the adjustment value
*
* @api
*/
@ -240,7 +242,7 @@ typedef struct {
* @brief Sets the destination address adjustment into a TCD.
*
* @param[in] tcdp pointer to an @p edma_tcd_t structure
* @param[in] iter the adjustment value
* @param[in] dlast the adjustment value
*
* @api
*/
@ -251,7 +253,7 @@ typedef struct {
* @brief Sets the channel mode bits into a TCD.
*
* @param[in] tcdp pointer to an @p edma_tcd_t structure
* @param[in] iter the adjustment value
* @param[in] mode the mode value
*
* @api
*/

80
os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h
View File

@ -29,6 +29,77 @@
/* Driver constants. */
/*===========================================================================*/
/**
* @name Analog channel identifiers
* @{
*/
#define ADC_CHN_AN0 0U
#define ADC_CHN_AN1 1U
#define ADC_CHN_AN2 2U
#define ADC_CHN_AN3 3U
#define ADC_CHN_AN4 4U
#define ADC_CHN_AN5 5U
#define ADC_CHN_AN6 6U
#define ADC_CHN_AN7 7U
#define ADC_CHN_AN8 8U
#define ADC_CHN_AN9 9U
#define ADC_CHN_AN10 10U
#define ADC_CHN_AN11 11U
#define ADC_CHN_AN12 12U
#define ADC_CHN_AN13 13U
#define ADC_CHN_AN14 14U
#define ADC_CHN_AN15 15U
#define ADC_CHN_AN16 16U
#define ADC_CHN_AN17 17U
#define ADC_CHN_AN18 18U
#define ADC_CHN_AN19 19U
#define ADC_CHN_AN20 20U
#define ADC_CHN_AN21 21U
#define ADC_CHN_AN22 22U
#define ADC_CHN_AN23 23U
#define ADC_CHN_AN24 24U
#define ADC_CHN_AN25 25U
#define ADC_CHN_AN26 26U
#define ADC_CHN_AN27 27U
#define ADC_CHN_AN28 28U
#define ADC_CHN_AN29 29U
#define ADC_CHN_AN30 30U
#define ADC_CHN_AN31 31U
#define ADC_CHN_AN32 32U
#define ADC_CHN_AN33 33U
#define ADC_CHN_AN34 34U
#define ADC_CHN_AN35 35U
#define ADC_CHN_AN36 36U
#define ADC_CHN_AN37 37U
#define ADC_CHN_AN38 38U
#define ADC_CHN_AN39 39U
#define ADC_CHN_VRH 40U
#define ADC_CHN_VRL 41U
#define ADC_CHN_VREF50 42U
#define ADC_CHN_VREF75 43U
#define ADC_CHN_VREF25 44U
#define ADC_CHN_BANDGAP 45U
#define ADC_CHN_DAN0 96U
#define ADC_CHN_DAN1 97U
#define ADC_CHN_DAN2 98U
#define ADC_CHN_DAN3 99U
#define ADC_CHN_TEMP_SENSOR 128U
#define ADC_CHN_SPARE 129U
#define VRH 40UL
#define VRL 41UL
#define VRef_50 42UL
#define VRef_75 43UL
#define VRef_25 44UL
#define Bandgap 45UL
#define DAN_0 96UL
#define DAN_1 97UL
#define DAN_2 98UL
#define DAN_3 99UL
#define Temperature_Sensor 128UL
#define Spare 129UL
/** @} */
/**
* @name Internal registers indexes
* @{
@ -131,6 +202,7 @@
* @name EQADC conversion/configuration commands
* @{
*/
#define EQADC_CONV_CONFIG_STD (0U << 0) /**< @brief Alt.config.1. */
#define EQADC_CONV_CONFIG_SEL1 (8U << 0) /**< @brief Alt.config.1. */
#define EQADC_CONV_CONFIG_SEL2 (9U << 0) /**< @brief Alt.config.2. */
#define EQADC_CONV_CONFIG_SEL3 (10U << 0) /**< @brief Alt.config.3. */
@ -477,6 +549,10 @@ typedef struct {
*/
adcerrorcallback_t error_cb;
/* End of the mandatory fields.*/
/**
* @brief Initialization value for CFCR register.
*/
uint16_t cfcr;
/**
* @brief Number of command iterations stored in @p commands.
* @note The total number of array elements must be @p num_channels *
@ -486,10 +562,6 @@ typedef struct {
* @p adcStartConversion().
*/
uint32_t num_iterations;
/**
* @brief Initialization value for CFCR register.
*/
uint16_t cfcr;
/**
* @brief Pointer to an array of low level EQADC commands to be pushed
* into the CFIFO during a conversion.

206
testhal/SPC563Mxx/ADC/main.c
View File

@ -21,19 +21,21 @@
#include "ch.h"
#include "hal.h"
#define ADC_GRP1_NUM_CHANNELS 2
#define ADC_GRP1_NUM_CHANNELS 5
#define ADC_GRP1_BUF_DEPTH 8
#define ADC_GRP2_NUM_CHANNELS 8
#define ADC_GRP2_BUF_DEPTH 16
//#define ADC_GRP2_NUM_CHANNELS 8
//#define ADC_GRP2_BUF_DEPTH 16
static ADCConfig adccfg1 = {0, 0};
static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
//static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
/*
* ADC streaming callback.
*/
size_t nx = 0, ny = 0;
/*size_t nx = 0, ny = 0;
static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
(void)adcp;
@ -43,24 +45,200 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
else {
ny += n;
}
}
}*/
static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
(void)adcp;
(void)err;
palSetPad(PORT11, P11_LED4);
chSysHalt();
}
/*
* ADC conversion group.
* Mode: Linear buffer, 8 samples of 2 channels, SW triggered.
* Channels: IN7, IN8.
* Mode: Linear buffer, 8 samples of 5 channels, SW triggered.
* Channels: ADC_CHN_VRL, ADC_CHN_VREF25, ADC_CHN_VREF50,
* ADC_CHN_VREF75, ADC_CHN_VRH.
*
* NOTE: The configuration of a sequence is very complex in this ADC
* implementation. Configurations are meant to be generated by the
* SPC5 Studio visual configuration tool and not be written manually.
* Writing complex sequences manually requires ad deep knowledge of both
* the EQADC peripheral and the driver implementation.
*/
static const adccommand_t adcgrpcfg1_commands[ADC_GRP1_NUM_CHANNELS *
ADC_GRP1_BUF_DEPTH] = {
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRL),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF25),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF50),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VREF75),
EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL |
EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) |
EQADC_CONV_CHANNEL(ADC_CHN_VRH)
};
static const ADCConversionGroup adcgrpcfg1 = {
FALSE,
ADC_GRP1_NUM_CHANNELS,
NULL,
adcerrorcallback
adcerrorcallback,
EQADC_CFCR_SSE | EQADC_CFCR_MODE_SWSS,
ADC_GRP1_BUF_DEPTH,
adcgrpcfg1_commands
};
/*
@ -68,12 +246,12 @@ static const ADCConversionGroup adcgrpcfg1 = {
* Mode: Continuous, 16 samples of 8 channels, SW triggered.
* Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2.
*/
static const ADCConversionGroup adcgrpcfg2 = {
/*static const ADCConversionGroup adcgrpcfg2 = {
TRUE,
ADC_GRP2_NUM_CHANNELS,
adccallback,
adcerrorcallback,
};
};*/
/*
* Red LEDs blinker thread, times are in milliseconds.
@ -121,7 +299,7 @@ int main(void) {
/*
* Activates the ADC1 driver and the temperature sensor.
*/
adcStart(&ADCD1, NULL);
adcStart(&ADCD1, &adccfg1);
/*
* Linear conversion.
@ -132,14 +310,14 @@ int main(void) {
/*
* Starts an ADC continuous conversion.
*/
adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH);
// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH);
/*
* Normal main() thread activity, in this demo it does nothing.
*/
while (TRUE) {
if (palReadPad(PORT11, P11_BUTTON1)) {
adcStopConversion(&ADCD1);
// adcStopConversion(&ADCD1);
}
chThdSleepMilliseconds(500);
}