Differential mode for STM32F3xx ADC driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8305 35acf78f-673a-0410-8e92-d51de3d6d3f4master
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dfc15ba56d
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d09ba20cf3
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@ -73,6 +73,10 @@ ADCDriver ADCD3;
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/* Driver local variables and types. */
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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static const ADCConfig default_config = {
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difsel: 0
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};
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -366,6 +370,11 @@ void adc_lld_init(void) {
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*/
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*/
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void adc_lld_start(ADCDriver *adcp) {
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void adc_lld_start(ADCDriver *adcp) {
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/* Handling the default configuration.*/
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if (adcp->config == NULL) {
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adcp->config = &default_config;
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}
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/* If in stopped state then enables the ADC and DMA clocks.*/
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/* If in stopped state then enables the ADC and DMA clocks.*/
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if (adcp->state == ADC_STOP) {
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if (adcp->state == ADC_STOP) {
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#if STM32_ADC_USE_ADC1
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#if STM32_ADC_USE_ADC1
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@ -402,6 +411,15 @@ void adc_lld_start(ADCDriver *adcp) {
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/* Clock source setting.*/
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/* Clock source setting.*/
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adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
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adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
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/* Differential channels setting.*/
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#if STM32_ADC_DUAL_MODE
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adcp->adcm->DIFSEL = adcp->config->difsel;
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adcp->adcs->DIFSEL = adcp->config->difsel;
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#else
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adcp->adcm->DIFSEL = adcp->config->difsel;
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#endif
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/* Master ADC calibration.*/
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/* Master ADC calibration.*/
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adc_lld_vreg_on(adcp);
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adc_lld_vreg_on(adcp);
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adc_lld_calibrate(adcp);
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adc_lld_calibrate(adcp);
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@ -484,8 +502,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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dmaStreamSetTransactionSize(adcp->dmastp, ((uint32_t)grpp->num_channels/2) *
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dmaStreamSetTransactionSize(adcp->dmastp, ((uint32_t)grpp->num_channels/2) *
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(uint32_t)adcp->depth);
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(uint32_t)adcp->depth);
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#else
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#else
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dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *
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dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *
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(uint32_t)adcp->depth);
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(uint32_t)adcp->depth);
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#endif
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#endif
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dmaStreamSetMode(adcp->dmastp, dmamode);
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dmaStreamSetMode(adcp->dmastp, dmamode);
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dmaStreamEnable(adcp->dmastp);
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dmaStreamEnable(adcp->dmastp);
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@ -452,10 +452,12 @@ typedef struct {
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/**
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/**
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* @brief Driver configuration structure.
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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*/
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typedef struct {
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typedef struct {
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uint32_t dummy;
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/**
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* @brief ADC DIFSEL register initialization data.
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*/
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uint32_t difsel;
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} ADCConfig;
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} ADCConfig;
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/**
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/**
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@ -73,6 +73,7 @@
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*****************************************************************************
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*****************************************************************************
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*** 3.1.0 ***
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*** 3.1.0 ***
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- HAL: Added support for differential mode to the STM32F3xx ADC driver.
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- HAL: Experimental isochronous capability added to STM32 OTGv1 driver.
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- HAL: Experimental isochronous capability added to STM32 OTGv1 driver.
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- HAL: Modified the serial-USB driver to reject write/read attempts if the
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- HAL: Modified the serial-USB driver to reject write/read attempts if the
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underlying USB is not in active state. In case of disconnection the
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underlying USB is not in active state. In case of disconnection the
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