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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@730 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2009-02-06 21:11:29 +00:00
parent 0ed5d7e2e0
commit cfe5d367c2
5 changed files with 32 additions and 27 deletions
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10
ports/ARM7-AT91SAM7X/sam7x_serial.c
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@ -129,11 +129,11 @@ static void OutNotify2(void) {
* @brief UART setup. * @brief UART setup.
* @param[in] u pointer to an UART I/O block * @param[in] u pointer to an UART I/O block
* @param[in] speed serial port speed in bits per second * @param[in] speed serial port speed in bits per second
* @param[in] mode mode flags * @param[in] mr the value for the @p MR register
* @note Must be invoked with interrupts disabled. * @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues. * @note Does not reset the I/O queues.
*/ */
void SetUSART(AT91PS_USART u, int speed, int mode) { void sam7x_set_usart(AT91PS_USART u, int speed, int mr) {
/* Disables IRQ sources and stop operations.*/ /* Disables IRQ sources and stop operations.*/
u->US_IDR = 0xFFFFFFFF; u->US_IDR = 0xFFFFFFFF;
@ -184,7 +184,8 @@ void sam7x_serial_init(int prio0, int prio1) {
AIC_EnableIT(AT91C_ID_US0); AIC_EnableIT(AT91C_ID_US0);
/* Default parameters.*/ /* Default parameters.*/
SetUSART(AT91C_BASE_US0, SAM7X_USART_BITRATE, AT91C_US_USMODE_NORMAL | sam7x_set_usart(AT91C_BASE_US0, SAM7X_USART_BITRATE,
AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK | AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS | AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE | AT91C_US_PAR_NONE |
@ -211,7 +212,8 @@ void sam7x_serial_init(int prio0, int prio1) {
AIC_EnableIT(AT91C_ID_US1); AIC_EnableIT(AT91C_ID_US1);
/* Default parameters.*/ /* Default parameters.*/
SetUSART(AT91C_BASE_US1, SAM7X_USART_BITRATE, AT91C_US_USMODE_NORMAL | sam7x_set_usart(AT91C_BASE_US1, SAM7X_USART_BITRATE,
AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK | AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS | AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE | AT91C_US_PAR_NONE |

2
ports/ARM7-AT91SAM7X/sam7x_serial.h
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@ -70,7 +70,7 @@
extern "C" { extern "C" {
#endif #endif
void sam7x_serial_init(int prio0, int prio1); void sam7x_serial_init(int prio0, int prio1);
void SetUSART(AT91PS_USART u, int speed, int mode); void sam7x_set_usart(AT91PS_USART u, int speed, int mode);
CH_IRQ_HANDLER(UART0IrqHandler); CH_IRQ_HANDLER(UART0IrqHandler);
CH_IRQ_HANDLER(UART1IrqHandler); CH_IRQ_HANDLER(UART1IrqHandler);
#ifdef __cplusplus #ifdef __cplusplus

6
ports/ARM7-LPC214x/lpc214x_serial.c
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@ -218,7 +218,7 @@ static void OutNotify2(void) {
* @note Must be invoked with interrupts disabled. * @note Must be invoked with interrupts disabled.
* @note Does not reset the I/O queues. * @note Does not reset the I/O queues.
*/ */
void SetUART(UART *u, int speed, int lcr, int fcr) { void lpc2148x_set_uart(UART *u, int speed, int lcr, int fcr) {
int div = PCLK / (speed << 4); int div = PCLK / (speed << 4);
u->UART_LCR = lcr | LCR_DLAB; u->UART_LCR = lcr | LCR_DLAB;
@ -246,7 +246,7 @@ void lpc2148x_serial_init(int vector1, int vector2) {
SetVICVector(UART0IrqHandler, vector1, SOURCE_UART0); SetVICVector(UART0IrqHandler, vector1, SOURCE_UART0);
PCONP = (PCONP & PCALL) | PCUART0; PCONP = (PCONP & PCALL) | PCUART0;
chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1);
SetUART(U0Base, lpc2148x_set_uart(U0Base,
LPC214x_UART_BITRATE, LPC214x_UART_BITRATE,
LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, LCR_WL8 | LCR_STOP1 | LCR_NOPARITY,
FCR_TRIGGER0); FCR_TRIGGER0);
@ -257,7 +257,7 @@ void lpc2148x_serial_init(int vector1, int vector2) {
SetVICVector(UART1IrqHandler, vector2, SOURCE_UART1); SetVICVector(UART1IrqHandler, vector2, SOURCE_UART1);
PCONP = (PCONP & PCALL) | PCUART1; PCONP = (PCONP & PCALL) | PCUART1;
chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
SetUART(U1Base, lpc2148x_set_uart(U1Base,
LPC214x_UART_BITRATE, LPC214x_UART_BITRATE,
LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, LCR_WL8 | LCR_STOP1 | LCR_NOPARITY,
FCR_TRIGGER0); FCR_TRIGGER0);

9
ports/ARMCM3-STM32F103/stm32_serial.c
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@ -194,7 +194,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
#if USE_STM32_USART1 #if USE_STM32_USART1
chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1);
RCC->APB2ENR |= 0x00004000; RCC->APB2ENR |= 0x00004000;
SetUSART(USART1, STM32_USART_BITRATE, 0, CR2_STOP1_BITS | CR2_LINEN, 0); stm32_set_usart(USART1, STM32_USART_BITRATE, 0,
CR2_STOP1_BITS | CR2_LINEN, 0);
GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0; GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0;
NVICEnableVector(USART1_IRQChannel, prio1); NVICEnableVector(USART1_IRQChannel, prio1);
#endif #endif
@ -202,7 +203,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
#if USE_STM32_USART2 #if USE_STM32_USART2
chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
RCC->APB1ENR |= 0x00020000; RCC->APB1ENR |= 0x00020000;
SetUSART(USART2, STM32_USART_BITRATE, 0, CR2_STOP1_BITS | CR2_LINEN, 0); stm32_set_usart(USART2, STM32_USART_BITRATE, 0,
CR2_STOP1_BITS | CR2_LINEN, 0);
GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00; GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00;
NVICEnableVector(USART2_IRQChannel, prio2); NVICEnableVector(USART2_IRQChannel, prio2);
#endif #endif
@ -210,7 +212,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
#if USE_STM32_USART3 #if USE_STM32_USART3
chFDDInit(&COM3, ib3, sizeof ib3, NULL, ob3, sizeof ob3, OutNotify3); chFDDInit(&COM3, ib3, sizeof ib3, NULL, ob3, sizeof ob3, OutNotify3);
RCC->APB1ENR |= 0x00040000; RCC->APB1ENR |= 0x00040000;
SetUSART(USART3, STM32_USART_BITRATE, 0, CR2_STOP1_BITS | CR2_LINEN, 0); stm32_set_usart(USART3, STM32_USART_BITRATE, 0,
CR2_STOP1_BITS | CR2_LINEN, 0);
GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00; GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00;
NVICEnableVector(USART3_IRQChannel, prio3); NVICEnableVector(USART3_IRQChannel, prio3);
#endif #endif

2
ports/ARMCM3-STM32F103/stm32_serial.h
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@ -146,7 +146,7 @@ extern FullDuplexDriver COM3;
extern "C" { extern "C" {
#endif #endif
void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3); void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3);
void SetUSART(USART_TypeDef *u, uint32_t speed, uint16_t cr1, void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1,
uint16_t cr2, uint16_t cr3); uint16_t cr2, uint16_t cr3);
#ifdef __cplusplus #ifdef __cplusplus
} }