git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3500 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
0435bb5b4e
commit
cef04f5f4b
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@ -321,17 +321,16 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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/* ADC setup.*/
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adcp->adc->SR = 0;
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adcp->adc->CR1 = grpp->cr1 | ADC_CR1_OVRIE | ADC_CR1_SCAN;
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adcp->adc->SMPR1 = grpp->smpr1; /* Writing SMPRx requires ADON=0. */
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adcp->adc->SMPR2 = grpp->smpr2;
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adcp->adc->CR2 = grpp->cr2 | ADC_CR2_CONT | ADC_CR2_DMA | ADC_CR2_DDS |
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ADC_CR2_ADON;
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adcp->adc->SMPR1 = grpp->smpr1;
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adcp->adc->SMPR2 = grpp->smpr2;
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adcp->adc->SQR1 = grpp->sqr1;
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adcp->adc->SQR2 = grpp->sqr2;
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adcp->adc->SQR3 = grpp->sqr3;
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/* Must wait the ADC to be ready for conversion, see 9.3.6 "Timing diagram"
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in the Reference Manual.*/
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while ((adcp->adc->SR & ADC_SR_ADONS) == 0)
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;
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/* TODO: According to section 10.3.6 of the reference manual there should
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be a 2uS delay between the ADC activation and conversion start.*/
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/* ADC start by raising ADC_CR2_SWSTART.*/
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adcp->adc->CR2 = grpp->cr2 | ADC_CR2_SWSTART | ADC_CR2_CONT | ADC_CR2_DMA |
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ADC_CR2_DDS | ADC_CR2_ADON;
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@ -373,6 +372,26 @@ void adcSTM32DisableTSVREFE(void) {
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ADC->CCR &= ~ADC_CCR_TSVREFE;
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}
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/**
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* @brief Enables the VBATE bit.
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* @details The VBATE bit is required in order to sample the VBAT channel.
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* @note This is an STM32-only functionality.
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*/
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void adcSTM32EnableVBATE(void) {
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ADC->CCR |= ADC_CCR_VBATE;
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}
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/**
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* @brief Disables the VBATE bit.
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* @details The VBATE bit is required in order to sample the VBAT channel.
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* @note This is an STM32-only functionality.
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*/
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void adcSTM32DisableVBATE(void) {
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ADC->CCR &= ~ADC_CCR_VBATE;
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}
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#endif /* HAL_USE_ADC */
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/** @} */
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@ -556,6 +556,8 @@ extern "C" {
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void adc_lld_stop_conversion(ADCDriver *adcp);
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void adcSTM32EnableTSVREFE(void);
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void adcSTM32DisableTSVREFE(void);
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void adcSTM32EnableVBATE(void);
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void adcSTM32DisableVBATE(void);
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#ifdef __cplusplus
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}
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#endif
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@ -53,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
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/*
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* ADC conversion group.
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* Mode: Linear buffer, 16 samples of 8 channels, SW triggered.
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* Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef.
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* Mode: Linear buffer, 16 samples of 1 channel, SW triggered.
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* Channels: IN10.
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*/
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static const ADCConversionGroup adcgrpcfg1 = {
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FALSE,
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@ -62,12 +62,11 @@ static const ADCConversionGroup adcgrpcfg1 = {
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NULL,
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adcerrorcallback,
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0, 0, /* CR1, CR2 */
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0, /* SMPR1 */
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ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4),
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0, /* SMPR3 */
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ADC_SMPR1_SMP_AN10(ADC_SAMPLE_3),
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0, /* SMPR2 */
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ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
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0, 0, 0, /* SQR2, SQR3, SQR4 */
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ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10)
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0, /* SQR2 */
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ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)
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};
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/*
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@ -81,16 +80,14 @@ static const ADCConversionGroup adcgrpcfg2 = {
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adccallback,
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adcerrorcallback,
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0, 0, /* CR1, CR2 */
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0, /* SMPR1 */
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ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) |
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ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192),
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0, /* SMPR3 */
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ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_56) |
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ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144),
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0, /* SMPR2 */
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ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS),
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0, 0, /* SQR2, SQR3 */
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ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT),
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ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) |
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ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) |
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ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10)
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ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT),
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ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) |
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ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) |
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ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)
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};
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/*
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@ -102,9 +99,9 @@ static msg_t Thread1(void *arg) {
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(void)arg;
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chRegSetThreadName("blinker");
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while (TRUE) {
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palSetPad(GPIOB, GPIOB_LED4);
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palSetPad(GPIOD, GPIOD_LED5);
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chThdSleepMilliseconds(500);
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palClearPad(GPIOB, GPIOB_LED4);
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palClearPad(GPIOD, GPIOD_LED5);
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chThdSleepMilliseconds(500);
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}
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}
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