MISRA fixes for high level HAL.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7738 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
Giovanni Di Sirio 2015-03-08 21:19:58 +00:00
parent 63bf265ddf
commit ce7f7103df
58 changed files with 1405 additions and 1018 deletions

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@ -28,7 +28,7 @@
#ifndef _ADC_H_
#define _ADC_H_
#if HAL_USE_ADC || defined(__DOXYGEN__)
#if (HAL_USE_ADC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -89,7 +89,7 @@ typedef enum {
* @name Low level driver helper macros
* @{
*/
#if ADC_USE_WAIT || defined(__DOXYGEN__)
#if (ADC_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Resumes a thread waiting for a conversion completion.
*
@ -260,21 +260,21 @@ extern "C" {
size_t depth);
void adcStopConversion(ADCDriver *adcp);
void adcStopConversionI(ADCDriver *adcp);
#if ADC_USE_WAIT
#if ADC_USE_WAIT == TRUE
msg_t adcConvert(ADCDriver *adcp,
const ADCConversionGroup *grpp,
adcsample_t *samples,
size_t depth);
#endif
#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if ADC_USE_MUTUAL_EXCLUSION == TRUE
void adcAcquireBus(ADCDriver *adcp);
void adcReleaseBus(ADCDriver *adcp);
#endif /* ADC_USE_MUTUAL_EXCLUSION */
#endif
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_ADC */
#endif /* HAL_USE_ADC == TRUE */
#endif /* _ADC_H_ */

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@ -28,7 +28,7 @@
#ifndef _CAN_H_
#define _CAN_H_
#if HAL_USE_CAN || defined(__DOXYGEN__)
#if (HAL_USE_CAN == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -141,12 +141,12 @@ extern "C" {
#if CAN_USE_SLEEP_MODE
void canSleep(CANDriver *canp);
void canWakeup(CANDriver *canp);
#endif /* CAN_USE_SLEEP_MODE */
#endif
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_CAN */
#endif /* HAL_USE_CAN == TRUE */
#endif /* _CAN_H_ */

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@ -28,7 +28,7 @@
#ifndef _DAC_H_
#define _DAC_H_
#if HAL_USE_DAC || defined(__DOXYGEN__)
#if (HAL_USE_DAC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -89,7 +89,7 @@ typedef enum {
* @name Low level driver helper macros
* @{
*/
#if DAC_USE_WAIT || defined(__DOXYGEN__)
#if (DAC_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Waits for operation completion.
* @details This function waits for the driver to complete the current
@ -277,19 +277,19 @@ extern "C" {
const dacsample_t *samples, size_t depth);
void dacStopConversion(DACDriver *dacp);
void dacStopConversionI(DACDriver *dacp);
#if DAC_USE_WAIT || defined(__DOXYGEN__)
#if DAC_USE_WAIT
msg_t dacConvert(DACDriver *dacp, const DACConversionGroup *grpp,
const dacsample_t *samples, size_t depth);
#endif /* DAC_USE_WAIT */
#endif
#if DAC_USE_MUTUAL_EXCLUSION
void dacAcquireBus(DACDriver *dacp);
void dacReleaseBus(DACDriver *dacp);
#endif /* DAC_USE_MUTUAL_EXCLUSION */
#endif
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_DAC */
#endif /* HAL_USE_DAC == TRUE */
#endif /* _DAC_H_ */

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@ -28,7 +28,7 @@
#ifndef _EXT_H_
#define _EXT_H_
#if HAL_USE_EXT || defined(__DOXYGEN__)
#if (HAL_USE_EXT == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -38,13 +38,13 @@
* @name EXT channel modes
* @{
*/
#define EXT_CH_MODE_EDGES_MASK 3 /**< @brief Mask of edges field. */
#define EXT_CH_MODE_DISABLED 0 /**< @brief Channel disabled. */
#define EXT_CH_MODE_RISING_EDGE 1 /**< @brief Rising edge callback. */
#define EXT_CH_MODE_FALLING_EDGE 2 /**< @brief Falling edge callback. */
#define EXT_CH_MODE_BOTH_EDGES 3 /**< @brief Both edges callback. */
#define EXT_CH_MODE_EDGES_MASK 3U /**< @brief Mask of edges field. */
#define EXT_CH_MODE_DISABLED 0U /**< @brief Channel disabled. */
#define EXT_CH_MODE_RISING_EDGE 1U /**< @brief Rising edge callback. */
#define EXT_CH_MODE_FALLING_EDGE 2U /**< @brief Falling edge callback. */
#define EXT_CH_MODE_BOTH_EDGES 3U /**< @brief Both edges callback. */
#define EXT_CH_MODE_AUTOSTART 4 /**< @brief Channel started
#define EXT_CH_MODE_AUTOSTART 4U /**< @brief Channel started
automatically on driver start. */
/** @} */
@ -66,7 +66,7 @@
typedef enum {
EXT_UNINIT = 0, /**< Not initialized. */
EXT_STOP = 1, /**< Stopped. */
EXT_ACTIVE = 2, /**< Active. */
EXT_ACTIVE = 2 /**< Active. */
} extstate_t;
/**
@ -146,7 +146,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_EXT */
#endif /* HAL_USE_EXT == TRUE */
#endif /* _EXT_H_ */

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@ -28,7 +28,7 @@
#ifndef _GPT_H_
#define _GPT_H_
#if HAL_USE_GPT || defined(__DOXYGEN__)
#if (HAL_USE_GPT == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -137,7 +137,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_GPT */
#endif /* HAL_USE_GPT == TRUE */
#endif /* _GPT_H_ */

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@ -77,9 +77,11 @@
#include "serial_usb.h"
/* Community drivers.*/
#if HAL_USE_COMMUNITY
#if defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
#if (HAL_USE_COMMUNITY == TRUE) || defined(__DOXYGEN__)
#include "hal_community.h"
#endif
#endif
/*===========================================================================*/
/* Driver constants. */

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@ -30,7 +30,7 @@
#ifndef _HAL_MMCSD_H_
#define _HAL_MMCSD_H_
#if HAL_USE_MMC_SPI || HAL_USE_SDC || defined(__DOXYGEN__)
#if (HAL_USE_MMC_SPI == TRUE) || (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -39,63 +39,63 @@
/**
* @brief Fixed block size for MMC/SD block devices.
*/
#define MMCSD_BLOCK_SIZE 512
#define MMCSD_BLOCK_SIZE 512U
/**
* @brief Mask of error bits in R1 responses.
*/
#define MMCSD_R1_ERROR_MASK 0xFDFFE008
#define MMCSD_R1_ERROR_MASK 0xFDFFE008U
/**
* @brief Fixed pattern for CMD8.
*/
#define MMCSD_CMD8_PATTERN 0x000001AA
#define MMCSD_CMD8_PATTERN 0x000001AAU
/**
* @name SD/MMC status conditions
* @{
*/
#define MMCSD_STS_IDLE 0
#define MMCSD_STS_READY 1
#define MMCSD_STS_IDENT 2
#define MMCSD_STS_STBY 3
#define MMCSD_STS_TRAN 4
#define MMCSD_STS_DATA 5
#define MMCSD_STS_RCV 6
#define MMCSD_STS_PRG 7
#define MMCSD_STS_DIS 8
#define MMCSD_STS_IDLE 0U
#define MMCSD_STS_READY 1U
#define MMCSD_STS_IDENT 2U
#define MMCSD_STS_STBY 3U
#define MMCSD_STS_TRAN 4U
#define MMCSD_STS_DATA 5U
#define MMCSD_STS_RCV 6U
#define MMCSD_STS_PRG 7U
#define MMCSD_STS_DIS 8U
/** @} */
/**
* @name SD/MMC commands
* @{
*/
#define MMCSD_CMD_GO_IDLE_STATE 0
#define MMCSD_CMD_INIT 1
#define MMCSD_CMD_ALL_SEND_CID 2
#define MMCSD_CMD_SEND_RELATIVE_ADDR 3
#define MMCSD_CMD_SET_BUS_WIDTH 6
#define MMCSD_CMD_GO_IDLE_STATE 0U
#define MMCSD_CMD_INIT 1U
#define MMCSD_CMD_ALL_SEND_CID 2U
#define MMCSD_CMD_SEND_RELATIVE_ADDR 3U
#define MMCSD_CMD_SET_BUS_WIDTH 6U
#define MMCSD_CMD_SWITCH MMCSD_CMD_SET_BUS_WIDTH
#define MMCSD_CMD_SEL_DESEL_CARD 7
#define MMCSD_CMD_SEND_IF_COND 8
#define MMCSD_CMD_SEL_DESEL_CARD 7U
#define MMCSD_CMD_SEND_IF_COND 8U
#define MMCSD_CMD_SEND_EXT_CSD MMCSD_CMD_SEND_IF_COND
#define MMCSD_CMD_SEND_CSD 9
#define MMCSD_CMD_SEND_CID 10
#define MMCSD_CMD_STOP_TRANSMISSION 12
#define MMCSD_CMD_SEND_STATUS 13
#define MMCSD_CMD_SET_BLOCKLEN 16
#define MMCSD_CMD_READ_SINGLE_BLOCK 17
#define MMCSD_CMD_READ_MULTIPLE_BLOCK 18
#define MMCSD_CMD_SET_BLOCK_COUNT 23
#define MMCSD_CMD_WRITE_BLOCK 24
#define MMCSD_CMD_WRITE_MULTIPLE_BLOCK 25
#define MMCSD_CMD_ERASE_RW_BLK_START 32
#define MMCSD_CMD_ERASE_RW_BLK_END 33
#define MMCSD_CMD_ERASE 38
#define MMCSD_CMD_APP_OP_COND 41
#define MMCSD_CMD_LOCK_UNLOCK 42
#define MMCSD_CMD_APP_CMD 55
#define MMCSD_CMD_READ_OCR 58
#define MMCSD_CMD_SEND_CSD 9U
#define MMCSD_CMD_SEND_CID 10U
#define MMCSD_CMD_STOP_TRANSMISSION 12U
#define MMCSD_CMD_SEND_STATUS 13U
#define MMCSD_CMD_SET_BLOCKLEN 16U
#define MMCSD_CMD_READ_SINGLE_BLOCK 17U
#define MMCSD_CMD_READ_MULTIPLE_BLOCK 18U
#define MMCSD_CMD_SET_BLOCK_COUNT 23U
#define MMCSD_CMD_WRITE_BLOCK 24U
#define MMCSD_CMD_WRITE_MULTIPLE_BLOCK 25U
#define MMCSD_CMD_ERASE_RW_BLK_START 32U
#define MMCSD_CMD_ERASE_RW_BLK_END 33U
#define MMCSD_CMD_ERASE 38U
#define MMCSD_CMD_APP_OP_COND 41U
#define MMCSD_CMD_LOCK_UNLOCK 42U
#define MMCSD_CMD_APP_CMD 55U
#define MMCSD_CMD_READ_OCR 58U
/** @} */
/**
@ -105,65 +105,65 @@
* @brief Slice position of values in CSD register.
*/
/* CSD for MMC */
#define MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE 127,126
#define MMCSD_CSD_MMC_SPEC_VERS_SLICE 125,122
#define MMCSD_CSD_MMC_TAAC_SLICE 119,112
#define MMCSD_CSD_MMC_NSAC_SLICE 111,104
#define MMCSD_CSD_MMC_TRAN_SPEED_SLICE 103,96
#define MMCSD_CSD_MMC_CCC_SLICE 95,84
#define MMCSD_CSD_MMC_READ_BL_LEN_SLICE 83,80
#define MMCSD_CSD_MMC_READ_BL_PARTIAL_SLICE 79,79
#define MMCSD_CSD_MMC_WRITE_BLK_MISALIGN_SLICE 78,78
#define MMCSD_CSD_MMC_READ_BLK_MISALIGN_SLICE 77,77
#define MMCSD_CSD_MMC_DSR_IMP_SLICE 76,76
#define MMCSD_CSD_MMC_C_SIZE_SLICE 73,62
#define MMCSD_CSD_MMC_VDD_R_CURR_MIN_SLICE 61,59
#define MMCSD_CSD_MMC_VDD_R_CURR_MAX_SLICE 58,56
#define MMCSD_CSD_MMC_VDD_W_CURR_MIN_SLICE 55,53
#define MMCSD_CSD_MMC_VDD_W_CURR_MAX_SLICE 52,50
#define MMCSD_CSD_MMC_C_SIZE_MULT_SLICE 49,47
#define MMCSD_CSD_MMC_ERASE_GRP_SIZE_SLICE 46,42
#define MMCSD_CSD_MMC_ERASE_GRP_MULT_SLICE 41,37
#define MMCSD_CSD_MMC_WP_GRP_SIZE_SLICE 36,32
#define MMCSD_CSD_MMC_WP_GRP_ENABLE_SLICE 31,31
#define MMCSD_CSD_MMC_DEFAULT_ECC_SLICE 30,29
#define MMCSD_CSD_MMC_R2W_FACTOR_SLICE 28,26
#define MMCSD_CSD_MMC_WRITE_BL_LEN_SLICE 25,22
#define MMCSD_CSD_MMC_WRITE_BL_PARTIAL_SLICE 21,21
#define MMCSD_CSD_MMC_CONTENT_PROT_APP_SLICE 16,16
#define MMCSD_CSD_MMC_FILE_FORMAT_GRP_SLICE 15,15
#define MMCSD_CSD_MMC_COPY_SLICE 14,14
#define MMCSD_CSD_MMC_PERM_WRITE_PROTECT_SLICE 13,13
#define MMCSD_CSD_MMC_TMP_WRITE_PROTECT_SLICE 12,12
#define MMCSD_CSD_MMC_FILE_FORMAT_SLICE 11,10
#define MMCSD_CSD_MMC_ECC_SLICE 9,8
#define MMCSD_CSD_MMC_CRC_SLICE 7,1
#define MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE 127U,126U
#define MMCSD_CSD_MMC_SPEC_VERS_SLICE 125U,122U
#define MMCSD_CSD_MMC_TAAC_SLICE 119U,112U
#define MMCSD_CSD_MMC_NSAC_SLICE 111U,104U
#define MMCSD_CSD_MMC_TRAN_SPEED_SLICE 103U,96U
#define MMCSD_CSD_MMC_CCC_SLICE 95U,84U
#define MMCSD_CSD_MMC_READ_BL_LEN_SLICE 83U,80U
#define MMCSD_CSD_MMC_READ_BL_PARTIAL_SLICE 79U,79U
#define MMCSD_CSD_MMC_WRITE_BLK_MISALIGN_SLICE 78U,78U
#define MMCSD_CSD_MMC_READ_BLK_MISALIGN_SLICE 77U,77U
#define MMCSD_CSD_MMC_DSR_IMP_SLICE 76U,76U
#define MMCSD_CSD_MMC_C_SIZE_SLICE 73U,62U
#define MMCSD_CSD_MMC_VDD_R_CURR_MIN_SLICE 61U,59U
#define MMCSD_CSD_MMC_VDD_R_CURR_MAX_SLICE 58U,56U
#define MMCSD_CSD_MMC_VDD_W_CURR_MIN_SLICE 55U,53U
#define MMCSD_CSD_MMC_VDD_W_CURR_MAX_SLICE 52U,50U
#define MMCSD_CSD_MMC_C_SIZE_MULT_SLICE 49U,47U
#define MMCSD_CSD_MMC_ERASE_GRP_SIZE_SLICE 46U,42U
#define MMCSD_CSD_MMC_ERASE_GRP_MULT_SLICE 41U,37U
#define MMCSD_CSD_MMC_WP_GRP_SIZE_SLICE 36U,32U
#define MMCSD_CSD_MMC_WP_GRP_ENABLE_SLICE 31U,31U
#define MMCSD_CSD_MMC_DEFAULT_ECC_SLICE 30U,29U
#define MMCSD_CSD_MMC_R2W_FACTOR_SLICE 28U,26U
#define MMCSD_CSD_MMC_WRITE_BL_LEN_SLICE 25U,22U
#define MMCSD_CSD_MMC_WRITE_BL_PARTIAL_SLICE 21U,21U
#define MMCSD_CSD_MMC_CONTENT_PROT_APP_SLICE 16U,16U
#define MMCSD_CSD_MMC_FILE_FORMAT_GRP_SLICE 15U,15U
#define MMCSD_CSD_MMC_COPY_SLICE 14U,14U
#define MMCSD_CSD_MMC_PERM_WRITE_PROTECT_SLICE 13U,13U
#define MMCSD_CSD_MMC_TMP_WRITE_PROTECT_SLICE 12U,12U
#define MMCSD_CSD_MMC_FILE_FORMAT_SLICE 11U,10U
#define MMCSD_CSD_MMC_ECC_SLICE 9U,8U
#define MMCSD_CSD_MMC_CRC_SLICE 7U,1U
/* CSD version 2.0 */
#define MMCSD_CSD_20_CRC_SLICE 7,1
#define MMCSD_CSD_20_FILE_FORMAT_SLICE 11,10
#define MMCSD_CSD_20_TMP_WRITE_PROTECT_SLICE 12,12
#define MMCSD_CSD_20_PERM_WRITE_PROTECT_SLICE 13,13
#define MMCSD_CSD_20_COPY_SLICE 14,14
#define MMCSD_CSD_20_FILE_FORMAT_GRP_SLICE 15,15
#define MMCSD_CSD_20_WRITE_BL_PARTIAL_SLICE 21,21
#define MMCSD_CSD_20_WRITE_BL_LEN_SLICE 25,12
#define MMCSD_CSD_20_R2W_FACTOR_SLICE 28,26
#define MMCSD_CSD_20_WP_GRP_ENABLE_SLICE 31,31
#define MMCSD_CSD_20_WP_GRP_SIZE_SLICE 38,32
#define MMCSD_CSD_20_ERASE_SECTOR_SIZE_SLICE 45,39
#define MMCSD_CSD_20_ERASE_BLK_EN_SLICE 46,46
#define MMCSD_CSD_20_C_SIZE_SLICE 69,48
#define MMCSD_CSD_20_DSR_IMP_SLICE 76,76
#define MMCSD_CSD_20_READ_BLK_MISALIGN_SLICE 77,77
#define MMCSD_CSD_20_WRITE_BLK_MISALIGN_SLICE 78,78
#define MMCSD_CSD_20_READ_BL_PARTIAL_SLICE 79,79
#define MMCSD_CSD_20_READ_BL_LEN_SLICE 83,80
#define MMCSD_CSD_20_CCC_SLICE 95,84
#define MMCSD_CSD_20_TRANS_SPEED_SLICE 103,96
#define MMCSD_CSD_20_NSAC_SLICE 111,104
#define MMCSD_CSD_20_TAAC_SLICE 119,112
#define MMCSD_CSD_20_CSD_STRUCTURE_SLICE 127,126
#define MMCSD_CSD_20_CRC_SLICE 7U,1U
#define MMCSD_CSD_20_FILE_FORMAT_SLICE 11U,10U
#define MMCSD_CSD_20_TMP_WRITE_PROTECT_SLICE 12U,12U
#define MMCSD_CSD_20_PERM_WRITE_PROTECT_SLICE 13U,13U
#define MMCSD_CSD_20_COPY_SLICE 14U,14U
#define MMCSD_CSD_20_FILE_FORMAT_GRP_SLICE 15U,15U
#define MMCSD_CSD_20_WRITE_BL_PARTIAL_SLICE 21U,21U
#define MMCSD_CSD_20_WRITE_BL_LEN_SLICE 25U,12U
#define MMCSD_CSD_20_R2W_FACTOR_SLICE 28U,26U
#define MMCSD_CSD_20_WP_GRP_ENABLE_SLICE 31U,31U
#define MMCSD_CSD_20_WP_GRP_SIZE_SLICE 38U,32U
#define MMCSD_CSD_20_ERASE_SECTOR_SIZE_SLICE 45U,39U
#define MMCSD_CSD_20_ERASE_BLK_EN_SLICE 46U,46U
#define MMCSD_CSD_20_C_SIZE_SLICE 69U,48U
#define MMCSD_CSD_20_DSR_IMP_SLICE 76U,76U
#define MMCSD_CSD_20_READ_BLK_MISALIGN_SLICE 77U,77U
#define MMCSD_CSD_20_WRITE_BLK_MISALIGN_SLICE 78U,78U
#define MMCSD_CSD_20_READ_BL_PARTIAL_SLICE 79U,79U
#define MMCSD_CSD_20_READ_BL_LEN_SLICE 83U,80U
#define MMCSD_CSD_20_CCC_SLICE 95U,84U
#define MMCSD_CSD_20_TRANS_SPEED_SLICE 103U,96U
#define MMCSD_CSD_20_NSAC_SLICE 111U,104U
#define MMCSD_CSD_20_TAAC_SLICE 119U,112U
#define MMCSD_CSD_20_CSD_STRUCTURE_SLICE 127U,126U
/* CSD version 1.0 */
#define MMCSD_CSD_10_CRC_SLICE MMCSD_CSD_20_CRC_SLICE
@ -179,17 +179,17 @@
#define MMCSD_CSD_10_WP_GRP_SIZE_SLICE MMCSD_CSD_20_WP_GRP_SIZE_SLICE
#define MMCSD_CSD_10_ERASE_SECTOR_SIZE_SLICE MMCSD_CSD_20_ERASE_SECTOR_SIZE_SLICE
#define MMCSD_CSD_10_ERASE_BLK_EN_SLICE MMCSD_CSD_20_ERASE_BLK_EN_SLICE
#define MMCSD_CSD_10_C_SIZE_MULT_SLICE 49,47
#define MMCSD_CSD_10_VDD_W_CURR_MAX_SLICE 52,50
#define MMCSD_CSD_10_VDD_W_CURR_MIN_SLICE 55,53
#define MMCSD_CSD_10_VDD_R_CURR_MAX_SLICE 58,56
#define MMCSD_CSD_10_VDD_R_CURR_MIX_SLICE 61,59
#define MMCSD_CSD_10_C_SIZE_SLICE 73,62
#define MMCSD_CSD_10_C_SIZE_MULT_SLICE 49U,47U
#define MMCSD_CSD_10_VDD_W_CURR_MAX_SLICE 52U,50U
#define MMCSD_CSD_10_VDD_W_CURR_MIN_SLICE 55U,53U
#define MMCSD_CSD_10_VDD_R_CURR_MAX_SLICE 58U,56U
#define MMCSD_CSD_10_VDD_R_CURR_MIX_SLICE 61U,59U
#define MMCSD_CSD_10_C_SIZE_SLICE 73U,62U
#define MMCSD_CSD_10_DSR_IMP_SLICE MMCSD_CSD_20_DSR_IMP_SLICE
#define MMCSD_CSD_10_READ_BLK_MISALIGN_SLICE MMCSD_CSD_20_READ_BLK_MISALIGN_SLICE
#define MMCSD_CSD_10_WRITE_BLK_MISALIGN_SLICE MMCSD_CSD_20_WRITE_BLK_MISALIGN_SLICE
#define MMCSD_CSD_10_READ_BL_PARTIAL_SLICE MMCSD_CSD_20_READ_BL_PARTIAL_SLICE
#define MMCSD_CSD_10_READ_BL_LEN_SLICE 83, 80
#define MMCSD_CSD_10_READ_BL_LEN_SLICE 83U,80U
#define MMCSD_CSD_10_CCC_SLICE MMCSD_CSD_20_CCC_SLICE
#define MMCSD_CSD_10_TRANS_SPEED_SLICE MMCSD_CSD_20_TRANS_SPEED_SLICE
#define MMCSD_CSD_10_NSAC_SLICE MMCSD_CSD_20_NSAC_SLICE
@ -204,35 +204,35 @@
* @brief Slice position of values in CID register.
*/
/* CID for SDC */
#define MMCSD_CID_SDC_CRC_SLICE 7,1
#define MMCSD_CID_SDC_MDT_M_SLICE 11,8
#define MMCSD_CID_SDC_MDT_Y_SLICE 19,12
#define MMCSD_CID_SDC_PSN_SLICE 55,24
#define MMCSD_CID_SDC_PRV_M_SLICE 59,56
#define MMCSD_CID_SDC_PRV_N_SLICE 63,60
#define MMCSD_CID_SDC_PNM0_SLICE 71,64
#define MMCSD_CID_SDC_PNM1_SLICE 79,72
#define MMCSD_CID_SDC_PNM2_SLICE 87,80
#define MMCSD_CID_SDC_PNM3_SLICE 95,88
#define MMCSD_CID_SDC_PNM4_SLICE 103,96
#define MMCSD_CID_SDC_OID_SLICE 119,104
#define MMCSD_CID_SDC_MID_SLICE 127,120
#define MMCSD_CID_SDC_CRC_SLICE 7U,1U
#define MMCSD_CID_SDC_MDT_M_SLICE 11U,8U
#define MMCSD_CID_SDC_MDT_Y_SLICE 19U,12U
#define MMCSD_CID_SDC_PSN_SLICE 55U,24U
#define MMCSD_CID_SDC_PRV_M_SLICE 59U,56U
#define MMCSD_CID_SDC_PRV_N_SLICE 63U,60U
#define MMCSD_CID_SDC_PNM0_SLICE 71U,64U
#define MMCSD_CID_SDC_PNM1_SLICE 79U,72U
#define MMCSD_CID_SDC_PNM2_SLICE 87U,80U
#define MMCSD_CID_SDC_PNM3_SLICE 95U,88U
#define MMCSD_CID_SDC_PNM4_SLICE 103U,96U
#define MMCSD_CID_SDC_OID_SLICE 119U,104U
#define MMCSD_CID_SDC_MID_SLICE 127U,120U
/* CID for MMC */
#define MMCSD_CID_MMC_CRC_SLICE 7,1
#define MMCSD_CID_MMC_MDT_Y_SLICE 11,8
#define MMCSD_CID_MMC_MDT_M_SLICE 15,12
#define MMCSD_CID_MMC_PSN_SLICE 47,16
#define MMCSD_CID_MMC_PRV_M_SLICE 51,48
#define MMCSD_CID_MMC_PRV_N_SLICE 55,52
#define MMCSD_CID_MMC_PNM0_SLICE 63,56
#define MMCSD_CID_MMC_PNM1_SLICE 71,64
#define MMCSD_CID_MMC_PNM2_SLICE 79,72
#define MMCSD_CID_MMC_PNM3_SLICE 87,80
#define MMCSD_CID_MMC_PNM4_SLICE 95,88
#define MMCSD_CID_MMC_PNM5_SLICE 103,96
#define MMCSD_CID_MMC_OID_SLICE 119,104
#define MMCSD_CID_MMC_MID_SLICE 127,120
#define MMCSD_CID_MMC_CRC_SLICE 7U,1U
#define MMCSD_CID_MMC_MDT_Y_SLICE 11U,8U
#define MMCSD_CID_MMC_MDT_M_SLICE 15U,12U
#define MMCSD_CID_MMC_PSN_SLICE 47U,16U
#define MMCSD_CID_MMC_PRV_M_SLICE 51U,48U
#define MMCSD_CID_MMC_PRV_N_SLICE 55U,52U
#define MMCSD_CID_MMC_PNM0_SLICE 63U,56U
#define MMCSD_CID_MMC_PNM1_SLICE 71U,64U
#define MMCSD_CID_MMC_PNM2_SLICE 79U,72U
#define MMCSD_CID_MMC_PNM3_SLICE 87U,80U
#define MMCSD_CID_MMC_PNM4_SLICE 95U,88U
#define MMCSD_CID_MMC_PNM5_SLICE 103U,96U
#define MMCSD_CID_MMC_OID_SLICE 119U,104U
#define MMCSD_CID_MMC_MID_SLICE 127U,120U
/** @} */
/*===========================================================================*/
@ -435,21 +435,21 @@ typedef struct {
*
* @param[in] r1 the r1 response
*/
#define MMCSD_R1_ERROR(r1) (((r1) & MMCSD_R1_ERROR_MASK) != 0)
#define MMCSD_R1_ERROR(r1) (((r1) & MMCSD_R1_ERROR_MASK) != 0U)
/**
* @brief Returns the status field of an R1 response.
*
* @param[in] r1 the r1 response
*/
#define MMCSD_R1_STS(r1) (((r1) >> 9) & 15)
#define MMCSD_R1_STS(r1) (((r1) >> 9U) & 15U)
/**
* @brief Evaluates to @p TRUE if the R1 response indicates a locked card.
*
* @param[in] r1 the r1 response
*/
#define MMCSD_R1_IS_CARD_LOCKED(r1) (((r1) >> 21) & 1)
#define MMCSD_R1_IS_CARD_LOCKED(r1) ((((r1) >> 21U) & 1U) != 0U)
/** @} */
/**
@ -494,7 +494,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_MMC_SPI || HAL_USE_MMC_SDC*/
#endif /* HAL_USE_MMC_SPI == TRUE || HAL_USE_MMC_SDC == TRUE */
#endif /* _HAL_MMCSD_H_ */

View File

@ -30,7 +30,8 @@
/* The ChibiOS/RT kernel provides the following definitions by itself, this
check is performed in order to avoid conflicts. */
#if !defined(_CHIBIOS_RT_) || !CH_CFG_USE_QUEUES || defined(__DOXYGEN__)
#if !defined(_CHIBIOS_RT_) || (CH_CFG_USE_QUEUES == FALSE) || \
defined(__DOXYGEN__)
/**
* @name Queue functions returned status value
@ -85,9 +86,12 @@ struct io_queue {
* @param[in] qp pointer to a @p io_queue_t structure.
* @return The buffer size.
*
* @iclass
* @xclass
*/
#define qSizeI(qp) ((size_t)((qp)->q_top - (qp)->q_buffer))
#define qSizeX(qp) \
/*lint -save -e9033 [10.8] The cast is safe.*/ \
((size_t)((qp)->q_top - (qp)->q_buffer)) \
/*lint -restore*/
/**
* @brief Queue space.
@ -149,7 +153,7 @@ typedef io_queue_t input_queue_t;
*
* @iclass
*/
#define iqGetEmptyI(iqp) (qSizeI(iqp) - qSpaceI(iqp))
#define iqGetEmptyI(iqp) (qSizeX(iqp) - qSpaceI(iqp))
/**
* @brief Evaluates to @p TRUE if the specified input queue is empty.
@ -161,7 +165,7 @@ typedef io_queue_t input_queue_t;
*
* @iclass
*/
#define iqIsEmptyI(iqp) ((bool)(qSpaceI(iqp) <= 0))
#define iqIsEmptyI(iqp) ((bool)(qSpaceI(iqp) == 0U))
/**
* @brief Evaluates to @p TRUE if the specified input queue is full.
@ -174,7 +178,7 @@ typedef io_queue_t input_queue_t;
* @iclass
*/
#define iqIsFullI(iqp) ((bool)(((iqp)->q_wrptr == (iqp)->q_rdptr) && \
((iqp)->q_counter != 0)))
((iqp)->q_counter != 0U)))
/**
* @brief Input queue read.
@ -204,7 +208,7 @@ typedef io_queue_t input_queue_t;
*/
#define _INPUTQUEUE_DATA(name, buffer, size, inotify, link) { \
NULL, \
0, \
0U, \
(uint8_t *)(buffer), \
(uint8_t *)(buffer) + (size), \
(uint8_t *)(buffer), \
@ -252,7 +256,7 @@ typedef io_queue_t output_queue_t;
*
* @iclass
*/
#define oqGetFullI(oqp) (qSizeI(oqp) - qSpaceI(oqp))
#define oqGetFullI(oqp) (qSizeX(oqp) - qSpaceI(oqp))
/**
* @brief Returns the empty space into an output queue.
@ -276,7 +280,7 @@ typedef io_queue_t output_queue_t;
* @iclass
*/
#define oqIsEmptyI(oqp) ((bool)(((oqp)->q_wrptr == (oqp)->q_rdptr) && \
((oqp)->q_counter != 0)))
((oqp)->q_counter != 0U)))
/**
* @brief Evaluates to @p TRUE if the specified output queue is full.
@ -288,7 +292,7 @@ typedef io_queue_t output_queue_t;
*
* @iclass
*/
#define oqIsFullI(oqp) ((bool)(qSpaceI(oqp) <= 0))
#define oqIsFullI(oqp) ((bool)(qSpaceI(oqp) == 0U))
/**
* @brief Output queue write.
@ -350,17 +354,17 @@ extern "C" {
qnotify_t infy, void *link);
void iqResetI(input_queue_t *iqp);
msg_t iqPutI(input_queue_t *iqp, uint8_t b);
msg_t iqGetTimeout(input_queue_t *iqp, systime_t time);
msg_t iqGetTimeout(input_queue_t *iqp, systime_t timeout);
size_t iqReadTimeout(input_queue_t *iqp, uint8_t *bp,
size_t n, systime_t time);
size_t n, systime_t timeout);
void oqObjectInit(output_queue_t *oqp, uint8_t *bp, size_t size,
qnotify_t onfy, void *link);
void oqResetI(output_queue_t *oqp);
msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t time);
msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t timeout);
msg_t oqGetI(output_queue_t *oqp);
size_t oqWriteTimeout(output_queue_t *oqp, const uint8_t *bp,
size_t n, systime_t time);
size_t n, systime_t timeout);
#ifdef __cplusplus
}
#endif
@ -369,7 +373,7 @@ extern "C" {
/* If ChibiOS is being used and its own queues subsystem is activated then
this module will use the ChibiOS queues code.*/
#define qSizeI(qp) chQSizeI(qp)
#define qSizeX(qp) chQSizeX(qp)
#define qSpaceI(qp) chQSpaceI(qp)
#define qGetLink(qp) chQGetLinkX(qp)
#define iqGetFullI(iqp) chIQGetFullI(iqp)
@ -395,7 +399,7 @@ extern "C" {
#define oqGetI(oqp) chOQGetI(oqp)
#define oqWriteTimeout(oqp, bp, n, time) chOQWriteTimeout(oqp, bp, n, time)
#endif /* defined(_CHIBIOS_RT_) && CH_CFG_USE_QUEUES */
#endif /* defined(_CHIBIOS_RT_) || (CH_CFG_USE_QUEUES == FALSE) */
#endif /* _HAL_QUEUES_H_ */

View File

@ -32,7 +32,7 @@
#ifndef _I2C_H_
#define _I2C_H_
#if HAL_USE_I2C || defined(__DOXYGEN__)
#if (HAL_USE_I2C == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -153,16 +153,16 @@ extern "C" {
i2caddr_t addr,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout);
#if I2C_USE_MUTUAL_EXCLUSION
#if I2C_USE_MUTUAL_EXCLUSION == TRUE
void i2cAcquireBus(I2CDriver *i2cp);
void i2cReleaseBus(I2CDriver *i2cp);
#endif /* I2C_USE_MUTUAL_EXCLUSION */
#endif
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_I2C */
#endif /* HAL_USE_I2C == TRUE */
#endif /* _I2C_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _I2S_H_
#define _I2S_H_
#if HAL_USE_I2S || defined(__DOXYGEN__)
#if (HAL_USE_I2S == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -163,7 +163,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_I2S */
#endif /* HAL_USE_I2S == TRUE */
#endif /* _I2S_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _ICU_H_
#define _ICU_H_
#if HAL_USE_ICU || defined(__DOXYGEN__)
#if (HAL_USE_ICU == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -54,7 +54,7 @@ typedef enum {
ICU_STOP = 1, /**< Stopped. */
ICU_READY = 2, /**< Ready. */
ICU_WAITING = 3, /**< Waiting for first front. */
ICU_ACTIVE = 4, /**< First front detected. */
ICU_ACTIVE = 4 /**< First front detected. */
} icustate_t;
/**
@ -88,8 +88,8 @@ typedef void (*icucallback_t)(ICUDriver *icup);
*/
#define icuStartCaptureI(icup) do { \
icu_lld_start_capture(icup); \
icup->state = ICU_WAITING; \
} while (0)
(icup)->state = ICU_WAITING; \
} while (false)
/**
* @brief Stops the input capture.
@ -100,8 +100,8 @@ typedef void (*icucallback_t)(ICUDriver *icup);
*/
#define icuStopCaptureI(icup) do { \
icu_lld_stop_capture(icup); \
icup->state = ICU_READY; \
} while (0)
(icup)->state = ICU_READY; \
} while (false)
/**
* @brief Enables notifications.
@ -234,7 +234,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_ICU */
#endif /* HAL_USE_ICU == TRUE */
#endif /* _ICU_H_ */

View File

@ -27,7 +27,7 @@
#ifndef _MAC_H_
#define _MAC_H_
#if HAL_USE_MAC || defined(__DOXYGEN__)
#if (HAL_USE_MAC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -96,7 +96,7 @@ typedef struct MACDriver MACDriver;
*
* @api
*/
#if MAC_USE_EVENTS || defined(__DOXYGEN__)
#if (MAC_USE_EVENTS == TRUE) || defined(__DOXYGEN__)
#define macGetReceiveEventSource(macp) (&(macp)->rdevent)
#endif
@ -131,7 +131,7 @@ typedef struct MACDriver MACDriver;
#define macReadReceiveDescriptor(rdp, buf, size) \
mac_lld_read_receive_descriptor(rdp, buf, size)
#if MAC_USE_ZERO_COPY || defined(__DOXYGEN__)
#if (MAC_USE_ZERO_COPY == TRUE) || defined(__DOXYGEN__)
/**
* @brief Returns a pointer to the next transmit buffer in the descriptor
* chain.
@ -187,18 +187,18 @@ extern "C" {
void macSetAddress(MACDriver *macp, const uint8_t *p);
msg_t macWaitTransmitDescriptor(MACDriver *macp,
MACTransmitDescriptor *tdp,
systime_t time);
systime_t timeout);
void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp);
msg_t macWaitReceiveDescriptor(MACDriver *macp,
MACReceiveDescriptor *rdp,
systime_t time);
systime_t timeout);
void macReleaseReceiveDescriptor(MACReceiveDescriptor *rdp);
bool macPollLinkStatus(MACDriver *macp);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_MAC */
#endif /* HAL_USE_MAC == TRUE */
#endif /* _MAC_H_ */

View File

@ -28,16 +28,16 @@
#ifndef _MMC_SPI_H_
#define _MMC_SPI_H_
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
#if (HAL_USE_MMC_SPI == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define MMC_CMD0_RETRY 10
#define MMC_CMD1_RETRY 100
#define MMC_ACMD41_RETRY 100
#define MMC_WAIT_DATA 10000
#define MMC_CMD0_RETRY 10U
#define MMC_CMD1_RETRY 100U
#define MMC_ACMD41_RETRY 100U
#define MMC_WAIT_DATA 10000U
/*===========================================================================*/
/* Driver pre-compile time settings. */
@ -64,7 +64,7 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !HAL_USE_SPI || !SPI_USE_WAIT
#if (HAL_USE_SPI == FALSE) || (SPI_USE_WAIT == FALSE)
#error "MMC_SPI driver requires HAL_USE_SPI and SPI_USE_WAIT"
#endif
@ -191,7 +191,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_MMC_SPI */
#endif /* HAL_USE_MMC_SPI == TRUE */
#endif /* _MMC_SPI_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _PAL_H_
#define _PAL_H_
#if HAL_USE_PAL || defined(__DOXYGEN__)
#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -549,6 +549,6 @@ extern "C" {
#endif /* _PAL_H_ */
#endif /* HAL_USE_PAL */
#endif /* HAL_USE_PAL == TRUE */
/** @} */

View File

@ -28,7 +28,7 @@
#ifndef _PWM_H_
#define _PWM_H_
#if HAL_USE_PWM || defined(__DOXYGEN__)
#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -41,22 +41,22 @@
/**
* @brief Standard output modes mask.
*/
#define PWM_OUTPUT_MASK 0x0F
#define PWM_OUTPUT_MASK 0x0FU
/**
* @brief Output not driven, callback only.
*/
#define PWM_OUTPUT_DISABLED 0x00
#define PWM_OUTPUT_DISABLED 0x00U
/**
* @brief Positive PWM logic, active is logic level one.
*/
#define PWM_OUTPUT_ACTIVE_HIGH 0x01
#define PWM_OUTPUT_ACTIVE_HIGH 0x01U
/**
* @brief Inverse PWM logic, active is logic level zero.
*/
#define PWM_OUTPUT_ACTIVE_LOW 0x02
#define PWM_OUTPUT_ACTIVE_LOW 0x02U
/** @} */
/*===========================================================================*/
@ -77,7 +77,7 @@
typedef enum {
PWM_UNINIT = 0, /**< Not initialized. */
PWM_STOP = 1, /**< Stopped. */
PWM_READY = 2, /**< Ready. */
PWM_READY = 2 /**< Ready. */
} pwmstate_t;
/**
@ -192,9 +192,9 @@ typedef void (*pwmcallback_t)(PWMDriver *pwmp);
* @iclass
*/
#define pwmEnableChannelI(pwmp, channel, width) do { \
(pwmp)->enabled |= 1 << (channel); \
(pwmp)->enabled |= ((pwmchnmsk_t)1U << (pwmchnmsk_t)(channel)); \
pwm_lld_enable_channel(pwmp, channel, width); \
} while (0)
} while (false)
/**
* @brief Disables a PWM channel.
@ -211,9 +211,9 @@ typedef void (*pwmcallback_t)(PWMDriver *pwmp);
* @iclass
*/
#define pwmDisableChannelI(pwmp, channel) do { \
(pwmp)->enabled &= ~(1 << (channel)); \
(pwmp)->enabled &= ~((pwmchnmsk_t)1U << (pwmchnmsk_t)(channel)); \
pwm_lld_disable_channel(pwmp, channel); \
} while (0)
} while (false)
/**
* @brief Returns a PWM channel status.
@ -225,7 +225,7 @@ typedef void (*pwmcallback_t)(PWMDriver *pwmp);
* @iclass
*/
#define pwmIsChannelEnabledI(pwmp, channel) \
((bool)((pwmp)->enabled & (1 << (channel))))
(((pwmp)->enabled & ((pwmchnmsk_t)1U << (pwmchnmsk_t)(channel))) != 0U)
/**
* @brief Enables the periodic activation edge notification.
@ -304,7 +304,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_PWM */
#endif /* HAL_USE_PWM == TRUE */
#endif /* _PWM_H_ */

View File

@ -32,9 +32,11 @@
#ifndef _RTC_H_
#define _RTC_H_
#if HAL_USE_RTC || defined(__DOXYGEN__)
#if (HAL_USE_RTC == TRUE) || defined(__DOXYGEN__)
/*lint -save -e829 [21.10] The header is required.*/
#include <time.h>
/*lint -restore*/
/*===========================================================================*/
/* Driver constants. */
@ -43,32 +45,32 @@
/**
* @brief Base year of the calendar.
*/
#define RTC_BASE_YEAR 1980
#define RTC_BASE_YEAR 1980U
/**
* @name Date/Time bit masks for FAT format
* @{
*/
#define RTC_FAT_TIME_SECONDS_MASK 0x0000001F
#define RTC_FAT_TIME_MINUTES_MASK 0x000007E0
#define RTC_FAT_TIME_HOURS_MASK 0x0000F800
#define RTC_FAT_DATE_DAYS_MASK 0x001F0000
#define RTC_FAT_DATE_MONTHS_MASK 0x01E00000
#define RTC_FAT_DATE_YEARS_MASK 0xFE000000
#define RTC_FAT_TIME_SECONDS_MASK 0x0000001FU
#define RTC_FAT_TIME_MINUTES_MASK 0x000007E0U
#define RTC_FAT_TIME_HOURS_MASK 0x0000F800U
#define RTC_FAT_DATE_DAYS_MASK 0x001F0000U
#define RTC_FAT_DATE_MONTHS_MASK 0x01E00000U
#define RTC_FAT_DATE_YEARS_MASK 0xFE000000U
/** @} */
/**
* @name Day of week encoding
* @{
*/
#define RTC_DAY_CATURDAY 0
#define RTC_DAY_MONDAY 1
#define RTC_DAY_TUESDAY 2
#define RTC_DAY_WEDNESDAY 3
#define RTC_DAY_THURSDAY 4
#define RTC_DAY_FRIDAY 5
#define RTC_DAY_SATURDAY 6
#define RTC_DAY_SUNDAY 7
#define RTC_DAY_CATURDAY 0U
#define RTC_DAY_MONDAY 1U
#define RTC_DAY_TUESDAY 2U
#define RTC_DAY_WEDNESDAY 3U
#define RTC_DAY_THURSDAY 4U
#define RTC_DAY_FRIDAY 5U
#define RTC_DAY_SATURDAY 6U
#define RTC_DAY_SUNDAY 7U
/** @} */
/*===========================================================================*/
@ -92,12 +94,14 @@ typedef struct RTCDriver RTCDriver;
* @brief Type of a structure representing an RTC date/time stamp.
*/
typedef struct {
/*lint -save -e46 [6.1] In this case uint32_t is fine.*/
uint32_t year: 8; /**< @brief Years since 1980. */
uint32_t month: 4; /**< @brief Months 1..12. */
uint32_t dstflag: 1; /**< @brief DST correction flag. */
uint32_t dayofweek: 3; /**< @brief Day of week 1..7. */
uint32_t day: 5; /**< @brief Day of the month 1..31. */
uint32_t millisecond: 27; /**< @brief Milliseconds since midnight.*/
/*lint -restore*/
} RTCDateTime;
#include "rtc_lld.h"
@ -123,7 +127,7 @@ extern "C" {
const RTCAlarm *alarmspec);
void rtcGetAlarm(RTCDriver *rtcp, rtcalarm_t alarm, RTCAlarm *alarmspec);
#endif
#if RTC_SUPPORTS_CALLBACKS
#if RTC_SUPPORTS_CALLBACKS == TRUE
void rtcSetCallback(RTCDriver *rtcp, rtccb_t callback);
#endif
void rtcConvertDateTimeToStructTm(const RTCDateTime *timespec,
@ -136,7 +140,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_RTC */
#endif /* HAL_USE_RTC == TRUE */
#endif /* _RTC_H_ */
/** @} */

View File

@ -28,7 +28,7 @@
#ifndef _SDC_H_
#define _SDC_H_
#if HAL_USE_SDC || defined(__DOXYGEN__)
#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -38,27 +38,27 @@
* @name SD card types
* @{
*/
#define SDC_MODE_CARDTYPE_MASK 0xF /**< @brief Card type mask. */
#define SDC_MODE_CARDTYPE_SDV11 0
#define SDC_MODE_CARDTYPE_SDV20 1
#define SDC_MODE_CARDTYPE_MMC 2
#define SDC_MODE_HIGH_CAPACITY 0x10
#define SDC_MODE_CARDTYPE_MASK 0xFU
#define SDC_MODE_CARDTYPE_SDV11 0U
#define SDC_MODE_CARDTYPE_SDV20 1U
#define SDC_MODE_CARDTYPE_MMC 2U
#define SDC_MODE_HIGH_CAPACITY 0x10U
/** @} */
/**
* @name SDC bus error conditions
* @{
*/
#define SDC_NO_ERROR 0
#define SDC_CMD_CRC_ERROR 1
#define SDC_DATA_CRC_ERROR 2
#define SDC_DATA_TIMEOUT 4
#define SDC_COMMAND_TIMEOUT 8
#define SDC_TX_UNDERRUN 16
#define SDC_RX_OVERRUN 32
#define SDC_STARTBIT_ERROR 64
#define SDC_OVERFLOW_ERROR 128
#define SDC_UNHANDLED_ERROR 0xFFFFFFFF
#define SDC_NO_ERROR 0U
#define SDC_CMD_CRC_ERROR 1U
#define SDC_DATA_CRC_ERROR 2U
#define SDC_DATA_TIMEOUT 4U
#define SDC_COMMAND_TIMEOUT 8U
#define SDC_TX_UNDERRUN 16U
#define SDC_RX_OVERRUN 32U
#define SDC_STARTBIT_ERROR 64U
#define SDC_OVERFLOW_ERROR 128U
#define SDC_UNHANDLED_ERROR 0xFFFFFFFFU
/** @} */
/*===========================================================================*/
@ -119,7 +119,7 @@ typedef enum {
*/
typedef enum {
SDC_CLK_25MHz = 0,
SDC_CLK_50MHz,
SDC_CLK_50MHz
} sdcbusclk_t;
#include "sdc_lld.h"
@ -179,9 +179,9 @@ extern "C" {
bool sdcConnect(SDCDriver *sdcp);
bool sdcDisconnect(SDCDriver *sdcp);
bool sdcRead(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buffer, uint32_t n);
uint8_t *buf, uint32_t n);
bool sdcWrite(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buffer, uint32_t n);
const uint8_t *buf, uint32_t n);
sdcflags_t sdcGetAndClearErrors(SDCDriver *sdcp);
bool sdcSync(SDCDriver *sdcp);
bool sdcGetInfo(SDCDriver *sdcp, BlockDeviceInfo *bdip);
@ -190,7 +190,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_SDC */
#endif /* HAL_USE_SDC == TRUE */
#endif /* _SDC_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _SERIAL_H_
#define _SERIAL_H_
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -304,7 +304,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_SERIAL */
#endif /* HAL_USE_SERIAL == TRUE */
#endif /* _SERIAL_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _SERIAL_USB_H_
#define _SERIAL_USB_H_
#if HAL_USE_SERIAL_USB || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL_USB == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -130,7 +130,7 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !HAL_USE_USB
#if HAL_USE_USB == FALSE
#error "Serial over USB Driver requires HAL_USE_USB"
#endif
@ -245,7 +245,7 @@ struct SerialUSBDriver {
extern "C" {
#endif
void sduInit(void);
void sduObjectInit(SerialUSBDriver *sdp);
void sduObjectInit(SerialUSBDriver *sdup);
void sduStart(SerialUSBDriver *sdup, const SerialUSBConfig *config);
void sduStop(SerialUSBDriver *sdup);
void sduConfigureHookI(SerialUSBDriver *sdup);
@ -257,7 +257,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_SERIAL_USB */
#endif /* HAL_USE_SERIAL_USB == TRUE */
#endif /* _SERIAL_USB_H_ */

View File

@ -28,7 +28,7 @@
#ifndef _SPI_H_
#define _SPI_H_
#if HAL_USE_SPI || defined(__DOXYGEN__)
#if (HAL_USE_SPI == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -211,7 +211,7 @@ typedef enum {
* @name Low level driver helper macros
* @{
*/
#if SPI_USE_WAIT || defined(__DOXYGEN__)
#if (SPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Waits for operation completion.
* @details This function waits for the driver to complete the current
@ -224,7 +224,7 @@ typedef enum {
*
* @notapi
*/
#define _spi_wait_s(spip) osalThreadSuspendS(&(spip)->thread)
#define _spi_wait_s(spip) (void) osalThreadSuspendS(&(spip)->thread)
/**
* @brief Wakes up the waiting thread.
@ -293,16 +293,16 @@ extern "C" {
void spiExchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf);
void spiSend(SPIDriver *spip, size_t n, const void *txbuf);
void spiReceive(SPIDriver *spip, size_t n, void *rxbuf);
#endif /* SPI_USE_WAIT */
#endif
#if SPI_USE_MUTUAL_EXCLUSION
void spiAcquireBus(SPIDriver *spip);
void spiReleaseBus(SPIDriver *spip);
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#endif
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SPI */
#endif /* HAL_USE_SPI == TRUE */
#endif /* _SPI_H_ */

View File

@ -87,9 +87,9 @@
extern "C" {
#endif
void stInit(void);
void stStartAlarm(systime_t time);
void stStartAlarm(systime_t abstime);
void stStopAlarm(void);
void stSetAlarm(systime_t time);
void stSetAlarm(systime_t abstime);
systime_t stGetAlarm(void);
#ifdef __cplusplus
}

View File

@ -28,7 +28,7 @@
#ifndef _UART_H_
#define _UART_H_
#if HAL_USE_UART || defined(__DOXYGEN__)
#if (HAL_USE_UART == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
@ -114,7 +114,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_UART */
#endif /* HAL_USE_UART == TRUE */
#endif /* _UART_H_ */

View File

@ -28,54 +28,54 @@
#ifndef _USB_H_
#define _USB_H_
#if HAL_USE_USB || defined(__DOXYGEN__)
#if (HAL_USE_USB == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define USB_ENDPOINT_OUT(ep) (ep)
#define USB_ENDPOINT_IN(ep) ((ep) | 0x80)
#define USB_ENDPOINT_IN(ep) ((ep) | 0x80U)
#define USB_RTYPE_DIR_MASK 0x80
#define USB_RTYPE_DIR_HOST2DEV 0x00
#define USB_RTYPE_DIR_DEV2HOST 0x80
#define USB_RTYPE_TYPE_MASK 0x60
#define USB_RTYPE_TYPE_STD 0x00
#define USB_RTYPE_TYPE_CLASS 0x20
#define USB_RTYPE_TYPE_VENDOR 0x40
#define USB_RTYPE_TYPE_RESERVED 0x60
#define USB_RTYPE_RECIPIENT_MASK 0x1F
#define USB_RTYPE_RECIPIENT_DEVICE 0x00
#define USB_RTYPE_RECIPIENT_INTERFACE 0x01
#define USB_RTYPE_RECIPIENT_ENDPOINT 0x02
#define USB_RTYPE_RECIPIENT_OTHER 0x03
#define USB_RTYPE_DIR_MASK 0x80U
#define USB_RTYPE_DIR_HOST2DEV 0x00U
#define USB_RTYPE_DIR_DEV2HOST 0x80U
#define USB_RTYPE_TYPE_MASK 0x60U
#define USB_RTYPE_TYPE_STD 0x00U
#define USB_RTYPE_TYPE_CLASS 0x20U
#define USB_RTYPE_TYPE_VENDOR 0x40U
#define USB_RTYPE_TYPE_RESERVED 0x60U
#define USB_RTYPE_RECIPIENT_MASK 0x1FU
#define USB_RTYPE_RECIPIENT_DEVICE 0x00U
#define USB_RTYPE_RECIPIENT_INTERFACE 0x01U
#define USB_RTYPE_RECIPIENT_ENDPOINT 0x02U
#define USB_RTYPE_RECIPIENT_OTHER 0x03U
#define USB_REQ_GET_STATUS 0
#define USB_REQ_CLEAR_FEATURE 1
#define USB_REQ_SET_FEATURE 3
#define USB_REQ_SET_ADDRESS 5
#define USB_REQ_GET_DESCRIPTOR 6
#define USB_REQ_SET_DESCRIPTOR 7
#define USB_REQ_GET_CONFIGURATION 8
#define USB_REQ_SET_CONFIGURATION 9
#define USB_REQ_GET_INTERFACE 10
#define USB_REQ_SET_INTERFACE 11
#define USB_REQ_SYNCH_FRAME 12
#define USB_REQ_GET_STATUS 0U
#define USB_REQ_CLEAR_FEATURE 1U
#define USB_REQ_SET_FEATURE 3U
#define USB_REQ_SET_ADDRESS 5U
#define USB_REQ_GET_DESCRIPTOR 6U
#define USB_REQ_SET_DESCRIPTOR 7U
#define USB_REQ_GET_CONFIGURATION 8U
#define USB_REQ_SET_CONFIGURATION 9U
#define USB_REQ_GET_INTERFACE 10U
#define USB_REQ_SET_INTERFACE 11U
#define USB_REQ_SYNCH_FRAME 12U
#define USB_DESCRIPTOR_DEVICE 1
#define USB_DESCRIPTOR_CONFIGURATION 2
#define USB_DESCRIPTOR_STRING 3
#define USB_DESCRIPTOR_INTERFACE 4
#define USB_DESCRIPTOR_ENDPOINT 5
#define USB_DESCRIPTOR_DEVICE_QUALIFIER 6
#define USB_DESCRIPTOR_OTHER_SPEED_CFG 7
#define USB_DESCRIPTOR_INTERFACE_POWER 8
#define USB_DESCRIPTOR_INTERFACE_ASSOCIATION 11
#define USB_DESCRIPTOR_DEVICE 1U
#define USB_DESCRIPTOR_CONFIGURATION 2U
#define USB_DESCRIPTOR_STRING 3U
#define USB_DESCRIPTOR_INTERFACE 4U
#define USB_DESCRIPTOR_ENDPOINT 5U
#define USB_DESCRIPTOR_DEVICE_QUALIFIER 6U
#define USB_DESCRIPTOR_OTHER_SPEED_CFG 7U
#define USB_DESCRIPTOR_INTERFACE_POWER 8U
#define USB_DESCRIPTOR_INTERFACE_ASSOCIATION 11U
#define USB_FEATURE_ENDPOINT_HALT 0
#define USB_FEATURE_DEVICE_REMOTE_WAKEUP 1
#define USB_FEATURE_TEST_MODE 2
#define USB_FEATURE_ENDPOINT_HALT 0U
#define USB_FEATURE_DEVICE_REMOTE_WAKEUP 1U
#define USB_FEATURE_TEST_MODE 2U
#define USB_EARLY_SET_ADDRESS 0
#define USB_LATE_SET_ADDRESS 1
@ -104,20 +104,20 @@
* @brief Helper macro for word values into descriptor strings.
*/
#define USB_DESC_WORD(w) \
(uint8_t)((w) & 255), \
(uint8_t)(((w) >> 8) & 255)
(uint8_t)((w) & 255U), \
(uint8_t)(((w) >> 8) & 255U)
/**
* @brief Helper macro for BCD values into descriptor strings.
*/
#define USB_DESC_BCD(bcd) \
(uint8_t)((bcd) & 255), \
(uint8_t)((bcd) & 255U), \
(uint8_t)(((bcd) >> 8) & 255)
/*
* @define Device Descriptor size.
*/
#define USB_DESC_DEVICE_SIZE 18
#define USB_DESC_DEVICE_SIZE 18U
/**
* @brief Device Descriptor helper macro.
@ -144,7 +144,7 @@
/**
* @brief Configuration Descriptor size.
*/
#define USB_DESC_CONFIGURATION_SIZE 9
#define USB_DESC_CONFIGURATION_SIZE 9U
/**
* @brief Configuration Descriptor helper macro.
@ -164,7 +164,7 @@
/**
* @brief Interface Descriptor size.
*/
#define USB_DESC_INTERFACE_SIZE 9
#define USB_DESC_INTERFACE_SIZE 9U
/**
* @brief Interface Descriptor helper macro.
@ -186,7 +186,7 @@
/**
* @brief Interface Association Descriptor size.
*/
#define USB_DESC_INTERFACE_ASSOCIATION_SIZE 8
#define USB_DESC_INTERFACE_ASSOCIATION_SIZE 8U
/**
* @brief Interface Association Descriptor helper macro.
@ -207,7 +207,7 @@
/**
* @brief Endpoint Descriptor size.
*/
#define USB_DESC_ENDPOINT_SIZE 7
#define USB_DESC_ENDPOINT_SIZE 7U
/**
* @brief Endpoint Descriptor helper macro.
@ -226,13 +226,13 @@
* @name Endpoint types and settings
* @{
*/
#define USB_EP_MODE_TYPE 0x0003 /**< Endpoint type mask. */
#define USB_EP_MODE_TYPE_CTRL 0x0000 /**< Control endpoint. */
#define USB_EP_MODE_TYPE_ISOC 0x0001 /**< Isochronous endpoint. */
#define USB_EP_MODE_TYPE_BULK 0x0002 /**< Bulk endpoint. */
#define USB_EP_MODE_TYPE_INTR 0x0003 /**< Interrupt endpoint. */
#define USB_EP_MODE_LINEAR_BUFFER 0x0000 /**< Linear buffer mode. */
#define USB_EP_MODE_QUEUE_BUFFER 0x0010 /**< Queue buffer mode. */
#define USB_EP_MODE_TYPE 0x0003U /**< Endpoint type mask. */
#define USB_EP_MODE_TYPE_CTRL 0x0000U /**< Control endpoint. */
#define USB_EP_MODE_TYPE_ISOC 0x0001U /**< Isochronous endpoint. */
#define USB_EP_MODE_TYPE_BULK 0x0002U /**< Bulk endpoint. */
#define USB_EP_MODE_TYPE_INTR 0x0003U /**< Interrupt endpoint. */
#define USB_EP_MODE_LINEAR_BUFFER 0x0000U /**< Linear buffer mode. */
#define USB_EP_MODE_QUEUE_BUFFER 0x0010U /**< Queue buffer mode. */
/** @} */
/*===========================================================================*/
@ -382,15 +382,6 @@ typedef const USBDescriptor * (*usbgetdescriptor_t)(USBDriver *usbp,
*/
#define usbGetDriverStateI(usbp) ((usbp)->state)
/**
* @brief Fetches a 16 bits word value from an USB message.
*
* @param[in] p pointer to the 16 bits word
*
* @notapi
*/
#define usbFetchWord(p) ((uint16_t)*(p) | ((uint16_t)*((p) + 1) << 8))
/**
* @brief Connects the USB device.
*
@ -430,7 +421,8 @@ typedef const USBDescriptor * (*usbgetdescriptor_t)(USBDriver *usbp,
*
* @iclass
*/
#define usbGetTransmitStatusI(usbp, ep) ((usbp)->transmitting & (1 << (ep)))
#define usbGetTransmitStatusI(usbp, ep) \
(((usbp)->transmitting & (uint16_t)((unsigned)1U << (unsigned)(ep))) != 0U)
/**
* @brief Returns the status of an OUT endpoint.
@ -443,7 +435,8 @@ typedef const USBDescriptor * (*usbgetdescriptor_t)(USBDriver *usbp,
*
* @iclass
*/
#define usbGetReceiveStatusI(usbp, ep) ((usbp)->receiving & (1 << (ep)))
#define usbGetReceiveStatusI(usbp, ep) \
(((usbp)->receiving & (uint16_t)((unsigned)1U << (unsigned)(ep))) != 0U)
/**
* @brief Returns the exact size of a receive transaction.
@ -508,8 +501,9 @@ typedef const USBDescriptor * (*usbgetdescriptor_t)(USBDriver *usbp,
* @notapi
*/
#define _usb_isr_invoke_event_cb(usbp, evt) { \
if (((usbp)->config->event_cb) != NULL) \
if (((usbp)->config->event_cb) != NULL) { \
(usbp)->config->event_cb(usbp, evt); \
} \
}
/**
@ -520,8 +514,9 @@ typedef const USBDescriptor * (*usbgetdescriptor_t)(USBDriver *usbp,
* @notapi
*/
#define _usb_isr_invoke_sof_cb(usbp) { \
if (((usbp)->config->sof_cb) != NULL) \
if (((usbp)->config->sof_cb) != NULL) { \
(usbp)->config->sof_cb(usbp); \
} \
}
/**
@ -598,7 +593,7 @@ extern "C" {
}
#endif
#endif /* HAL_USE_USB */
#endif /* HAL_USE_USB == TRUE */
#endif /* _USB_H_ */

View File

@ -52,6 +52,11 @@
*/
#define USB_SET_ADDRESS_MODE USB_EARLY_SET_ADDRESS
/**
* @brief Method for set address acknowledge.
*/
#define USB_SET_ADDRESS_ACK_HANDLING USB_SET_ADDRESS_ACK_SW
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/

View File

@ -48,6 +48,11 @@
*/
#define USB_SET_ADDRESS_MODE USB_LATE_SET_ADDRESS
/**
* @brief Method for set address acknowledge.
*/
#define USB_SET_ADDRESS_ACK_HANDLING USB_SET_ADDRESS_ACK_SW
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_ADC || defined(__DOXYGEN__)
#if (HAL_USE_ADC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -75,12 +75,12 @@ void adcObjectInit(ADCDriver *adcp) {
adcp->samples = NULL;
adcp->depth = 0;
adcp->grpp = NULL;
#if ADC_USE_WAIT
#if ADC_USE_WAIT == TRUE
adcp->thread = NULL;
#endif /* ADC_USE_WAIT */
#if ADC_USE_MUTUAL_EXCLUSION
#endif
#if ADC_USE_MUTUAL_EXCLUSION == TRUE
osalMutexObjectInit(&adcp->mutex);
#endif /* ADC_USE_MUTUAL_EXCLUSION */
#endif
#if defined(ADC_DRIVER_EXT_INIT_HOOK)
ADC_DRIVER_EXT_INIT_HOOK(adcp);
#endif
@ -178,7 +178,7 @@ void adcStartConversionI(ADCDriver *adcp,
osalDbgCheckClassI();
osalDbgCheck((adcp != NULL) && (grpp != NULL) && (samples != NULL) &&
((depth == 1) || ((depth & 1) == 0)));
((depth == 1U) || ((depth & 1U) == 0U)));
osalDbgAssert((adcp->state == ADC_READY) ||
(adcp->state == ADC_COMPLETE) ||
(adcp->state == ADC_ERROR),
@ -244,7 +244,7 @@ void adcStopConversionI(ADCDriver *adcp) {
}
}
#if ADC_USE_WAIT || defined(__DOXYGEN__)
#if (ADC_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Performs an ADC conversion.
* @details Performs a synchronous conversion operation.
@ -281,9 +281,9 @@ msg_t adcConvert(ADCDriver *adcp,
osalSysUnlock();
return msg;
}
#endif /* ADC_USE_WAIT */
#endif /* ADC_USE_WAIT == TRUE */
#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if (ADC_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
/**
* @brief Gains exclusive access to the ADC peripheral.
* @details This function tries to gain ownership to the ADC bus, if the bus
@ -317,8 +317,8 @@ void adcReleaseBus(ADCDriver *adcp) {
osalMutexUnlock(&adcp->mutex);
}
#endif /* ADC_USE_MUTUAL_EXCLUSION */
#endif /* ADC_USE_MUTUAL_EXCLUSION == TRUE */
#endif /* HAL_USE_ADC */
#endif /* HAL_USE_ADC == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_CAN || defined(__DOXYGEN__)
#if (HAL_USE_CAN == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -77,10 +77,10 @@ void canObjectInit(CANDriver *canp) {
osalEventObjectInit(&canp->rxfull_event);
osalEventObjectInit(&canp->txempty_event);
osalEventObjectInit(&canp->error_event);
#if CAN_USE_SLEEP_MODE
#if CAN_USE_SLEEP_MODE == TRUE
osalEventObjectInit(&canp->sleep_event);
osalEventObjectInit(&canp->wakeup_event);
#endif /* CAN_USE_SLEEP_MODE */
#endif
}
/**
@ -104,8 +104,9 @@ void canStart(CANDriver *canp, const CANConfig *config) {
(canp->state == CAN_STARTING) ||
(canp->state == CAN_READY),
"invalid state");
while (canp->state == CAN_STARTING)
while (canp->state == CAN_STARTING) {
osalThreadSleepS(1);
}
if (canp->state == CAN_STOP) {
canp->config = config;
can_lld_start(canp);
@ -163,12 +164,14 @@ msg_t canTransmit(CANDriver *canp,
systime_t timeout) {
osalDbgCheck((canp != NULL) && (ctfp != NULL) &&
(mailbox <= CAN_TX_MAILBOXES));
(mailbox <= (canmbx_t)CAN_TX_MAILBOXES));
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
"invalid state");
/*lint -save -e9007 [13.5] Right side is supposed to be pure.*/
while ((canp->state == CAN_SLEEP) || !can_lld_is_tx_empty(canp, mailbox)) {
/*lint -restore*/
msg_t msg = osalThreadEnqueueTimeoutS(&canp->txqueue, timeout);
if (msg != MSG_OK) {
osalSysUnlock();
@ -208,12 +211,14 @@ msg_t canReceive(CANDriver *canp,
systime_t timeout) {
osalDbgCheck((canp != NULL) && (crfp != NULL) &&
(mailbox < CAN_RX_MAILBOXES));
(mailbox < (canmbx_t)CAN_RX_MAILBOXES));
osalSysLock();
osalDbgAssert((canp->state == CAN_READY) || (canp->state == CAN_SLEEP),
"invalid state");
/*lint -save -e9007 [13.5] Right side is supposed to be pure.*/
while ((canp->state == CAN_SLEEP) || !can_lld_is_rx_nonempty(canp, mailbox)) {
/*lint -restore*/
msg_t msg = osalThreadEnqueueTimeoutS(&canp->rxqueue, timeout);
if (msg != MSG_OK) {
osalSysUnlock();
@ -225,7 +230,7 @@ msg_t canReceive(CANDriver *canp,
return MSG_OK;
}
#if CAN_USE_SLEEP_MODE || defined(__DOXYGEN__)
#if (CAN_USE_SLEEP_MODE == TRUE) || defined(__DOXYGEN__)
/**
* @brief Enters the sleep mode.
* @details This function puts the CAN driver in sleep mode and broadcasts
@ -276,8 +281,8 @@ void canWakeup(CANDriver *canp) {
}
osalSysUnlock();
}
#endif /* CAN_USE_SLEEP_MODE */
#endif /* CAN_USE_SLEEP_MODE == TRUE */
#endif /* HAL_USE_CAN */
#endif /* HAL_USE_CAN == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_DAC || defined(__DOXYGEN__)
#if (HAL_USE_DAC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -74,10 +74,10 @@ void dacObjectInit(DACDriver *dacp) {
dacp->config = NULL;
#if DAC_USE_WAIT
dacp->thread = NULL;
#endif /* DAC_USE_WAIT */
#endif
#if DAC_USE_MUTUAL_EXCLUSION
osalMutexObjectInit(&dacp->mutex);
#endif /* DAC_USE_MUTUAL_EXCLUSION */
#endif
#if defined(DAC_DRIVER_EXT_INIT_HOOK)
DAC_DRIVER_EXT_INIT_HOOK(dacp);
#endif
@ -252,7 +252,7 @@ void dacStopConversionI(DACDriver *dacp) {
}
}
#if DAC_USE_WAIT || defined(__DOXYGEN__)
#if (DAC_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Performs a DAC conversion.
* @details Performs a synchronous conversion operation.
@ -290,9 +290,9 @@ msg_t dacConvert(DACDriver *dacp,
osalSysUnlock();
return msg;
}
#endif /* DAC_USE_WAIT */
#endif /* DAC_USE_WAIT == TRUE */
#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if (DAC_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
/**
* @brief Gains exclusive access to the DAC bus.
* @details This function tries to gain ownership to the DAC bus, if the bus
@ -326,8 +326,8 @@ void dacReleaseBus(DACDriver *dacp) {
osalMutexUnlock(&dacp->mutex);
}
#endif /* DAC_USE_MUTUAL_EXCLUSION */
#endif /* DAC_USE_MUTUAL_EXCLUSION == TRUE */
#endif /* HAL_USE_DAC */
#endif /* HAL_USE_DAC == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__)
#if (HAL_USE_EXT == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -127,7 +127,7 @@ void extStop(EXTDriver *extp) {
*/
void extChannelEnable(EXTDriver *extp, expchannel_t channel) {
osalDbgCheck((extp != NULL) && (channel < EXT_MAX_CHANNELS));
osalDbgCheck((extp != NULL) && (channel < (expchannel_t)EXT_MAX_CHANNELS));
osalSysLock();
osalDbgAssert((extp->state == EXT_ACTIVE) &&
@ -149,7 +149,7 @@ void extChannelEnable(EXTDriver *extp, expchannel_t channel) {
*/
void extChannelDisable(EXTDriver *extp, expchannel_t channel) {
osalDbgCheck((extp != NULL) && (channel < EXT_MAX_CHANNELS));
osalDbgCheck((extp != NULL) && (channel < (expchannel_t)EXT_MAX_CHANNELS));
osalSysLock();
osalDbgAssert((extp->state == EXT_ACTIVE) &&
@ -183,7 +183,7 @@ void extSetChannelModeI(EXTDriver *extp,
EXTChannelConfig *oldcp;
osalDbgCheck((extp != NULL) &&
(channel < EXT_MAX_CHANNELS) &&
(channel < (expchannel_t)EXT_MAX_CHANNELS) &&
(extcp != NULL));
osalDbgAssert(extp->state == EXT_ACTIVE, "invalid state");
@ -198,6 +198,6 @@ void extSetChannelModeI(EXTDriver *extp,
ext_lld_channel_enable(extp, channel);
}
#endif /* HAL_USE_EXT */
#endif /* HAL_USE_EXT == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_GPT || defined(__DOXYGEN__)
#if (HAL_USE_GPT == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -260,6 +260,6 @@ void gptPolledDelay(GPTDriver *gptp, gptcnt_t interval) {
gptp->state = GPT_READY;
}
#endif /* HAL_USE_GPT */
#endif /* HAL_USE_GPT == TRUE */
/** @} */

View File

@ -64,64 +64,69 @@ void halInit(void) {
/* Platform low level initializations.*/
hal_lld_init();
#if HAL_USE_PAL || defined(__DOXYGEN__)
#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__)
palInit(&pal_default_config);
#endif
#if HAL_USE_ADC || defined(__DOXYGEN__)
#if (HAL_USE_ADC == TRUE) || defined(__DOXYGEN__)
adcInit();
#endif
#if HAL_USE_CAN || defined(__DOXYGEN__)
#if (HAL_USE_CAN == TRUE) || defined(__DOXYGEN__)
canInit();
#endif
#if HAL_USE_EXT || defined(__DOXYGEN__)
#if (HAL_USE_DAC == TRUE) || defined(__DOXYGEN__)
dacInit();
#endif
#if (HAL_USE_EXT == TRUE) || defined(__DOXYGEN__)
extInit();
#endif
#if HAL_USE_GPT || defined(__DOXYGEN__)
#if (HAL_USE_GPT == TRUE) || defined(__DOXYGEN__)
gptInit();
#endif
#if HAL_USE_I2C || defined(__DOXYGEN__)
#if (HAL_USE_I2C == TRUE) || defined(__DOXYGEN__)
i2cInit();
#endif
#if HAL_USE_I2S || defined(__DOXYGEN__)
#if (HAL_USE_I2S == TRUE) || defined(__DOXYGEN__)
i2sInit();
#endif
#if HAL_USE_ICU || defined(__DOXYGEN__)
#if (HAL_USE_ICU == TRUE) || defined(__DOXYGEN__)
icuInit();
#endif
#if HAL_USE_MAC || defined(__DOXYGEN__)
#if (HAL_USE_MAC == TRUE) || defined(__DOXYGEN__)
macInit();
#endif
#if HAL_USE_PWM || defined(__DOXYGEN__)
#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
pwmInit();
#endif
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__)
sdInit();
#endif
#if HAL_USE_SDC || defined(__DOXYGEN__)
#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__)
sdcInit();
#endif
#if HAL_USE_SPI || defined(__DOXYGEN__)
#if (HAL_USE_SPI == TRUE) || defined(__DOXYGEN__)
spiInit();
#endif
#if HAL_USE_UART || defined(__DOXYGEN__)
#if (HAL_USE_UART == TRUE) || defined(__DOXYGEN__)
uartInit();
#endif
#if HAL_USE_USB || defined(__DOXYGEN__)
#if (HAL_USE_USB == TRUE) || defined(__DOXYGEN__)
usbInit();
#endif
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
#if (HAL_USE_MMC_SPI == TRUE) || defined(__DOXYGEN__)
mmcInit();
#endif
#if HAL_USE_SERIAL_USB || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL_USB == TRUE) || defined(__DOXYGEN__)
sduInit();
#endif
#if HAL_USE_RTC || defined(__DOXYGEN__)
#if (HAL_USE_RTC == TRUE) || defined(__DOXYGEN__)
rtcInit();
#endif
/* Community driver overlay initialization.*/
#if HAL_USE_COMMUNITY || defined(__DOXYGEN__)
#if defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
#if (HAL_USE_COMMUNITY == TRUE) || defined(__DOXYGEN__)
halCommunityInit();
#endif
#endif
/* Board specific initialization.*/

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_MMC_SPI || HAL_USE_SDC || defined(__DOXYGEN__)
#if (HAL_USE_MMC_SPI == TRUE) || (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -67,17 +67,18 @@ uint32_t _mmcsd_get_slice(const uint32_t *data,
unsigned startidx, endidx, startoff;
uint32_t endmask;
osalDbgCheck((end >= start) && ((end - start) < 32));
osalDbgCheck((end >= start) && ((end - start) < 32U));
startidx = start / 32;
startoff = start % 32;
endidx = end / 32;
endmask = (1 << ((end % 32) + 1)) - 1;
startidx = start / 32U;
startoff = start % 32U;
endidx = end / 32U;
endmask = ((uint32_t)1U << ((end % 32U) + 1U)) - 1U;
/* One or two pieces?*/
if (startidx < endidx)
if (startidx < endidx) {
return (data[startidx] >> startoff) | /* Two pieces case. */
((data[endidx] & endmask) << (32 - startoff));
((data[endidx] & endmask) << (32U - startoff));
}
return (data[startidx] & endmask) >> startoff; /* One piece case. */
}
@ -103,14 +104,15 @@ uint32_t _mmcsd_get_capacity(const uint32_t *csd) {
a = _mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_SLICE);
b = _mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_MULT_SLICE);
c = _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BL_LEN_SLICE);
return (a + 1) << (b + 2) << (c - 9); /* 2^9 == MMCSD_BLOCK_SIZE. */
return ((a + 1U) << (b + 2U)) << (c - 9U); /* 2^9 == MMCSD_BLOCK_SIZE. */
case 1:
/* CSD version 2.0.*/
return 1024 * (_mmcsd_get_slice(csd, MMCSD_CSD_20_C_SIZE_SLICE) + 1);
return 1024U * (_mmcsd_get_slice(csd, MMCSD_CSD_20_C_SIZE_SLICE) + 1U);
default:
/* Reserved value detected.*/
return 0;
break;
}
return 0U;
}
/**
@ -127,10 +129,10 @@ uint32_t _mmcsd_get_capacity_ext(const uint8_t *ext_csd) {
osalDbgCheck(NULL != ext_csd);
return (ext_csd[215] << 24) +
(ext_csd[214] << 16) +
(ext_csd[213] << 8) +
ext_csd[212];
return ((uint32_t)ext_csd[215] << 24U) +
((uint32_t)ext_csd[214] << 16U) +
((uint32_t)ext_csd[213] << 8U) +
(uint32_t)ext_csd[212];
}
/**
@ -148,18 +150,19 @@ void _mmcsd_unpack_sdc_cid(const MMCSDBlockDevice *sdcp,
osalDbgCheck((NULL != sdcp) && (NULL != cidsdc));
cid = sdcp->cid;
cidsdc->crc = _mmcsd_get_slice(cid, MMCSD_CID_SDC_CRC_SLICE);
cidsdc->mdt_y = _mmcsd_get_slice(cid, MMCSD_CID_SDC_MDT_Y_SLICE) + 2000;
cidsdc->mdt_m = _mmcsd_get_slice(cid, MMCSD_CID_SDC_MDT_M_SLICE);
cidsdc->mid = _mmcsd_get_slice(cid, MMCSD_CID_SDC_MID_SLICE);
cidsdc->oid = _mmcsd_get_slice(cid, MMCSD_CID_SDC_OID_SLICE);
cidsdc->pnm[4] = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM0_SLICE);
cidsdc->pnm[3] = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM1_SLICE);
cidsdc->pnm[2] = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM2_SLICE);
cidsdc->pnm[1] = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM3_SLICE);
cidsdc->pnm[0] = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM4_SLICE);
cidsdc->prv_n = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PRV_N_SLICE);
cidsdc->prv_m = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PRV_M_SLICE);
cidsdc->crc = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_SDC_CRC_SLICE);
cidsdc->mdt_y = (uint16_t)_mmcsd_get_slice(cid, MMCSD_CID_SDC_MDT_Y_SLICE) +
2000U;
cidsdc->mdt_m = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_SDC_MDT_M_SLICE);
cidsdc->mid = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_SDC_MID_SLICE);
cidsdc->oid = (uint16_t)_mmcsd_get_slice(cid, MMCSD_CID_SDC_OID_SLICE);
cidsdc->pnm[4] = (char) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM0_SLICE);
cidsdc->pnm[3] = (char) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM1_SLICE);
cidsdc->pnm[2] = (char) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM2_SLICE);
cidsdc->pnm[1] = (char) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM3_SLICE);
cidsdc->pnm[0] = (char) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PNM4_SLICE);
cidsdc->prv_n = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PRV_N_SLICE);
cidsdc->prv_m = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_SDC_PRV_M_SLICE);
cidsdc->psn = _mmcsd_get_slice(cid, MMCSD_CID_SDC_PSN_SLICE);
}
@ -178,19 +181,20 @@ void _mmcsd_unpack_mmc_cid(const MMCSDBlockDevice *sdcp,
osalDbgCheck((NULL != sdcp) && (NULL != cidmmc));
cid = sdcp->cid;
cidmmc->crc = _mmcsd_get_slice(cid, MMCSD_CID_MMC_CRC_SLICE);
cidmmc->mdt_y = _mmcsd_get_slice(cid, MMCSD_CID_MMC_MDT_Y_SLICE) + 1997;
cidmmc->mdt_m = _mmcsd_get_slice(cid, MMCSD_CID_MMC_MDT_M_SLICE);
cidmmc->mid = _mmcsd_get_slice(cid, MMCSD_CID_MMC_MID_SLICE);
cidmmc->oid = _mmcsd_get_slice(cid, MMCSD_CID_MMC_OID_SLICE);
cidmmc->pnm[5] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM0_SLICE);
cidmmc->pnm[4] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM1_SLICE);
cidmmc->pnm[3] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM2_SLICE);
cidmmc->pnm[2] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM3_SLICE);
cidmmc->pnm[1] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM4_SLICE);
cidmmc->pnm[0] = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM5_SLICE);
cidmmc->prv_n = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PRV_N_SLICE);
cidmmc->prv_m = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PRV_M_SLICE);
cidmmc->crc = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_MMC_CRC_SLICE);
cidmmc->mdt_y = (uint16_t)_mmcsd_get_slice(cid, MMCSD_CID_MMC_MDT_Y_SLICE) +
1997U;
cidmmc->mdt_m = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_MMC_MDT_M_SLICE);
cidmmc->mid = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_MMC_MID_SLICE);
cidmmc->oid = (uint16_t)_mmcsd_get_slice(cid, MMCSD_CID_MMC_OID_SLICE);
cidmmc->pnm[5] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM0_SLICE);
cidmmc->pnm[4] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM1_SLICE);
cidmmc->pnm[3] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM2_SLICE);
cidmmc->pnm[2] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM3_SLICE);
cidmmc->pnm[1] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM4_SLICE);
cidmmc->pnm[0] = (char) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PNM5_SLICE);
cidmmc->prv_n = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PRV_N_SLICE);
cidmmc->prv_m = (uint8_t) _mmcsd_get_slice(cid, MMCSD_CID_MMC_PRV_M_SLICE);
cidmmc->psn = _mmcsd_get_slice(cid, MMCSD_CID_MMC_PSN_SLICE);
}
@ -209,37 +213,37 @@ void _mmcsd_unpack_csd_mmc(const MMCSDBlockDevice *sdcp,
osalDbgCheck((NULL != sdcp) && (NULL != csdmmc));
csd = sdcp->csd;
csdmmc->c_size = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_C_SIZE_SLICE);
csdmmc->c_size_mult = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_C_SIZE_MULT_SLICE);
csdmmc->ccc = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_CCC_SLICE);
csdmmc->copy = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_COPY_SLICE);
csdmmc->crc = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_CRC_SLICE);
csdmmc->csd_structure = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE);
csdmmc->dsr_imp = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_DSR_IMP_SLICE);
csdmmc->ecc = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ECC_SLICE);
csdmmc->erase_grp_mult = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ERASE_GRP_MULT_SLICE);
csdmmc->erase_grp_size = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ERASE_GRP_SIZE_SLICE);
csdmmc->file_format = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_FILE_FORMAT_SLICE);
csdmmc->file_format_grp = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_FILE_FORMAT_GRP_SLICE);
csdmmc->nsac = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_NSAC_SLICE);
csdmmc->perm_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_PERM_WRITE_PROTECT_SLICE);
csdmmc->r2w_factor = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_R2W_FACTOR_SLICE);
csdmmc->read_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BL_LEN_SLICE);
csdmmc->read_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BL_PARTIAL_SLICE);
csdmmc->read_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BLK_MISALIGN_SLICE);
csdmmc->spec_vers = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_SPEC_VERS_SLICE);
csdmmc->taac = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TAAC_SLICE);
csdmmc->tmp_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TMP_WRITE_PROTECT_SLICE);
csdmmc->tran_speed = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TRAN_SPEED_SLICE);
csdmmc->vdd_r_curr_max = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_R_CURR_MAX_SLICE);
csdmmc->vdd_r_curr_min = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_R_CURR_MIN_SLICE);
csdmmc->vdd_w_curr_max = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_W_CURR_MAX_SLICE);
csdmmc->vdd_w_curr_min = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_W_CURR_MIN_SLICE);
csdmmc->wp_grp_enable = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WP_GRP_ENABLE_SLICE);
csdmmc->wp_grp_size = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WP_GRP_SIZE_SLICE);
csdmmc->write_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BL_LEN_SLICE);
csdmmc->write_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BL_PARTIAL_SLICE);
csdmmc->write_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BLK_MISALIGN_SLICE);
csdmmc->c_size = (uint16_t)_mmcsd_get_slice(csd, MMCSD_CSD_MMC_C_SIZE_SLICE);
csdmmc->c_size_mult = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_C_SIZE_MULT_SLICE);
csdmmc->ccc = (uint16_t)_mmcsd_get_slice(csd, MMCSD_CSD_MMC_CCC_SLICE);
csdmmc->copy = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_COPY_SLICE);
csdmmc->crc = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_CRC_SLICE);
csdmmc->csd_structure = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE);
csdmmc->dsr_imp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_DSR_IMP_SLICE);
csdmmc->ecc = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ECC_SLICE);
csdmmc->erase_grp_mult = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ERASE_GRP_MULT_SLICE);
csdmmc->erase_grp_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_ERASE_GRP_SIZE_SLICE);
csdmmc->file_format = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_FILE_FORMAT_SLICE);
csdmmc->file_format_grp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_FILE_FORMAT_GRP_SLICE);
csdmmc->nsac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_NSAC_SLICE);
csdmmc->perm_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_PERM_WRITE_PROTECT_SLICE);
csdmmc->r2w_factor = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_R2W_FACTOR_SLICE);
csdmmc->read_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BL_LEN_SLICE);
csdmmc->read_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BL_PARTIAL_SLICE);
csdmmc->read_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_READ_BLK_MISALIGN_SLICE);
csdmmc->spec_vers = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_SPEC_VERS_SLICE);
csdmmc->taac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TAAC_SLICE);
csdmmc->tmp_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TMP_WRITE_PROTECT_SLICE);
csdmmc->tran_speed = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_TRAN_SPEED_SLICE);
csdmmc->vdd_r_curr_max = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_R_CURR_MAX_SLICE);
csdmmc->vdd_r_curr_min = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_R_CURR_MIN_SLICE);
csdmmc->vdd_w_curr_max = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_W_CURR_MAX_SLICE);
csdmmc->vdd_w_curr_min = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_VDD_W_CURR_MIN_SLICE);
csdmmc->wp_grp_enable = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WP_GRP_ENABLE_SLICE);
csdmmc->wp_grp_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WP_GRP_SIZE_SLICE);
csdmmc->write_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BL_LEN_SLICE);
csdmmc->write_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BL_PARTIAL_SLICE);
csdmmc->write_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_MMC_WRITE_BLK_MISALIGN_SLICE);
}
/**
@ -257,31 +261,31 @@ void _mmcsd_unpack_csd_v10(const MMCSDBlockDevice *sdcp,
osalDbgCheck(NULL != sdcp);
csd = sdcp->csd;
csd10->c_size = _mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_SLICE);
csd10->c_size_mult = _mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_MULT_SLICE);
csd10->ccc = _mmcsd_get_slice(csd, MMCSD_CSD_10_CCC_SLICE);
csd10->copy = _mmcsd_get_slice(csd, MMCSD_CSD_10_COPY_SLICE);
csd10->crc = _mmcsd_get_slice(csd, MMCSD_CSD_10_CRC_SLICE);
csd10->csd_structure = _mmcsd_get_slice(csd, MMCSD_CSD_10_CSD_STRUCTURE_SLICE);
csd10->dsr_imp = _mmcsd_get_slice(csd, MMCSD_CSD_10_DSR_IMP_SLICE);
csd10->erase_blk_en = _mmcsd_get_slice(csd, MMCSD_CSD_10_ERASE_BLK_EN_SLICE);
csd10->erase_sector_size = _mmcsd_get_slice(csd, MMCSD_CSD_10_ERASE_SECTOR_SIZE_SLICE);
csd10->file_format = _mmcsd_get_slice(csd, MMCSD_CSD_10_FILE_FORMAT_SLICE);
csd10->file_format_grp = _mmcsd_get_slice(csd, MMCSD_CSD_10_FILE_FORMAT_GRP_SLICE);
csd10->nsac = _mmcsd_get_slice(csd, MMCSD_CSD_10_NSAC_SLICE);
csd10->perm_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_10_PERM_WRITE_PROTECT_SLICE);
csd10->r2w_factor = _mmcsd_get_slice(csd, MMCSD_CSD_10_R2W_FACTOR_SLICE);
csd10->read_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BL_LEN_SLICE);
csd10->read_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BL_PARTIAL_SLICE);
csd10->read_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BLK_MISALIGN_SLICE);
csd10->taac = _mmcsd_get_slice(csd, MMCSD_CSD_10_TAAC_SLICE);
csd10->tmp_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_10_TMP_WRITE_PROTECT_SLICE);
csd10->tran_speed = _mmcsd_get_slice(csd, MMCSD_CSD_10_TRANS_SPEED_SLICE);
csd10->wp_grp_enable = _mmcsd_get_slice(csd, MMCSD_CSD_10_WP_GRP_ENABLE_SLICE);
csd10->wp_grp_size = _mmcsd_get_slice(csd, MMCSD_CSD_10_WP_GRP_SIZE_SLICE);
csd10->write_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BL_LEN_SLICE);
csd10->write_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BL_PARTIAL_SLICE);
csd10->write_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BLK_MISALIGN_SLICE);
csd10->c_size = (uint16_t)_mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_SLICE);
csd10->c_size_mult = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_C_SIZE_MULT_SLICE);
csd10->ccc = (uint16_t)_mmcsd_get_slice(csd, MMCSD_CSD_10_CCC_SLICE);
csd10->copy = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_COPY_SLICE);
csd10->crc = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_CRC_SLICE);
csd10->csd_structure = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_CSD_STRUCTURE_SLICE);
csd10->dsr_imp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_DSR_IMP_SLICE);
csd10->erase_blk_en = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_ERASE_BLK_EN_SLICE);
csd10->erase_sector_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_ERASE_SECTOR_SIZE_SLICE);
csd10->file_format = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_FILE_FORMAT_SLICE);
csd10->file_format_grp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_FILE_FORMAT_GRP_SLICE);
csd10->nsac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_NSAC_SLICE);
csd10->perm_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_PERM_WRITE_PROTECT_SLICE);
csd10->r2w_factor = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_R2W_FACTOR_SLICE);
csd10->read_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BL_LEN_SLICE);
csd10->read_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BL_PARTIAL_SLICE);
csd10->read_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_READ_BLK_MISALIGN_SLICE);
csd10->taac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_TAAC_SLICE);
csd10->tmp_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_TMP_WRITE_PROTECT_SLICE);
csd10->tran_speed = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_TRANS_SPEED_SLICE);
csd10->wp_grp_enable = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_WP_GRP_ENABLE_SLICE);
csd10->wp_grp_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_WP_GRP_SIZE_SLICE);
csd10->write_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BL_LEN_SLICE);
csd10->write_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BL_PARTIAL_SLICE);
csd10->write_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_10_WRITE_BLK_MISALIGN_SLICE);
}
/**
@ -300,31 +304,31 @@ void _mmcsd_unpack_csd_v20(const MMCSDBlockDevice *sdcp,
csd = sdcp->csd;
csd20->c_size = _mmcsd_get_slice(csd, MMCSD_CSD_20_C_SIZE_SLICE);
csd20->crc = _mmcsd_get_slice(csd, MMCSD_CSD_20_CRC_SLICE);
csd20->ccc = _mmcsd_get_slice(csd, MMCSD_CSD_20_CCC_SLICE);
csd20->copy = _mmcsd_get_slice(csd, MMCSD_CSD_20_COPY_SLICE);
csd20->csd_structure = _mmcsd_get_slice(csd, MMCSD_CSD_20_CSD_STRUCTURE_SLICE);
csd20->dsr_imp = _mmcsd_get_slice(csd, MMCSD_CSD_20_DSR_IMP_SLICE);
csd20->erase_blk_en = _mmcsd_get_slice(csd, MMCSD_CSD_20_ERASE_BLK_EN_SLICE);
csd20->file_format = _mmcsd_get_slice(csd, MMCSD_CSD_20_FILE_FORMAT_SLICE);
csd20->file_format_grp = _mmcsd_get_slice(csd, MMCSD_CSD_20_FILE_FORMAT_GRP_SLICE);
csd20->nsac = _mmcsd_get_slice(csd, MMCSD_CSD_20_NSAC_SLICE);
csd20->perm_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_20_PERM_WRITE_PROTECT_SLICE);
csd20->r2w_factor = _mmcsd_get_slice(csd, MMCSD_CSD_20_R2W_FACTOR_SLICE);
csd20->read_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BL_LEN_SLICE);
csd20->read_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BL_PARTIAL_SLICE);
csd20->read_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BLK_MISALIGN_SLICE);
csd20->erase_sector_size = _mmcsd_get_slice(csd, MMCSD_CSD_20_ERASE_SECTOR_SIZE_SLICE);
csd20->taac = _mmcsd_get_slice(csd, MMCSD_CSD_20_TAAC_SLICE);
csd20->tmp_write_protect = _mmcsd_get_slice(csd, MMCSD_CSD_20_TMP_WRITE_PROTECT_SLICE);
csd20->tran_speed = _mmcsd_get_slice(csd, MMCSD_CSD_20_TRANS_SPEED_SLICE);
csd20->wp_grp_enable = _mmcsd_get_slice(csd, MMCSD_CSD_20_WP_GRP_ENABLE_SLICE);
csd20->wp_grp_size = _mmcsd_get_slice(csd, MMCSD_CSD_20_WP_GRP_SIZE_SLICE);
csd20->write_bl_len = _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BL_LEN_SLICE);
csd20->write_bl_partial = _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BL_PARTIAL_SLICE);
csd20->write_blk_misalign = _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BLK_MISALIGN_SLICE);
csd20->crc = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_CRC_SLICE);
csd20->ccc = (uint16_t)_mmcsd_get_slice(csd, MMCSD_CSD_20_CCC_SLICE);
csd20->copy = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_COPY_SLICE);
csd20->csd_structure = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_CSD_STRUCTURE_SLICE);
csd20->dsr_imp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_DSR_IMP_SLICE);
csd20->erase_blk_en = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_ERASE_BLK_EN_SLICE);
csd20->file_format = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_FILE_FORMAT_SLICE);
csd20->file_format_grp = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_FILE_FORMAT_GRP_SLICE);
csd20->nsac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_NSAC_SLICE);
csd20->perm_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_PERM_WRITE_PROTECT_SLICE);
csd20->r2w_factor = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_R2W_FACTOR_SLICE);
csd20->read_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BL_LEN_SLICE);
csd20->read_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BL_PARTIAL_SLICE);
csd20->read_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_READ_BLK_MISALIGN_SLICE);
csd20->erase_sector_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_ERASE_SECTOR_SIZE_SLICE);
csd20->taac = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_TAAC_SLICE);
csd20->tmp_write_protect = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_TMP_WRITE_PROTECT_SLICE);
csd20->tran_speed = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_TRANS_SPEED_SLICE);
csd20->wp_grp_enable = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_WP_GRP_ENABLE_SLICE);
csd20->wp_grp_size = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_WP_GRP_SIZE_SLICE);
csd20->write_bl_len = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BL_LEN_SLICE);
csd20->write_bl_partial = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BL_PARTIAL_SLICE);
csd20->write_blk_misalign = (uint8_t) _mmcsd_get_slice(csd, MMCSD_CSD_20_WRITE_BLK_MISALIGN_SLICE);
}
#endif /* HAL_USE_MMC_SPI || HAL_USE_SDC */
#endif /* (HAL_USE_MMC_SPI == TRUE) || (HAL_USE_SDC == TRUE) */
/** @} */

View File

@ -40,7 +40,8 @@
#include "hal.h"
#if !defined(_CHIBIOS_RT_) || !CH_CFG_USE_QUEUES || defined(__DOXYGEN__)
#if !defined(_CHIBIOS_RT_) || (CH_CFG_USE_QUEUES == FALSE) || \
defined(__DOXYGEN__)
/**
* @brief Initializes an input queue.
@ -62,7 +63,9 @@ void iqObjectInit(input_queue_t *iqp, uint8_t *bp, size_t size,
osalThreadQueueObjectInit(&iqp->q_waiting);
iqp->q_counter = 0;
iqp->q_buffer = iqp->q_rdptr = iqp->q_wrptr = bp;
iqp->q_buffer = bp;
iqp->q_rdptr = bp;
iqp->q_wrptr = bp;
iqp->q_top = bp + size;
iqp->q_notify = infy;
iqp->q_link = link;
@ -83,7 +86,8 @@ void iqResetI(input_queue_t *iqp) {
osalDbgCheckClassI();
iqp->q_rdptr = iqp->q_wrptr = iqp->q_buffer;
iqp->q_rdptr = iqp->q_buffer;
iqp->q_wrptr = iqp->q_buffer;
iqp->q_counter = 0;
osalThreadDequeueAllI(&iqp->q_waiting, Q_RESET);
}
@ -105,13 +109,15 @@ msg_t iqPutI(input_queue_t *iqp, uint8_t b) {
osalDbgCheckClassI();
if (iqIsFullI(iqp))
if (iqIsFullI(iqp)) {
return Q_FULL;
}
iqp->q_counter++;
*iqp->q_wrptr++ = b;
if (iqp->q_wrptr >= iqp->q_top)
if (iqp->q_wrptr >= iqp->q_top) {
iqp->q_wrptr = iqp->q_buffer;
}
osalThreadDequeueNextI(&iqp->q_waiting, Q_OK);
@ -127,7 +133,7 @@ msg_t iqPutI(input_queue_t *iqp, uint8_t b) {
* buffer or before entering the state @p THD_STATE_WTQUEUE.
*
* @param[in] iqp pointer to an @p input_queue_t structure
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -138,16 +144,17 @@ msg_t iqPutI(input_queue_t *iqp, uint8_t b) {
*
* @api
*/
msg_t iqGetTimeout(input_queue_t *iqp, systime_t time) {
msg_t iqGetTimeout(input_queue_t *iqp, systime_t timeout) {
uint8_t b;
osalSysLock();
if (iqp->q_notify)
if (iqp->q_notify != NULL) {
iqp->q_notify(iqp);
}
while (iqIsEmptyI(iqp)) {
msg_t msg;
if ((msg = osalThreadEnqueueTimeoutS(&iqp->q_waiting, time)) < Q_OK) {
msg_t msg = osalThreadEnqueueTimeoutS(&iqp->q_waiting, timeout);
if (msg < Q_OK) {
osalSysUnlock();
return msg;
}
@ -155,11 +162,12 @@ msg_t iqGetTimeout(input_queue_t *iqp, systime_t time) {
iqp->q_counter--;
b = *iqp->q_rdptr++;
if (iqp->q_rdptr >= iqp->q_top)
if (iqp->q_rdptr >= iqp->q_top) {
iqp->q_rdptr = iqp->q_buffer;
}
osalSysUnlock();
return b;
return (msg_t)b;
}
/**
@ -177,7 +185,7 @@ msg_t iqGetTimeout(input_queue_t *iqp, systime_t time) {
* @param[out] bp pointer to the data buffer
* @param[in] n the maximum amount of data to be transferred, the
* value 0 is reserved
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -187,19 +195,20 @@ msg_t iqGetTimeout(input_queue_t *iqp, systime_t time) {
* @api
*/
size_t iqReadTimeout(input_queue_t *iqp, uint8_t *bp,
size_t n, systime_t time) {
size_t n, systime_t timeout) {
qnotify_t nfy = iqp->q_notify;
size_t r = 0;
osalDbgCheck(n > 0);
osalDbgCheck(n > 0U);
osalSysLock();
while (TRUE) {
if (nfy)
while (true) {
if (nfy != NULL) {
nfy(iqp);
}
while (iqIsEmptyI(iqp)) {
if (osalThreadEnqueueTimeoutS(&iqp->q_waiting, time) != Q_OK) {
if (osalThreadEnqueueTimeoutS(&iqp->q_waiting, timeout) != Q_OK) {
osalSysUnlock();
return r;
}
@ -207,13 +216,15 @@ size_t iqReadTimeout(input_queue_t *iqp, uint8_t *bp,
iqp->q_counter--;
*bp++ = *iqp->q_rdptr++;
if (iqp->q_rdptr >= iqp->q_top)
if (iqp->q_rdptr >= iqp->q_top) {
iqp->q_rdptr = iqp->q_buffer;
}
osalSysUnlock(); /* Gives a preemption chance in a controlled point.*/
r++;
if (--n == 0)
if (--n == 0U) {
return r;
}
osalSysLock();
}
@ -239,7 +250,9 @@ void oqObjectInit(output_queue_t *oqp, uint8_t *bp, size_t size,
osalThreadQueueObjectInit(&oqp->q_waiting);
oqp->q_counter = size;
oqp->q_buffer = oqp->q_rdptr = oqp->q_wrptr = bp;
oqp->q_buffer = bp;
oqp->q_rdptr = bp;
oqp->q_wrptr = bp;
oqp->q_top = bp + size;
oqp->q_notify = onfy;
oqp->q_link = link;
@ -260,8 +273,9 @@ void oqResetI(output_queue_t *oqp) {
osalDbgCheckClassI();
oqp->q_rdptr = oqp->q_wrptr = oqp->q_buffer;
oqp->q_counter = qSizeI(oqp);
oqp->q_rdptr = oqp->q_buffer;
oqp->q_wrptr = oqp->q_buffer;
oqp->q_counter = qSizeX(oqp);
osalThreadDequeueAllI(&oqp->q_waiting, Q_RESET);
}
@ -275,7 +289,7 @@ void oqResetI(output_queue_t *oqp) {
*
* @param[in] oqp pointer to an @p output_queue_t structure
* @param[in] b the byte value to be written in the queue
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -287,13 +301,12 @@ void oqResetI(output_queue_t *oqp) {
*
* @api
*/
msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t time) {
msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t timeout) {
osalSysLock();
while (oqIsFullI(oqp)) {
msg_t msg;
if ((msg = osalThreadEnqueueTimeoutS(&oqp->q_waiting, time)) < Q_OK) {
msg_t msg = osalThreadEnqueueTimeoutS(&oqp->q_waiting, timeout);
if (msg < Q_OK) {
osalSysUnlock();
return msg;
}
@ -301,13 +314,15 @@ msg_t oqPutTimeout(output_queue_t *oqp, uint8_t b, systime_t time) {
oqp->q_counter--;
*oqp->q_wrptr++ = b;
if (oqp->q_wrptr >= oqp->q_top)
if (oqp->q_wrptr >= oqp->q_top) {
oqp->q_wrptr = oqp->q_buffer;
}
if (oqp->q_notify)
if (oqp->q_notify != NULL) {
oqp->q_notify(oqp);
}
osalSysUnlock();
return Q_OK;
}
@ -326,17 +341,19 @@ msg_t oqGetI(output_queue_t *oqp) {
osalDbgCheckClassI();
if (oqIsEmptyI(oqp))
if (oqIsEmptyI(oqp)) {
return Q_EMPTY;
}
oqp->q_counter++;
b = *oqp->q_rdptr++;
if (oqp->q_rdptr >= oqp->q_top)
if (oqp->q_rdptr >= oqp->q_top) {
oqp->q_rdptr = oqp->q_buffer;
}
osalThreadDequeueNextI(&oqp->q_waiting, Q_OK);
return b;
return (msg_t)b;
}
/**
@ -354,7 +371,7 @@ msg_t oqGetI(output_queue_t *oqp) {
* @param[out] bp pointer to the data buffer
* @param[in] n the maximum amount of data to be transferred, the
* value 0 is reserved
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -364,36 +381,40 @@ msg_t oqGetI(output_queue_t *oqp) {
* @api
*/
size_t oqWriteTimeout(output_queue_t *oqp, const uint8_t *bp,
size_t n, systime_t time) {
size_t n, systime_t timeout) {
qnotify_t nfy = oqp->q_notify;
size_t w = 0;
osalDbgCheck(n > 0);
osalDbgCheck(n > 0U);
osalSysLock();
while (TRUE) {
while (true) {
while (oqIsFullI(oqp)) {
if (osalThreadEnqueueTimeoutS(&oqp->q_waiting, time) != Q_OK) {
if (osalThreadEnqueueTimeoutS(&oqp->q_waiting, timeout) != Q_OK) {
osalSysUnlock();
return w;
}
}
oqp->q_counter--;
*oqp->q_wrptr++ = *bp++;
if (oqp->q_wrptr >= oqp->q_top)
if (oqp->q_wrptr >= oqp->q_top) {
oqp->q_wrptr = oqp->q_buffer;
}
if (nfy)
if (nfy != NULL) {
nfy(oqp);
}
osalSysUnlock(); /* Gives a preemption chance in a controlled point.*/
w++;
if (--n == 0)
if (--n == 0U) {
return w;
}
osalSysLock();
}
}
#endif /* !defined(_CHIBIOS_RT_) || !CH_USE_QUEUES */
#endif /* !defined(_CHIBIOS_RT_) || (CH_USE_QUEUES == FALSE) */
/** @} */

View File

@ -30,7 +30,7 @@
*/
#include "hal.h"
#if HAL_USE_I2C || defined(__DOXYGEN__)
#if (HAL_USE_I2C == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -76,9 +76,9 @@ void i2cObjectInit(I2CDriver *i2cp) {
i2cp->state = I2C_STOP;
i2cp->config = NULL;
#if I2C_USE_MUTUAL_EXCLUSION
#if I2C_USE_MUTUAL_EXCLUSION == TRUE
osalMutexObjectInit(&i2cp->mutex);
#endif /* I2C_USE_MUTUAL_EXCLUSION */
#endif
#if defined(I2C_DRIVER_EXT_INIT_HOOK)
I2C_DRIVER_EXT_INIT_HOOK(i2cp);
@ -175,9 +175,9 @@ msg_t i2cMasterTransmitTimeout(I2CDriver *i2cp,
systime_t timeout) {
msg_t rdymsg;
osalDbgCheck((i2cp != NULL) && (addr != 0) &&
(txbytes > 0) && (txbuf != NULL) &&
((rxbytes == 0) || ((rxbytes > 0) && (rxbuf != NULL))) &&
osalDbgCheck((i2cp != NULL) && (addr != 0U) &&
(txbytes > 0U) && (txbuf != NULL) &&
((rxbytes == 0U) || ((rxbytes > 0U) && (rxbuf != NULL))) &&
(timeout != TIME_IMMEDIATE));
osalDbgAssert(i2cp->state == I2C_READY, "not ready");
@ -187,10 +187,12 @@ msg_t i2cMasterTransmitTimeout(I2CDriver *i2cp,
i2cp->state = I2C_ACTIVE_TX;
rdymsg = i2c_lld_master_transmit_timeout(i2cp, addr, txbuf, txbytes,
rxbuf, rxbytes, timeout);
if (rdymsg == MSG_TIMEOUT)
if (rdymsg == MSG_TIMEOUT) {
i2cp->state = I2C_LOCKED;
else
}
else {
i2cp->state = I2C_READY;
}
osalSysUnlock();
return rdymsg;
}
@ -223,8 +225,8 @@ msg_t i2cMasterReceiveTimeout(I2CDriver *i2cp,
msg_t rdymsg;
osalDbgCheck((i2cp != NULL) && (addr != 0) &&
(rxbytes > 0) && (rxbuf != NULL) &&
osalDbgCheck((i2cp != NULL) && (addr != 0U) &&
(rxbytes > 0U) && (rxbuf != NULL) &&
(timeout != TIME_IMMEDIATE));
osalDbgAssert(i2cp->state == I2C_READY, "not ready");
@ -233,15 +235,17 @@ msg_t i2cMasterReceiveTimeout(I2CDriver *i2cp,
i2cp->errors = I2C_NO_ERROR;
i2cp->state = I2C_ACTIVE_RX;
rdymsg = i2c_lld_master_receive_timeout(i2cp, addr, rxbuf, rxbytes, timeout);
if (rdymsg == MSG_TIMEOUT)
if (rdymsg == MSG_TIMEOUT) {
i2cp->state = I2C_LOCKED;
else
}
else {
i2cp->state = I2C_READY;
}
osalSysUnlock();
return rdymsg;
}
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if (I2C_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
/**
* @brief Gains exclusive access to the I2C bus.
* @details This function tries to gain ownership to the I2C bus, if the bus
@ -275,8 +279,8 @@ void i2cReleaseBus(I2CDriver *i2cp) {
osalMutexUnlock(&i2cp->mutex);
}
#endif /* I2C_USE_MUTUAL_EXCLUSION */
#endif /* I2C_USE_MUTUAL_EXCLUSION == TRUE */
#endif /* HAL_USE_I2C */
#endif /* HAL_USE_I2C == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_I2S || defined(__DOXYGEN__)
#if (HAL_USE_I2S == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -153,6 +153,6 @@ void i2sStopExchange(I2SDriver *i2sp) {
osalSysUnlock();
}
#endif /* HAL_USE_I2S */
#endif /* HAL_USE_I2S == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_ICU || defined(__DOXYGEN__)
#if (HAL_USE_ICU == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -223,6 +223,6 @@ void icuDisableNotifications(ICUDriver *icup) {
osalSysUnlock();
}
#endif /* HAL_USE_ICU */
#endif /* HAL_USE_ICU == TRUE */
/** @} */

View File

@ -27,13 +27,13 @@
#include "hal.h"
#if HAL_USE_MAC || defined(__DOXYGEN__)
#if (HAL_USE_MAC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#if MAC_USE_ZERO_COPY && !MAC_SUPPORTS_ZERO_COPY
#if (MAC_USE_ZERO_COPY == TRUE) && (MAC_SUPPORTS_ZERO_COPY == FALSE)
#error "MAC_USE_ZERO_COPY not supported by this implementation"
#endif
@ -82,7 +82,7 @@ void macObjectInit(MACDriver *macp) {
macp->config = NULL;
osalThreadQueueObjectInit(&macp->tdqueue);
osalThreadQueueObjectInit(&macp->rdqueue);
#if MAC_USE_EVENTS
#if MAC_USE_EVENTS == TRUE
osalEventObjectInit(&macp->rdevent);
#endif
}
@ -135,7 +135,7 @@ void macStop(MACDriver *macp) {
*
* @param[in] macp pointer to the @p MACDriver object
* @param[out] tdp pointer to a @p MACTransmitDescriptor structure
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -148,7 +148,7 @@ void macStop(MACDriver *macp) {
*/
msg_t macWaitTransmitDescriptor(MACDriver *macp,
MACTransmitDescriptor *tdp,
systime_t time) {
systime_t timeout) {
msg_t msg;
systime_t now;
@ -156,16 +156,17 @@ msg_t macWaitTransmitDescriptor(MACDriver *macp,
osalDbgAssert(macp->state == MAC_ACTIVE, "not active");
while (((msg = mac_lld_get_transmit_descriptor(macp, tdp)) != MSG_OK) &&
(time > 0)) {
(timeout > 0U)) {
osalSysLock();
now = osalOsGetSystemTimeX();
msg = osalThreadEnqueueTimeoutS(&macp->tdqueue, time);
msg = osalThreadEnqueueTimeoutS(&macp->tdqueue, timeout);
if (msg == MSG_TIMEOUT) {
osalSysUnlock();
break;
}
if (time != TIME_INFINITE)
time -= (osalOsGetSystemTimeX() - now);
if (timeout != TIME_INFINITE) {
timeout -= (osalOsGetSystemTimeX() - now);
}
osalSysUnlock();
}
return msg;
@ -194,7 +195,7 @@ void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp) {
*
* @param[in] macp pointer to the @p MACDriver object
* @param[out] rdp pointer to a @p MACReceiveDescriptor structure
* @param[in] time the number of ticks before the operation timeouts,
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
@ -207,7 +208,7 @@ void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp) {
*/
msg_t macWaitReceiveDescriptor(MACDriver *macp,
MACReceiveDescriptor *rdp,
systime_t time) {
systime_t timeout) {
msg_t msg;
systime_t now;
@ -215,16 +216,17 @@ msg_t macWaitReceiveDescriptor(MACDriver *macp,
osalDbgAssert(macp->state == MAC_ACTIVE, "not active");
while (((msg = mac_lld_get_receive_descriptor(macp, rdp)) != MSG_OK) &&
(time > 0)) {
(timeout > 0U)) {
osalSysLock();
now = osalOsGetSystemTimeX();
msg = osalThreadEnqueueTimeoutS(&macp->rdqueue, time);
msg = osalThreadEnqueueTimeoutS(&macp->rdqueue, timeout);
if (msg == MSG_TIMEOUT) {
osalSysUnlock();
break;
}
if (time != TIME_INFINITE)
time -= (osalOsGetSystemTimeX() - now);
if (timeout != TIME_INFINITE) {
timeout -= (osalOsGetSystemTimeX() - now);
}
osalSysUnlock();
}
return msg;
@ -264,6 +266,6 @@ bool macPollLinkStatus(MACDriver *macp) {
return mac_lld_poll_link_status(macp);
}
#endif /* HAL_USE_MAC */
#endif /* HAL_USE_MAC == TRUE */
/** @} */

View File

@ -32,7 +32,7 @@
#include "hal.h"
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
#if (HAL_USE_MMC_SPI == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -101,32 +101,42 @@ static const uint8_t crc7_lookup_table[256] = {
static bool mmc_read(void *instance, uint32_t startblk,
uint8_t *buffer, uint32_t n) {
if (mmcStartSequentialRead((MMCDriver *)instance, startblk))
if (mmcStartSequentialRead((MMCDriver *)instance, startblk)) {
return HAL_FAILED;
while (n > 0) {
if (mmcSequentialRead((MMCDriver *)instance, buffer))
}
while (n > 0U) {
if (mmcSequentialRead((MMCDriver *)instance, buffer)) {
return HAL_FAILED;
}
buffer += MMCSD_BLOCK_SIZE;
n--;
}
if (mmcStopSequentialRead((MMCDriver *)instance))
if (mmcStopSequentialRead((MMCDriver *)instance)) {
return HAL_FAILED;
}
return HAL_SUCCESS;
}
static bool mmc_write(void *instance, uint32_t startblk,
const uint8_t *buffer, uint32_t n) {
if (mmcStartSequentialWrite((MMCDriver *)instance, startblk))
if (mmcStartSequentialWrite((MMCDriver *)instance, startblk)) {
return HAL_FAILED;
while (n > 0) {
if (mmcSequentialWrite((MMCDriver *)instance, buffer))
}
while (n > 0U) {
if (mmcSequentialWrite((MMCDriver *)instance, buffer)) {
return HAL_FAILED;
}
buffer += MMCSD_BLOCK_SIZE;
n--;
}
if (mmcStopSequentialWrite((MMCDriver *)instance))
if (mmcStopSequentialWrite((MMCDriver *)instance)) {
return HAL_FAILED;
}
return HAL_SUCCESS;
}
@ -140,8 +150,10 @@ static bool mmc_write(void *instance, uint32_t startblk,
*/
static uint8_t crc7(uint8_t crc, const uint8_t *buffer, size_t len) {
while (len--)
while (len > 0U) {
crc = crc7_lookup_table[(crc << 1) ^ (*buffer++)];
len--;
}
return crc;
}
@ -158,15 +170,17 @@ static void wait(MMCDriver *mmcp) {
for (i = 0; i < 16; i++) {
spiReceive(mmcp->config->spip, 1, buf);
if (buf[0] == 0xFF)
if (buf[0] == 0xFFU) {
return;
}
}
/* Looks like it is a long wait.*/
while (TRUE) {
while (true) {
spiReceive(mmcp->config->spip, 1, buf);
if (buf[0] == 0xFF)
if (buf[0] == 0xFFU) {
break;
#ifdef MMC_NICE_WAITING
}
#if MMC_NICE_WAITING == TRUE
/* Trying to be nice with the other threads.*/
osalThreadSleep(1);
#endif
@ -188,13 +202,13 @@ static void send_hdr(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) {
/* Wait for the bus to become idle if a write operation was in progress.*/
wait(mmcp);
buf[0] = 0x40 | cmd;
buf[1] = arg >> 24;
buf[2] = arg >> 16;
buf[3] = arg >> 8;
buf[4] = arg;
buf[0] = (uint8_t)0x40U | cmd;
buf[1] = (uint8_t)(arg >> 24U);
buf[2] = (uint8_t)(arg >> 16U);
buf[3] = (uint8_t)(arg >> 8U);
buf[4] = (uint8_t)arg;
/* Calculate CRC for command header, shift to right position, add stop bit.*/
buf[5] = ((crc7(0, buf, 5) & 0x7F) << 1) | 0x01;
buf[5] = ((crc7(0, buf, 5U) & 0x7FU) << 1U) | 0x01U;
spiSend(mmcp->config->spip, 6, buf);
}
@ -214,10 +228,11 @@ static uint8_t recvr1(MMCDriver *mmcp) {
for (i = 0; i < 9; i++) {
spiReceive(mmcp->config->spip, 1, r1);
if (r1[0] != 0xFF)
if (r1[0] != 0xFFU) {
return r1[0];
}
return 0xFF;
}
return 0xFFU;
}
/**
@ -303,22 +318,22 @@ static bool read_CxD(MMCDriver *mmcp, uint8_t cmd, uint32_t cxd[4]) {
spiSelect(mmcp->config->spip);
send_hdr(mmcp, cmd, 0);
if (recvr1(mmcp) != 0x00) {
if (recvr1(mmcp) != 0x00U) {
spiUnselect(mmcp->config->spip);
return HAL_FAILED;
}
/* Wait for data availability.*/
for (i = 0; i < MMC_WAIT_DATA; i++) {
for (i = 0U; i < MMC_WAIT_DATA; i++) {
spiReceive(mmcp->config->spip, 1, buf);
if (buf[0] == 0xFE) {
if (buf[0] == 0xFEU) {
uint32_t *wp;
spiReceive(mmcp->config->spip, 16, buf);
bp = buf;
for (wp = &cxd[3]; wp >= cxd; wp--) {
*wp = ((uint32_t)bp[0] << 24) | ((uint32_t)bp[1] << 16) |
((uint32_t)bp[2] << 8) | (uint32_t)bp[3];
*wp = ((uint32_t)bp[0] << 24U) | ((uint32_t)bp[1] << 16U) |
((uint32_t)bp[2] << 8U) | (uint32_t)bp[3];
bp += 4;
}
@ -343,11 +358,12 @@ static void sync(MMCDriver *mmcp) {
uint8_t buf[1];
spiSelect(mmcp->config->spip);
while (TRUE) {
while (true) {
spiReceive(mmcp->config->spip, 1, buf);
if (buf[0] == 0xFF)
if (buf[0] == 0xFFU) {
break;
#ifdef MMC_NICE_WAITING
}
#if MMC_NICE_WAITING == TRUE
/* Trying to be nice with the other threads.*/
osalThreadSleep(1);
#endif
@ -382,7 +398,7 @@ void mmcObjectInit(MMCDriver *mmcp) {
mmcp->vmt = &mmc_vmt;
mmcp->state = BLK_STOP;
mmcp->config = NULL;
mmcp->block_addresses = FALSE;
mmcp->block_addresses = false;
}
/**
@ -448,7 +464,7 @@ bool mmcConnect(MMCDriver *mmcp) {
/* Connection procedure in progress.*/
mmcp->state = BLK_CONNECTING;
mmcp->block_addresses = FALSE;
mmcp->block_addresses = false;
/* Slow clock mode and 128 clock pulses.*/
spiStart(mmcp->config->spip, mmcp->config->lscfg);
@ -456,11 +472,13 @@ bool mmcConnect(MMCDriver *mmcp) {
/* SPI mode selection.*/
i = 0;
while (TRUE) {
if (send_command_R1(mmcp, MMCSD_CMD_GO_IDLE_STATE, 0) == 0x01)
while (true) {
if (send_command_R1(mmcp, MMCSD_CMD_GO_IDLE_STATE, 0) == 0x01U) {
break;
if (++i >= MMC_CMD0_RETRY)
}
if (++i >= MMC_CMD0_RETRY) {
goto failed;
}
osalThreadSleepMilliseconds(10);
}
@ -469,39 +487,46 @@ bool mmcConnect(MMCDriver *mmcp) {
This method is based on "How to support SDC Ver2 and high capacity cards"
by ElmChan.*/
if (send_command_R3(mmcp, MMCSD_CMD_SEND_IF_COND,
MMCSD_CMD8_PATTERN, r3) != 0x05) {
MMCSD_CMD8_PATTERN, r3) != 0x05U) {
/* Switch to SDHC mode.*/
i = 0;
while (TRUE) {
if ((send_command_R1(mmcp, MMCSD_CMD_APP_CMD, 0) == 0x01) &&
(send_command_R3(mmcp, MMCSD_CMD_APP_OP_COND,
0x400001aa, r3) == 0x00))
while (true) {
/*lint -save -e9007 [13.5] Side effect unimportant.*/
if ((send_command_R1(mmcp, MMCSD_CMD_APP_CMD, 0) == 0x01U) &&
(send_command_R3(mmcp, MMCSD_CMD_APP_OP_COND, 0x400001AAU, r3) == 0x00U)) {
/*lint -restore*/
break;
}
if (++i >= MMC_ACMD41_RETRY)
if (++i >= MMC_ACMD41_RETRY) {
goto failed;
}
osalThreadSleepMilliseconds(10);
}
/* Execute dedicated read on OCR register */
send_command_R3(mmcp, MMCSD_CMD_READ_OCR, 0, r3);
(void) send_command_R3(mmcp, MMCSD_CMD_READ_OCR, 0, r3);
/* Check if CCS is set in response. Card operates in block mode if set.*/
if (r3[0] & 0x40)
mmcp->block_addresses = TRUE;
if ((r3[0] & 0x40U) != 0U) {
mmcp->block_addresses = true;
}
}
/* Initialization.*/
i = 0;
while (TRUE) {
while (true) {
uint8_t b = send_command_R1(mmcp, MMCSD_CMD_INIT, 0);
if (b == 0x00)
if (b == 0x00U) {
break;
if (b != 0x01)
}
if (b != 0x01U) {
goto failed;
if (++i >= MMC_CMD1_RETRY)
}
if (++i >= MMC_CMD1_RETRY) {
goto failed;
}
osalThreadSleepMilliseconds(10);
}
@ -510,18 +535,23 @@ bool mmcConnect(MMCDriver *mmcp) {
/* Setting block size.*/
if (send_command_R1(mmcp, MMCSD_CMD_SET_BLOCKLEN,
MMCSD_BLOCK_SIZE) != 0x00)
MMCSD_BLOCK_SIZE) != 0x00U) {
goto failed;
}
/* Determine capacity.*/
if (read_CxD(mmcp, MMCSD_CMD_SEND_CSD, mmcp->csd))
goto failed;
mmcp->capacity = _mmcsd_get_capacity(mmcp->csd);
if (mmcp->capacity == 0)
if (read_CxD(mmcp, MMCSD_CMD_SEND_CSD, mmcp->csd)) {
goto failed;
}
if (read_CxD(mmcp, MMCSD_CMD_SEND_CID, mmcp->cid))
mmcp->capacity = _mmcsd_get_capacity(mmcp->csd);
if (mmcp->capacity == 0U) {
goto failed;
}
if (read_CxD(mmcp, MMCSD_CMD_SEND_CID, mmcp->cid)) {
goto failed;
}
mmcp->state = BLK_READY;
return HAL_SUCCESS;
@ -593,12 +623,14 @@ bool mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk) {
spiStart(mmcp->config->spip, mmcp->config->hscfg);
spiSelect(mmcp->config->spip);
if (mmcp->block_addresses)
if (mmcp->block_addresses) {
send_hdr(mmcp, MMCSD_CMD_READ_MULTIPLE_BLOCK, startblk);
else
}
else {
send_hdr(mmcp, MMCSD_CMD_READ_MULTIPLE_BLOCK, startblk * MMCSD_BLOCK_SIZE);
}
if (recvr1(mmcp) != 0x00) {
if (recvr1(mmcp) != 0x00U) {
spiStop(mmcp->config->spip);
mmcp->state = BLK_READY;
return HAL_FAILED;
@ -619,16 +651,17 @@ bool mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk) {
* @api
*/
bool mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer) {
int i;
unsigned i;
osalDbgCheck((mmcp != NULL) && (buffer != NULL));
if (mmcp->state != BLK_READING)
if (mmcp->state != BLK_READING) {
return HAL_FAILED;
}
for (i = 0; i < MMC_WAIT_DATA; i++) {
spiReceive(mmcp->config->spip, 1, buffer);
if (buffer[0] == 0xFE) {
if (buffer[0] == 0xFEU) {
spiReceive(mmcp->config->spip, MMCSD_BLOCK_SIZE, buffer);
/* CRC ignored. */
spiIgnore(mmcp->config->spip, 2);
@ -654,16 +687,18 @@ bool mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer) {
* @api
*/
bool mmcStopSequentialRead(MMCDriver *mmcp) {
static const uint8_t stopcmd[] = {0x40 | MMCSD_CMD_STOP_TRANSMISSION,
0, 0, 0, 0, 1, 0xFF};
static const uint8_t stopcmd[] = {
(uint8_t)(0x40U | MMCSD_CMD_STOP_TRANSMISSION), 0, 0, 0, 0, 1, 0xFF
};
osalDbgCheck(mmcp != NULL);
if (mmcp->state != BLK_READING)
if (mmcp->state != BLK_READING) {
return HAL_FAILED;
}
spiSend(mmcp->config->spip, sizeof(stopcmd), stopcmd);
/* result = recvr1(mmcp) != 0x00;*/
/* result = recvr1(mmcp) != 0x00U;*/
/* Note, ignored r1 response, it can be not zero, unknown issue.*/
(void) recvr1(mmcp);
@ -695,13 +730,15 @@ bool mmcStartSequentialWrite(MMCDriver *mmcp, uint32_t startblk) {
spiStart(mmcp->config->spip, mmcp->config->hscfg);
spiSelect(mmcp->config->spip);
if (mmcp->block_addresses)
if (mmcp->block_addresses) {
send_hdr(mmcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK, startblk);
else
}
else {
send_hdr(mmcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK,
startblk * MMCSD_BLOCK_SIZE);
}
if (recvr1(mmcp) != 0x00) {
if (recvr1(mmcp) != 0x00U) {
spiStop(mmcp->config->spip);
mmcp->state = BLK_READY;
return HAL_FAILED;
@ -727,14 +764,15 @@ bool mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer) {
osalDbgCheck((mmcp != NULL) && (buffer != NULL));
if (mmcp->state != BLK_WRITING)
if (mmcp->state != BLK_WRITING) {
return HAL_FAILED;
}
spiSend(mmcp->config->spip, sizeof(start), start); /* Data prologue. */
spiSend(mmcp->config->spip, MMCSD_BLOCK_SIZE, buffer);/* Data. */
spiIgnore(mmcp->config->spip, 2); /* CRC ignored. */
spiReceive(mmcp->config->spip, 1, b);
if ((b[0] & 0x1F) == 0x05) {
if ((b[0] & 0x1FU) == 0x05U) {
wait(mmcp);
return HAL_SUCCESS;
}
@ -762,8 +800,9 @@ bool mmcStopSequentialWrite(MMCDriver *mmcp) {
osalDbgCheck(mmcp != NULL);
if (mmcp->state != BLK_WRITING)
if (mmcp->state != BLK_WRITING) {
return HAL_FAILED;
}
spiSend(mmcp->config->spip, sizeof(stop), stop);
spiUnselect(mmcp->config->spip);
@ -788,8 +827,9 @@ bool mmcSync(MMCDriver *mmcp) {
osalDbgCheck(mmcp != NULL);
if (mmcp->state != BLK_READY)
if (mmcp->state != BLK_READY) {
return HAL_FAILED;
}
/* Synchronization operation in progress.*/
mmcp->state = BLK_SYNCING;
@ -818,8 +858,9 @@ bool mmcGetInfo(MMCDriver *mmcp, BlockDeviceInfo *bdip) {
osalDbgCheck((mmcp != NULL) && (bdip != NULL));
if (mmcp->state != BLK_READY)
if (mmcp->state != BLK_READY) {
return HAL_FAILED;
}
bdip->blk_num = mmcp->capacity;
bdip->blk_size = MMCSD_BLOCK_SIZE;
@ -853,14 +894,17 @@ bool mmcErase(MMCDriver *mmcp, uint32_t startblk, uint32_t endblk) {
endblk *= MMCSD_BLOCK_SIZE;
}
if (send_command_R1(mmcp, MMCSD_CMD_ERASE_RW_BLK_START, startblk))
if (send_command_R1(mmcp, MMCSD_CMD_ERASE_RW_BLK_START, startblk) != 0x00U) {
goto failed;
}
if (send_command_R1(mmcp, MMCSD_CMD_ERASE_RW_BLK_END, endblk))
if (send_command_R1(mmcp, MMCSD_CMD_ERASE_RW_BLK_END, endblk) != 0x00U) {
goto failed;
}
if (send_command_R1(mmcp, MMCSD_CMD_ERASE, 0))
if (send_command_R1(mmcp, MMCSD_CMD_ERASE, 0) != 0x00U) {
goto failed;
}
mmcp->state = BLK_READY;
return HAL_SUCCESS;
@ -872,6 +916,6 @@ failed:
return HAL_FAILED;
}
#endif /* HAL_USE_MMC_SPI */
#endif /* HAL_USE_MMC_SPI == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -120,6 +120,6 @@ void palSetBusMode(IOBus *bus, iomode_t mode) {
palSetGroupMode(bus->portid, bus->mask, bus->offset, mode);
}
#endif /* HAL_USE_PAL */
#endif /* HAL_USE_PAL == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_PWM || defined(__DOXYGEN__)
#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -269,7 +269,7 @@ void pwmEnableChannelNotification(PWMDriver *pwmp, pwmchannel_t channel) {
osalSysLock();
osalDbgAssert(pwmp->state == PWM_READY, "not ready");
osalDbgAssert((pwmp->enabled & (1 << channel)) != 0,
osalDbgAssert((pwmp->enabled & ((pwmchnmsk_t)1U << (pwmchnmsk_t)channel)) != 0U,
"channel not enabled");
osalDbgAssert(pwmp->config->channels[channel].callback != NULL,
"undefined channel callback");
@ -297,7 +297,7 @@ void pwmDisableChannelNotification(PWMDriver *pwmp, pwmchannel_t channel) {
osalSysLock();
osalDbgAssert(pwmp->state == PWM_READY, "not ready");
osalDbgAssert((pwmp->enabled & (1 << channel)) != 0,
osalDbgAssert((pwmp->enabled & ((pwmchnmsk_t)1U << (pwmchnmsk_t)channel)) != 0U,
"channel not enabled");
osalDbgAssert(pwmp->config->channels[channel].callback != NULL,
"undefined channel callback");
@ -307,6 +307,6 @@ void pwmDisableChannelNotification(PWMDriver *pwmp, pwmchannel_t channel) {
osalSysUnlock();
}
#endif /* HAL_USE_PWM */
#endif /* HAL_USE_PWM == TRUE */
/** @} */

View File

@ -31,7 +31,7 @@
#include "hal.h"
#if HAL_USE_RTC || defined(__DOXYGEN__)
#if (HAL_USE_RTC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -83,7 +83,7 @@ void rtcInit(void) {
*/
void rtcObjectInit(RTCDriver *rtcp) {
#if RTC_HAS_STORAGE
#if RTC_HAS_STORAGE == TRUE
rtcp->vmt = &_rtc_lld_vmt;
#else
(void)rtcp;
@ -152,7 +152,7 @@ void rtcSetAlarm(RTCDriver *rtcp,
rtcalarm_t alarm,
const RTCAlarm *alarmspec) {
osalDbgCheck((rtcp != NULL) && (alarm < RTC_ALARMS));
osalDbgCheck((rtcp != NULL) && (alarm < (rtcalarm_t)RTC_ALARMS));
rtc_lld_set_alarm(rtcp, alarm, alarmspec);
}
@ -178,13 +178,15 @@ void rtcGetAlarm(RTCDriver *rtcp,
rtcalarm_t alarm,
RTCAlarm *alarmspec) {
osalDbgCheck((rtcp != NULL) && (alarm < RTC_ALARMS) && (alarmspec != NULL));
osalDbgCheck((rtcp != NULL) &&
(alarm < (rtcalarm_t)RTC_ALARMS) &&
(alarmspec != NULL));
rtc_lld_get_alarm(rtcp, alarm, alarmspec);
}
#endif /* RTC_ALARMS > 0 */
#if RTC_SUPPORTS_CALLBACKS || defined(__DOXYGEN__)
#if (RTC_SUPPORTS_CALLBACKS == TRUE) || defined(__DOXYGEN__)
/**
* @brief Enables or disables RTC callbacks.
* @details This function enables or disables the callback, use a @p NULL
@ -207,7 +209,7 @@ void rtcSetCallback(RTCDriver *rtcp, rtccb_t callback) {
rtc_lld_set_callback(rtcp, callback);
}
#endif /* RTC_SUPPORTS_CALLBACKS */
#endif /* RTC_SUPPORTS_CALLBACKS == TRUE */
/**
* @brief Convert @p RTCDateTime to broken-down time structure.
@ -219,14 +221,14 @@ void rtcSetCallback(RTCDriver *rtcp, rtccb_t callback) {
*/
void rtcConvertDateTimeToStructTm(const RTCDateTime *timespec,
struct tm *timp) {
uint32_t tmp;
int tmp;
timp->tm_year = timespec->year + (1980 - 1900);
timp->tm_mon = timespec->month - 1;
timp->tm_mday = timespec->day;
timp->tm_isdst = timespec->dstflag;
timp->tm_year = (int)timespec->year + (1980 - 1900);
timp->tm_mon = (int)timespec->month - 1;
timp->tm_mday = (int)timespec->day;
timp->tm_isdst = (int)timespec->dstflag;
tmp = timespec->millisecond / 1000;
tmp = (int)timespec->millisecond / 1000;
timp->tm_sec = tmp % 60;
tmp -= timp->tm_sec;
timp->tm_min = (tmp % 3600) / 60;
@ -247,16 +249,23 @@ void rtcConvertStructTmToDateTime(const struct tm *timp,
uint32_t tv_msec,
RTCDateTime *timespec) {
timespec->year = timp->tm_year - (1980 - 1900);
timespec->month = timp->tm_mon + 1;
timespec->day = timp->tm_mday;
timespec->dayofweek = timp->tm_wday + 1;
if (-1 == timp->tm_isdst)
timespec->dstflag = 0; /* set zero if dst is unknown */
else
timespec->dstflag = timp->tm_isdst;
timespec->millisecond = tv_msec +
(timp->tm_hour * 3600 + timp->tm_min * 60 + timp->tm_sec) * 1000;
/*lint -save -e9034 [10.4] Verified assignments to bit fields.*/
timespec->year = (uint32_t)timp->tm_year - (1980U - 1900U);
timespec->month = (uint32_t)timp->tm_mon + 1U;
timespec->day = (uint32_t)timp->tm_mday;
timespec->dayofweek = (uint32_t)timp->tm_wday + 1U;
if (-1 == timp->tm_isdst) {
timespec->dstflag = 0U; /* set zero if dst is unknown */
}
else {
timespec->dstflag = (uint32_t)timp->tm_isdst;
}
/*lint -restore*/
/*lint -save -e9033 [10.8] Verified assignments to bit fields.*/
timespec->millisecond = tv_msec + (uint32_t)((timp->tm_hour * 3600) +
(timp->tm_min * 60) +
(timp->tm_sec * 1000));
/*lint -restore*/
}
/**
@ -273,36 +282,36 @@ uint32_t rtcConvertDateTimeToFAT(const RTCDateTime *timespec) {
uint32_t fattime;
uint32_t sec, min, hour, day, month, tmp;
tmp = timespec->millisecond / 1000;
sec = tmp % 60;
min = (tmp - sec) % 3600;
hour = (tmp - sec - min * 60) / 3600;
tmp = timespec->millisecond / 1000U;
sec = tmp % 60U;
min = (tmp - sec) % 3600U;
hour = ((tmp - sec) - (min * 60U)) / 3600U;
day = timespec->day;
month = timespec->month;
/* handle DST flag */
if (1 == timespec->dstflag) {
hour += 1;
if (hour == 24) {
hour = 0;
day += 1;
if (day > month_len[month - 1]) {
day = 1;
month += 1;
if (1U == timespec->dstflag) {
hour += 1U;
if (hour == 24U) {
hour = 0U;
day += 1U;
if (day > month_len[month - 1U]) {
day = 1U;
month += 1U;
}
}
}
fattime = sec >> 1;
fattime |= min << 5;
fattime |= hour << 11;
fattime |= day << 16;
fattime |= month << 21;
fattime |= timespec->year << 25;
fattime = sec >> 1U;
fattime |= min << 5U;
fattime |= hour << 11U;
fattime |= day << 16U;
fattime |= month << 21U;
fattime |= (uint32_t)timespec->year << 25U;
return fattime;
}
#endif /* HAL_USE_RTC */
#endif /* HAL_USE_RTC == TRUE */
/** @} */

View File

@ -25,15 +25,16 @@
* @{
*/
#include <string.h>
#include "hal.h"
#include "string.h" /* for memset() */
#if HAL_USE_SDC || defined(__DOXYGEN__)
#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/**
* @brief MMC switch mode.
*/
@ -41,7 +42,7 @@ typedef enum {
MMC_SWITCH_COMMAND_SET = 0,
MMC_SWITCH_SET_BITS = 1,
MMC_SWITCH_CLEAR_BITS = 2,
MMC_SWITCH_WRITE_BYTE = 3,
MMC_SWITCH_WRITE_BYTE = 3
} mmc_switch_t;
/**
@ -49,7 +50,7 @@ typedef enum {
*/
typedef enum {
SD_SWITCH_CHECK = 0,
SD_SWITCH_SET = 1,
SD_SWITCH_SET = 1
} sd_switch_t;
/**
@ -59,7 +60,7 @@ typedef enum {
SD_SWITCH_FUNCTION_SPEED = 0,
SD_SWITCH_FUNCTION_CMD_SYSTEM = 1,
SD_SWITCH_FUNCTION_DRIVER_STRENGTH = 2,
SD_SWITCH_FUNCTION_CURRENT_LIMIT = 3,
SD_SWITCH_FUNCTION_CURRENT_LIMIT = 3
} sd_switch_function_t;
/*===========================================================================*/
@ -106,17 +107,20 @@ static bool mode_detect(SDCDriver *sdcp) {
MMCSD_CMD8_PATTERN, resp)) {
sdcp->cardmode = SDC_MODE_CARDTYPE_SDV20;
/* Voltage verification.*/
if (((resp[0] >> 8) & 0xF) != 1)
if (((resp[0] >> 8U) & 0xFU) != 1U) {
return HAL_FAILED;
}
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
return HAL_FAILED;
}
}
else {
/* MMC or SD V1.1 detection.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
sdcp->cardmode = SDC_MODE_CARDTYPE_MMC;
}
else {
sdcp->cardmode = SDC_MODE_CARDTYPE_SDV11;
@ -144,19 +148,22 @@ static bool mmc_init(SDCDriver *sdcp) {
unsigned i;
uint32_t resp[1];
ocr = 0xC0FF8000;
ocr = 0xC0FF8000U;
i = 0;
while (true) {
if (sdc_lld_send_cmd_short(sdcp, MMCSD_CMD_INIT, ocr, resp))
if (sdc_lld_send_cmd_short(sdcp, MMCSD_CMD_INIT, ocr, resp)) {
return HAL_FAILED;
if ((resp[0] & 0x80000000) != 0) {
if (resp[0] & 0x40000000)
}
if ((resp[0] & 0x80000000U) != 0U) {
if ((resp[0] & 0x40000000U) != 0U) {
sdcp->cardmode |= SDC_MODE_HIGH_CAPACITY;
}
break;
}
if (++i >= SDC_INIT_RETRY)
if (++i >= (unsigned)SDC_INIT_RETRY) {
return HAL_FAILED;
osalThreadSleep(OSAL_MS2ST(10));
}
osalThreadSleepMilliseconds(10);
}
return HAL_SUCCESS;
@ -178,26 +185,32 @@ static bool sdc_init(SDCDriver *sdcp) {
uint32_t ocr;
uint32_t resp[1];
if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_SDV20)
ocr = 0xC0100000;
else
ocr = 0x80100000;
if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_SDV20) {
ocr = 0xC0100000U;
}
else {
ocr = 0x80100000U;
}
i = 0;
while (true) {
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
return HAL_FAILED;
if (sdc_lld_send_cmd_short(sdcp, MMCSD_CMD_APP_OP_COND, ocr, resp))
}
if (sdc_lld_send_cmd_short(sdcp, MMCSD_CMD_APP_OP_COND, ocr, resp)) {
return HAL_FAILED;
if ((resp[0] & 0x80000000) != 0) {
if (resp[0] & 0x40000000)
}
if ((resp[0] & 0x80000000U) != 0U) {
if ((resp[0] & 0x40000000U) != 0U) {
sdcp->cardmode |= SDC_MODE_HIGH_CAPACITY;
}
break;
}
if (++i >= SDC_INIT_RETRY)
if (++i >= (unsigned)SDC_INIT_RETRY) {
return HAL_FAILED;
osalThreadSleep(OSAL_MS2ST(10));
}
osalThreadSleepMilliseconds(10);
}
return HAL_SUCCESS;
@ -207,7 +220,7 @@ static bool sdc_init(SDCDriver *sdcp) {
* @brief Constructs CMD6 argument for MMC.
*
* @param[in] access EXT_CSD access mode
* @param[in] index EXT_CSD byte number
* @param[in] idx EXT_CSD byte number
* @param[in] value value to be written in target field
* @param[in] cmd_set switch current command set
*
@ -215,13 +228,13 @@ static bool sdc_init(SDCDriver *sdcp) {
*
* @notapi
*/
static uint32_t mmc_cmd6_construct(mmc_switch_t access, uint8_t index,
uint8_t value, uint8_t cmd_set) {
static uint32_t mmc_cmd6_construct(mmc_switch_t access, uint32_t idx,
uint32_t value, uint32_t cmd_set) {
osalDbgAssert((index <= 191), "This field is not writable");
osalDbgAssert((cmd_set < 8), "This field has only 3 bits");
osalDbgAssert(idx <= 191U, "This field is not writable");
osalDbgAssert(cmd_set < 8U, "This field has only 3 bits");
return (access << 24) | (index << 16) | (value << 8) | cmd_set;
return ((uint32_t)access << 24U) | (idx << 16U) | (value << 8U) | cmd_set;
}
/**
@ -235,15 +248,16 @@ static uint32_t mmc_cmd6_construct(mmc_switch_t access, uint8_t index,
*
* @notapi
*/
uint32_t sdc_cmd6_construct(sd_switch_t mode, sd_switch_function_t function,
uint8_t value) {
static uint32_t sdc_cmd6_construct(sd_switch_t mode,
sd_switch_function_t function,
uint32_t value) {
uint32_t ret = 0xFFFFFF;
osalDbgAssert((value < 16), "This field has only 4 bits");
osalDbgAssert((value < 16U), "This field has only 4 bits");
ret &= ~(0xF << (function * 4));
ret |= value << (function * 4);
return ret | (mode << 31);
ret &= ~((uint32_t)0xFU << ((uint32_t)function * 4U));
ret |= value << ((uint32_t)function * 4U);
return ret | ((uint32_t)mode << 31U);
}
/**
@ -259,9 +273,9 @@ uint32_t sdc_cmd6_construct(sd_switch_t mode, sd_switch_function_t function,
static uint16_t sdc_cmd6_extract_info(sd_switch_function_t function,
const uint8_t *buf) {
size_t start = 12 - function * 2;
unsigned start = 12U - ((unsigned)function * 2U);
return (buf[start] << 8) | buf[start+1];
return ((uint16_t)buf[start] << 8U) | (uint16_t)buf[start + 1U];
}
/**
@ -280,13 +294,15 @@ static bool sdc_cmd6_check_status(sd_switch_function_t function,
const uint8_t *buf) {
uint32_t tmp;
uint8_t status;
uint32_t status;
tmp = (buf[14] << 16) | (buf[15] << 8) | buf[16];
status = (tmp >> (function * 4)) & 0xF;
if (0xF != status)
tmp = ((uint32_t)buf[14] << 16U) |
((uint32_t)buf[15] << 8U) |
(uint32_t)buf[16];
status = (tmp >> ((uint32_t)function * 4U)) & 0xFU;
if (0xFU != status) {
return HAL_SUCCESS;
else
}
return HAL_FAILED;
}
@ -311,20 +327,25 @@ static bool sdc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
*clk = SDC_CLK_25MHz;
/* Read switch functions' register.*/
if (sdc_lld_read_special(sdcp, tmp, N, MMCSD_CMD_SWITCH, 0))
if (sdc_lld_read_special(sdcp, tmp, N, MMCSD_CMD_SWITCH, 0)) {
return HAL_FAILED;
}
/* Check card capabilities parsing acquired data.*/
if ((sdc_cmd6_extract_info(SD_SWITCH_FUNCTION_SPEED, tmp) & 2) == 2) {
if ((sdc_cmd6_extract_info(SD_SWITCH_FUNCTION_SPEED, tmp) & 2U) == 2U) {
/* Construct command to set the bus speed.*/
cmdarg = sdc_cmd6_construct(SD_SWITCH_SET, SD_SWITCH_FUNCTION_SPEED, 1);
/* Write constructed command and read operation status in single call.*/
if (sdc_lld_read_special(sdcp, tmp, N, MMCSD_CMD_SWITCH, cmdarg))
if (sdc_lld_read_special(sdcp, tmp, N, MMCSD_CMD_SWITCH, cmdarg)) {
return HAL_FAILED;
}
/* Check card answer for success status bits.*/
if (HAL_SUCCESS == sdc_cmd6_check_status(SD_SWITCH_FUNCTION_SPEED, tmp))
if (HAL_SUCCESS == sdc_cmd6_check_status(SD_SWITCH_FUNCTION_SPEED, tmp)) {
*clk = SDC_CLK_50MHz;
}
}
return HAL_SUCCESS;
}
@ -341,7 +362,7 @@ static bool sdc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
*
* @notapi
*/
static sdcbusclk_t mmc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
static bool mmc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
uint32_t cmdarg;
uint32_t resp[1];
uint8_t *scratchpad = sdcp->config->scratchpad;
@ -350,13 +371,15 @@ static sdcbusclk_t mmc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
*clk = SDC_CLK_25MHz;
/* Use safe default when there is no space for data.*/
if (NULL == scratchpad)
if (NULL == scratchpad) {
return HAL_SUCCESS;
}
cmdarg = mmc_cmd6_construct(MMC_SWITCH_WRITE_BYTE, 185, 1, 0);
if (!(sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SWITCH, cmdarg, resp) ||
MMCSD_R1_ERROR(resp[0])))
MMCSD_R1_ERROR(resp[0]))) {
*clk = SDC_CLK_50MHz;
}
return HAL_SUCCESS;
}
@ -375,9 +398,9 @@ static sdcbusclk_t mmc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
*/
static bool detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
if (SDC_MODE_CARDTYPE_MMC == (sdcp->cardmode & SDC_MODE_CARDTYPE_MASK))
if (SDC_MODE_CARDTYPE_MMC == (sdcp->cardmode & SDC_MODE_CARDTYPE_MASK)) {
return mmc_detect_bus_clk(sdcp, clk);
else
}
return sdc_detect_bus_clk(sdcp, clk);
}
@ -402,12 +425,15 @@ static bool sdc_set_bus_width(SDCDriver *sdcp) {
else if (SDC_MODE_4BIT == sdcp->config->bus_width) {
sdc_lld_set_bus_mode(sdcp, SDC_MODE_4BIT);
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, sdcp->rca, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
return HAL_FAILED;
}
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SET_BUS_WIDTH, 2, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
return HAL_FAILED;
}
}
else {
/* SD card does not support 8bit bus.*/
return HAL_FAILED;
@ -435,13 +461,15 @@ static bool mmc_set_bus_width(SDCDriver *sdcp) {
case SDC_MODE_1BIT:
/* Nothing to do. Bus is already in 1bit mode.*/
return HAL_SUCCESS;
break;
case SDC_MODE_4BIT:
cmdarg = mmc_cmd6_construct(MMC_SWITCH_WRITE_BYTE, 183, 1, 0);
break;
case SDC_MODE_8BIT:
cmdarg = mmc_cmd6_construct(MMC_SWITCH_WRITE_BYTE, 183, 2, 0);
break;
default:
osalDbgAssert(false, "unexpected case");
break;
}
sdc_lld_set_bus_mode(sdcp, sdcp->config->bus_width);
@ -467,19 +495,21 @@ static bool mmc_set_bus_width(SDCDriver *sdcp) {
bool _sdc_wait_for_transfer_state(SDCDriver *sdcp) {
uint32_t resp[1];
while (TRUE) {
while (true) {
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEND_STATUS,
sdcp->rca, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
return HAL_FAILED;
}
switch (MMCSD_R1_STS(resp[0])) {
case MMCSD_STS_TRAN:
return HAL_SUCCESS;
case MMCSD_STS_DATA:
case MMCSD_STS_RCV:
case MMCSD_STS_PRG:
#if SDC_NICE_WAITING
osalThreadSleep(OSAL_MS2ST(1));
#if SDC_NICE_WAITING == TRUE
osalThreadSleepMilliseconds(1);
#endif
continue;
default:
@ -488,8 +518,6 @@ bool _sdc_wait_for_transfer_state(SDCDriver *sdcp) {
return HAL_FAILED;
}
}
/* If something going too wrong.*/
return HAL_FAILED;
}
/*===========================================================================*/
@ -598,56 +626,66 @@ bool sdcConnect(SDCDriver *sdcp) {
sdc_lld_send_cmd_none(sdcp, MMCSD_CMD_GO_IDLE_STATE, 0);
/* Detect card type.*/
if (HAL_FAILED == mode_detect(sdcp))
if (HAL_FAILED == mode_detect(sdcp)) {
goto failed;
}
/* Perform specific initialization procedure.*/
if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_MMC) {
if (HAL_FAILED == mmc_init(sdcp))
if (HAL_FAILED == mmc_init(sdcp)) {
goto failed;
}
}
else {
if (HAL_FAILED == sdc_init(sdcp))
if (HAL_FAILED == sdc_init(sdcp)) {
goto failed;
}
}
/* Reads CID.*/
if (sdc_lld_send_cmd_long_crc(sdcp, MMCSD_CMD_ALL_SEND_CID, 0, sdcp->cid))
if (sdc_lld_send_cmd_long_crc(sdcp, MMCSD_CMD_ALL_SEND_CID, 0, sdcp->cid)) {
goto failed;
}
/* Asks for the RCA.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEND_RELATIVE_ADDR,
0, &sdcp->rca))
0, &sdcp->rca)) {
goto failed;
}
/* Reads CSD.*/
if (sdc_lld_send_cmd_long_crc(sdcp, MMCSD_CMD_SEND_CSD,
sdcp->rca, sdcp->csd))
sdcp->rca, sdcp->csd)) {
goto failed;
}
/* Selects the card for operations.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEL_DESEL_CARD,
sdcp->rca, resp))
sdcp->rca, resp)) {
goto failed;
}
/* Switches to high speed.*/
if (HAL_SUCCESS != detect_bus_clk(sdcp, &clk))
if (HAL_SUCCESS != detect_bus_clk(sdcp, &clk)) {
goto failed;
}
sdc_lld_set_data_clk(sdcp, clk);
/* Reads extended CSD if needed and possible.*/
if (SDC_MODE_CARDTYPE_MMC == (sdcp->cardmode & SDC_MODE_CARDTYPE_MASK)) {
/* The card is a MMC, checking if it is a large device.*/
if (_mmcsd_get_slice(sdcp->csd, MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE) > 1) {
if (_mmcsd_get_slice(sdcp->csd, MMCSD_CSD_MMC_CSD_STRUCTURE_SLICE) > 1U) {
uint8_t *ext_csd = sdcp->config->scratchpad;
/* Size detection requires the buffer.*/
if (NULL == ext_csd)
if (NULL == ext_csd) {
goto failed;
}
if(sdc_lld_read_special(sdcp, ext_csd, 512, MMCSD_CMD_SEND_EXT_CSD, 0))
if(sdc_lld_read_special(sdcp, ext_csd, 512, MMCSD_CMD_SEND_EXT_CSD, 0)) {
goto failed;
}
/* Capacity from the EXT_CSD.*/
sdcp->capacity = _mmcsd_get_capacity_ext(ext_csd);
@ -665,20 +703,26 @@ bool sdcConnect(SDCDriver *sdcp) {
/* Block length fixed at 512 bytes.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SET_BLOCKLEN,
MMCSD_BLOCK_SIZE, resp) ||
MMCSD_R1_ERROR(resp[0]))
MMCSD_R1_ERROR(resp[0])) {
goto failed;
}
/* Switches to wide bus mode.*/
switch (sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) {
case SDC_MODE_CARDTYPE_SDV11:
case SDC_MODE_CARDTYPE_SDV20:
if (HAL_FAILED == sdc_set_bus_width(sdcp))
if (HAL_FAILED == sdc_set_bus_width(sdcp)) {
goto failed;
}
break;
case SDC_MODE_CARDTYPE_MMC:
if (HAL_FAILED == mmc_set_bus_width(sdcp))
if (HAL_FAILED == mmc_set_bus_width(sdcp)) {
goto failed;
}
break;
default:
/* Unknown type.*/
goto failed;
}
/* Initialization complete.*/
@ -749,10 +793,10 @@ bool sdcDisconnect(SDCDriver *sdcp) {
bool sdcRead(SDCDriver *sdcp, uint32_t startblk, uint8_t *buf, uint32_t n) {
bool status;
osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0));
osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0U));
osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
if ((startblk + n - 1) > sdcp->capacity){
if ((startblk + n - 1U) > sdcp->capacity){
sdcp->errors |= SDC_OVERFLOW_ERROR;
return HAL_FAILED;
}
@ -787,10 +831,10 @@ bool sdcWrite(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) {
bool status;
osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0));
osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0U));
osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
if ((startblk + n - 1) > sdcp->capacity){
if ((startblk + n - 1U) > sdcp->capacity){
sdcp->errors |= SDC_OVERFLOW_ERROR;
return HAL_FAILED;
}
@ -842,8 +886,9 @@ bool sdcSync(SDCDriver *sdcp) {
osalDbgCheck(sdcp != NULL);
if (sdcp->state != BLK_READY)
if (sdcp->state != BLK_READY) {
return HAL_FAILED;
}
/* Synchronization operation in progress.*/
sdcp->state = BLK_SYNCING;
@ -871,8 +916,9 @@ bool sdcGetInfo(SDCDriver *sdcp, BlockDeviceInfo *bdip) {
osalDbgCheck((sdcp != NULL) && (bdip != NULL));
if (sdcp->state != BLK_READY)
if (sdcp->state != BLK_READY) {
return HAL_FAILED;
}
bdip->blk_num = sdcp->capacity;
bdip->blk_size = MMCSD_BLOCK_SIZE;
@ -880,7 +926,7 @@ bool sdcGetInfo(SDCDriver *sdcp, BlockDeviceInfo *bdip) {
return HAL_SUCCESS;
}
#endif /* HAL_USE_SDC */
#endif /* HAL_USE_SDC == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -82,14 +82,14 @@ static msg_t gett(void *ip, systime_t timeout) {
return iqGetTimeout(&((SerialDriver *)ip)->iqueue, timeout);
}
static size_t writet(void *ip, const uint8_t *bp, size_t n, systime_t time) {
static size_t writet(void *ip, const uint8_t *bp, size_t n, systime_t timeout) {
return oqWriteTimeout(&((SerialDriver *)ip)->oqueue, bp, n, time);
return oqWriteTimeout(&((SerialDriver *)ip)->oqueue, bp, n, timeout);
}
static size_t readt(void *ip, uint8_t *bp, size_t n, systime_t time) {
static size_t readt(void *ip, uint8_t *bp, size_t n, systime_t timeout) {
return iqReadTimeout(&((SerialDriver *)ip)->iqueue, bp, n, time);
return iqReadTimeout(&((SerialDriver *)ip)->iqueue, bp, n, timeout);
}
static const struct SerialDriverVMT vmt = {
@ -237,6 +237,6 @@ msg_t sdRequestDataI(SerialDriver *sdp) {
return b;
}
#endif /* HAL_USE_SERIAL */
#endif /* HAL_USE_SERIAL == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_SERIAL_USB || defined(__DOXYGEN__)
#if (HAL_USE_SERIAL_USB == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -89,14 +89,14 @@ static msg_t gett(void *ip, systime_t timeout) {
return iqGetTimeout(&((SerialUSBDriver *)ip)->iqueue, timeout);
}
static size_t writet(void *ip, const uint8_t *bp, size_t n, systime_t time) {
static size_t writet(void *ip, const uint8_t *bp, size_t n, systime_t timeout) {
return oqWriteTimeout(&((SerialUSBDriver *)ip)->oqueue, bp, n, time);
return oqWriteTimeout(&((SerialUSBDriver *)ip)->oqueue, bp, n, timeout);
}
static size_t readt(void *ip, uint8_t *bp, size_t n, systime_t time) {
static size_t readt(void *ip, uint8_t *bp, size_t n, systime_t timeout) {
return iqReadTimeout(&((SerialUSBDriver *)ip)->iqueue, bp, n, time);
return iqReadTimeout(&((SerialUSBDriver *)ip)->iqueue, bp, n, timeout);
}
static const struct SerialUSBDriverVMT vmt = {
@ -116,15 +116,16 @@ static void inotify(io_queue_t *qp) {
/* If the USB driver is not in the appropriate state then transactions
must not be started.*/
if ((usbGetDriverStateI(sdup->config->usbp) != USB_ACTIVE) ||
(sdup->state != SDU_READY))
(sdup->state != SDU_READY)) {
return;
}
/* If there is in the queue enough space to hold at least one packet and
a transaction is not yet started then a new transaction is started for
the available space.*/
maxsize = sdup->config->usbp->epc[sdup->config->bulk_out]->out_maxsize;
if (!usbGetReceiveStatusI(sdup->config->usbp, sdup->config->bulk_out) &&
((n = iqGetEmptyI(&sdup->iqueue)) >= maxsize)) {
if (!usbGetReceiveStatusI(sdup->config->usbp, sdup->config->bulk_out)) {
if ((n = iqGetEmptyI(&sdup->iqueue)) >= maxsize) {
osalSysUnlock();
n = (n / maxsize) * maxsize;
@ -133,7 +134,8 @@ static void inotify(io_queue_t *qp) {
&sdup->iqueue, n);
osalSysLock();
usbStartReceiveI(sdup->config->usbp, sdup->config->bulk_out);
(void) usbStartReceiveI(sdup->config->usbp, sdup->config->bulk_out);
}
}
}
@ -149,13 +151,14 @@ static void onotify(io_queue_t *qp) {
/* If the USB driver is not in the appropriate state then transactions
must not be started.*/
if ((usbGetDriverStateI(sdup->config->usbp) != USB_ACTIVE) ||
(sdup->state != SDU_READY))
(sdup->state != SDU_READY)) {
return;
}
/* If there is not an ongoing transaction and the output queue contains
data then a new transaction is started.*/
if (!usbGetTransmitStatusI(sdup->config->usbp, sdup->config->bulk_in) &&
((n = oqGetFullI(&sdup->oqueue)) > 0)) {
if (!usbGetTransmitStatusI(sdup->config->usbp, sdup->config->bulk_in)) {
if ((n = oqGetFullI(&sdup->oqueue)) > 0U) {
osalSysUnlock();
usbPrepareQueuedTransmit(sdup->config->usbp,
@ -163,7 +166,8 @@ static void onotify(io_queue_t *qp) {
&sdup->oqueue, n);
osalSysLock();
usbStartTransmitI(sdup->config->usbp, sdup->config->bulk_in);
(void) usbStartTransmitI(sdup->config->usbp, sdup->config->bulk_in);
}
}
}
@ -215,9 +219,9 @@ void sduStart(SerialUSBDriver *sdup, const SerialUSBConfig *config) {
osalSysLock();
osalDbgAssert((sdup->state == SDU_STOP) || (sdup->state == SDU_READY),
"invalid state");
usbp->in_params[config->bulk_in - 1] = sdup;
usbp->out_params[config->bulk_out - 1] = sdup;
usbp->in_params[config->int_in - 1] = sdup;
usbp->in_params[config->bulk_in - 1U] = sdup;
usbp->out_params[config->bulk_out - 1U] = sdup;
usbp->in_params[config->int_in - 1U] = sdup;
sdup->config = config;
sdup->state = SDU_READY;
osalSysUnlock();
@ -238,14 +242,13 @@ void sduStop(SerialUSBDriver *sdup) {
osalDbgCheck(sdup != NULL);
osalSysLock();
osalDbgAssert((sdup->state == SDU_STOP) || (sdup->state == SDU_READY),
"invalid state");
/* Driver in stopped state.*/
usbp->in_params[sdup->config->bulk_in - 1] = NULL;
usbp->out_params[sdup->config->bulk_out - 1] = NULL;
usbp->in_params[sdup->config->int_in - 1] = NULL;
usbp->in_params[sdup->config->bulk_in - 1U] = NULL;
usbp->out_params[sdup->config->bulk_out - 1U] = NULL;
usbp->in_params[sdup->config->int_in - 1U] = NULL;
sdup->state = SDU_STOP;
/* Queues reset in order to signal the driver stop to the application.*/
@ -253,7 +256,6 @@ void sduStop(SerialUSBDriver *sdup) {
iqResetI(&sdup->iqueue);
iqResetI(&sdup->oqueue);
osalOsRescheduleS();
osalSysUnlock();
}
@ -274,7 +276,7 @@ void sduConfigureHookI(SerialUSBDriver *sdup) {
/* Starts the first OUT transaction immediately.*/
usbPrepareQueuedReceive(usbp, sdup->config->bulk_out, &sdup->iqueue,
usbp->epc[sdup->config->bulk_out]->out_maxsize);
usbStartReceiveI(usbp, sdup->config->bulk_out);
(void) usbStartReceiveI(usbp, sdup->config->bulk_out);
}
/**
@ -323,15 +325,17 @@ bool sduRequestsHook(USBDriver *usbp) {
*/
void sduDataTransmitted(USBDriver *usbp, usbep_t ep) {
size_t n;
SerialUSBDriver *sdup = usbp->in_params[ep - 1];
SerialUSBDriver *sdup = usbp->in_params[ep - 1U];
if (sdup == NULL)
if (sdup == NULL) {
return;
}
osalSysLockFromISR();
chnAddFlagsI(sdup, CHN_OUTPUT_EMPTY);
if ((n = oqGetFullI(&sdup->oqueue)) > 0) {
/*lint -save -e9013 [15.7] There is no else because it is not needed.*/
if ((n = oqGetFullI(&sdup->oqueue)) > 0U) {
/* The endpoint cannot be busy, we are in the context of the callback,
so it is safe to transmit without a check.*/
osalSysUnlockFromISR();
@ -339,11 +343,11 @@ void sduDataTransmitted(USBDriver *usbp, usbep_t ep) {
usbPrepareQueuedTransmit(usbp, ep, &sdup->oqueue, n);
osalSysLockFromISR();
usbStartTransmitI(usbp, ep);
(void) usbStartTransmitI(usbp, ep);
}
else if ((usbp->epc[ep]->in_state->txsize > 0) &&
!(usbp->epc[ep]->in_state->txsize &
(usbp->epc[ep]->in_maxsize - 1))) {
else if ((usbp->epc[ep]->in_state->txsize > 0U) &&
((usbp->epc[ep]->in_state->txsize &
((size_t)usbp->epc[ep]->in_maxsize - 1U)) == 0U)) {
/* Transmit zero sized packet in case the last one has maximum allowed
size. Otherwise the recipient may expect more data coming soon and
not return buffered data to app. See section 5.8.3 Bulk Transfer
@ -353,8 +357,9 @@ void sduDataTransmitted(USBDriver *usbp, usbep_t ep) {
usbPrepareQueuedTransmit(usbp, ep, &sdup->oqueue, 0);
osalSysLockFromISR();
usbStartTransmitI(usbp, ep);
(void) usbStartTransmitI(usbp, ep);
}
/*lint -restore*/
osalSysUnlockFromISR();
}
@ -369,10 +374,11 @@ void sduDataTransmitted(USBDriver *usbp, usbep_t ep) {
*/
void sduDataReceived(USBDriver *usbp, usbep_t ep) {
size_t n, maxsize;
SerialUSBDriver *sdup = usbp->out_params[ep - 1];
SerialUSBDriver *sdup = usbp->out_params[ep - 1U];
if (sdup == NULL)
if (sdup == NULL) {
return;
}
osalSysLockFromISR();
chnAddFlagsI(sdup, CHN_INPUT_AVAILABLE);
@ -389,9 +395,8 @@ void sduDataReceived(USBDriver *usbp, usbep_t ep) {
usbPrepareQueuedReceive(usbp, ep, &sdup->iqueue, n);
osalSysLockFromISR();
usbStartReceiveI(usbp, ep);
(void) usbStartReceiveI(usbp, ep);
}
osalSysUnlockFromISR();
}
@ -409,6 +414,6 @@ void sduInterruptTransmitted(USBDriver *usbp, usbep_t ep) {
(void)ep;
}
#endif /* HAL_USE_SERIAL */
#endif /* HAL_USE_SERIAL_USB == TRUE */
/** @} */

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_SPI || defined(__DOXYGEN__)
#if (HAL_USE_SPI == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -72,12 +72,12 @@ void spiObjectInit(SPIDriver *spip) {
spip->state = SPI_STOP;
spip->config = NULL;
#if SPI_USE_WAIT
#if SPI_USE_WAIT == TRUE
spip->thread = NULL;
#endif /* SPI_USE_WAIT */
#if SPI_USE_MUTUAL_EXCLUSION
#endif
#if SPI_USE_MUTUAL_EXCLUSION == TRUE
osalMutexObjectInit(&spip->mutex);
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#endif
#if defined(SPI_DRIVER_EXT_INIT_HOOK)
SPI_DRIVER_EXT_INIT_HOOK(spip);
#endif
@ -175,7 +175,7 @@ void spiUnselect(SPIDriver *spip) {
*/
void spiStartIgnore(SPIDriver *spip, size_t n) {
osalDbgCheck((spip != NULL) && (n > 0));
osalDbgCheck((spip != NULL) && (n > 0U));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -203,7 +203,8 @@ void spiStartIgnore(SPIDriver *spip, size_t n) {
void spiStartExchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL) && (txbuf != NULL));
osalDbgCheck((spip != NULL) && (n > 0U) &&
(rxbuf != NULL) && (txbuf != NULL));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -228,7 +229,7 @@ void spiStartExchange(SPIDriver *spip, size_t n,
*/
void spiStartSend(SPIDriver *spip, size_t n, const void *txbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL));
osalDbgCheck((spip != NULL) && (n > 0U) && (txbuf != NULL));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -253,7 +254,7 @@ void spiStartSend(SPIDriver *spip, size_t n, const void *txbuf) {
*/
void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL));
osalDbgCheck((spip != NULL) && (n > 0U) && (rxbuf != NULL));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -261,7 +262,7 @@ void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) {
osalSysUnlock();
}
#if SPI_USE_WAIT || defined(__DOXYGEN__)
#if (SPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
/**
* @brief Ignores data on the SPI bus.
* @details This synchronous function performs the transmission of a series of
@ -278,7 +279,7 @@ void spiStartReceive(SPIDriver *spip, size_t n, void *rxbuf) {
*/
void spiIgnore(SPIDriver *spip, size_t n) {
osalDbgCheck((spip != NULL) && (n > 0));
osalDbgCheck((spip != NULL) && (n > 0U));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -309,7 +310,7 @@ void spiIgnore(SPIDriver *spip, size_t n) {
void spiExchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) &&
osalDbgCheck((spip != NULL) && (n > 0U) &&
(rxbuf != NULL) && (txbuf != NULL));
osalSysLock();
@ -338,7 +339,7 @@ void spiExchange(SPIDriver *spip, size_t n,
*/
void spiSend(SPIDriver *spip, size_t n, const void *txbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (txbuf != NULL));
osalDbgCheck((spip != NULL) && (n > 0U) && (txbuf != NULL));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -366,7 +367,7 @@ void spiSend(SPIDriver *spip, size_t n, const void *txbuf) {
*/
void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) {
osalDbgCheck((spip != NULL) && (n > 0) && (rxbuf != NULL));
osalDbgCheck((spip != NULL) && (n > 0U) && (rxbuf != NULL));
osalSysLock();
osalDbgAssert(spip->state == SPI_READY, "not ready");
@ -375,9 +376,9 @@ void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) {
_spi_wait_s(spip);
osalSysUnlock();
}
#endif /* SPI_USE_WAIT */
#endif /* SPI_USE_WAIT == TRUE */
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if (SPI_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
/**
* @brief Gains exclusive access to the SPI bus.
* @details This function tries to gain ownership to the SPI bus, if the bus
@ -411,8 +412,8 @@ void spiReleaseBus(SPIDriver *spip) {
osalMutexUnlock(&spip->mutex);
}
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#endif /* SPI_USE_MUTUAL_EXCLUSION == TRUE */
#endif /* HAL_USE_SPI */
#endif /* HAL_USE_SPI == TRUE */
/** @} */

View File

@ -73,15 +73,15 @@ void stInit(void) {
* @note This functionality is only available in free running mode, the
* behavior in periodic mode is undefined.
*
* @param[in] time the time to be set for the first alarm
* @param[in] abstime the time to be set for the first alarm
*
* @api
*/
void stStartAlarm(systime_t time) {
void stStartAlarm(systime_t abstime) {
osalDbgAssert(stIsAlarmActive() == false, "already active");
st_lld_start_alarm(time);
st_lld_start_alarm(abstime);
}
/**
@ -101,15 +101,15 @@ void stStopAlarm(void) {
* @note This functionality is only available in free running mode, the
* behavior in periodic mode is undefined.
*
* @param[in] time the time to be set for the next alarm
* @param[in] abstime the time to be set for the next alarm
*
* @api
*/
void stSetAlarm(systime_t time) {
void stSetAlarm(systime_t abstime) {
osalDbgAssert(stIsAlarmActive() != false, "not active");
st_lld_set_alarm(time);
st_lld_set_alarm(abstime);
}
/**

View File

@ -27,7 +27,7 @@
#include "hal.h"
#if HAL_USE_UART || defined(__DOXYGEN__)
#if (HAL_USE_UART == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -137,7 +137,7 @@ void uartStop(UARTDriver *uartp) {
*/
void uartStartSend(UARTDriver *uartp, size_t n, const void *txbuf) {
osalDbgCheck((uartp != NULL) && (n > 0) && (txbuf != NULL));
osalDbgCheck((uartp != NULL) && (n > 0U) && (txbuf != NULL));
osalSysLock();
osalDbgAssert(uartp->state == UART_READY, "is active");
@ -163,7 +163,7 @@ void uartStartSend(UARTDriver *uartp, size_t n, const void *txbuf) {
void uartStartSendI(UARTDriver *uartp, size_t n, const void *txbuf) {
osalDbgCheckClassI();
osalDbgCheck((uartp != NULL) && (n > 0) && (txbuf != NULL));
osalDbgCheck((uartp != NULL) && (n > 0U) && (txbuf != NULL));
osalDbgAssert(uartp->state == UART_READY, "is active");
osalDbgAssert(uartp->txstate != UART_TX_ACTIVE, "tx active");
@ -195,9 +195,11 @@ size_t uartStopSend(UARTDriver *uartp) {
n = uart_lld_stop_send(uartp);
uartp->txstate = UART_TX_IDLE;
}
else
else {
n = 0;
}
osalSysUnlock();
return n;
}
@ -241,7 +243,7 @@ size_t uartStopSendI(UARTDriver *uartp) {
*/
void uartStartReceive(UARTDriver *uartp, size_t n, void *rxbuf) {
osalDbgCheck((uartp != NULL) && (n > 0) && (rxbuf != NULL));
osalDbgCheck((uartp != NULL) && (n > 0U) && (rxbuf != NULL));
osalSysLock();
osalDbgAssert(uartp->state == UART_READY, "is active");
@ -267,7 +269,7 @@ void uartStartReceive(UARTDriver *uartp, size_t n, void *rxbuf) {
void uartStartReceiveI(UARTDriver *uartp, size_t n, void *rxbuf) {
osalDbgCheckClassI();
osalDbgCheck((uartp != NULL) && (n > 0) && (rxbuf != NULL));
osalDbgCheck((uartp != NULL) && (n > 0U) && (rxbuf != NULL));
osalDbgAssert(uartp->state == UART_READY, "is active");
osalDbgAssert(uartp->rxstate != UART_RX_ACTIVE, "rx active");
@ -299,9 +301,11 @@ size_t uartStopReceive(UARTDriver *uartp) {
n = uart_lld_stop_receive(uartp);
uartp->rxstate = UART_RX_IDLE;
}
else
else {
n = 0;
}
osalSysUnlock();
return n;
}
@ -332,6 +336,6 @@ size_t uartStopReceiveI(UARTDriver *uartp) {
return 0;
}
#endif /* HAL_USE_UART */
#endif /* HAL_USE_UART == TRUE */
/** @} */

View File

@ -29,7 +29,7 @@
#include "hal.h"
#if HAL_USE_USB || defined(__DOXYGEN__)
#if (HAL_USE_USB == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
@ -51,6 +51,14 @@ static const uint8_t halted_status[] = {0x01, 0x00};
/* Driver local functions. */
/*===========================================================================*/
static uint16_t get_hword(uint8_t *p) {
uint16_t hw;
hw = (uint16_t)*p++;
hw |= (uint16_t)*p << 8U;
return hw;
}
/**
* @brief SET ADDRESS transaction callback.
*
@ -80,130 +88,154 @@ static bool default_handler(USBDriver *usbp) {
const USBDescriptor *dp;
/* Decoding the request.*/
switch (((usbp->setup[0] & (USB_RTYPE_RECIPIENT_MASK |
switch ((((uint32_t)usbp->setup[0] & (USB_RTYPE_RECIPIENT_MASK |
USB_RTYPE_TYPE_MASK)) |
(usbp->setup[1] << 8))) {
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_GET_STATUS << 8):
((uint32_t)usbp->setup[1] << 8U))) {
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_GET_STATUS << 8):
/* Just returns the current status word.*/
usbSetupTransfer(usbp, (uint8_t *)&usbp->status, 2, NULL);
return true;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_CLEAR_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_CLEAR_FEATURE << 8):
/* Only the DEVICE_REMOTE_WAKEUP is handled here, any other feature
number is handled as an error.*/
if (usbp->setup[2] == USB_FEATURE_DEVICE_REMOTE_WAKEUP) {
usbp->status &= ~2;
usbp->status &= ~2U;
usbSetupTransfer(usbp, NULL, 0, NULL);
return true;
}
return false;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_SET_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_SET_FEATURE << 8):
/* Only the DEVICE_REMOTE_WAKEUP is handled here, any other feature
number is handled as an error.*/
if (usbp->setup[2] == USB_FEATURE_DEVICE_REMOTE_WAKEUP) {
usbp->status |= 2;
usbp->status |= 2U;
usbSetupTransfer(usbp, NULL, 0, NULL);
return true;
}
return false;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_SET_ADDRESS << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_SET_ADDRESS << 8):
/* The SET_ADDRESS handling can be performed here or postponed after
the status packed depending on the USB_SET_ADDRESS_MODE low
driver setting.*/
#if USB_SET_ADDRESS_MODE == USB_EARLY_SET_ADDRESS
if ((usbp->setup[0] == USB_RTYPE_RECIPIENT_DEVICE) &&
(usbp->setup[1] == USB_REQ_SET_ADDRESS))
(usbp->setup[1] == USB_REQ_SET_ADDRESS)) {
set_address(usbp);
}
usbSetupTransfer(usbp, NULL, 0, NULL);
#else
usbSetupTransfer(usbp, NULL, 0, set_address);
#endif
return true;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_GET_DESCRIPTOR << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_GET_DESCRIPTOR << 8):
/* Handling descriptor requests from the host.*/
dp = usbp->config->get_descriptor_cb(
usbp, usbp->setup[3], usbp->setup[2],
usbFetchWord(&usbp->setup[4]));
if (dp == NULL)
dp = usbp->config->get_descriptor_cb(usbp, usbp->setup[3],
usbp->setup[2],
get_hword(&usbp->setup[4]));
if (dp == NULL) {
return false;
}
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)dp->ud_string, dp->ud_size, NULL);
/*lint -restore*/
return true;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_GET_CONFIGURATION << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_GET_CONFIGURATION << 8):
/* Returning the last selected configuration.*/
usbSetupTransfer(usbp, &usbp->configuration, 1, NULL);
return true;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_SET_CONFIGURATION << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_SET_CONFIGURATION << 8):
/* Handling configuration selection from the host.*/
usbp->configuration = usbp->setup[2];
if (usbp->configuration == 0)
if (usbp->configuration == 0U) {
usbp->state = USB_SELECTED;
else
}
else {
usbp->state = USB_ACTIVE;
}
_usb_isr_invoke_event_cb(usbp, USB_EVENT_CONFIGURED);
usbSetupTransfer(usbp, NULL, 0, NULL);
return true;
case USB_RTYPE_RECIPIENT_INTERFACE | (USB_REQ_GET_STATUS << 8):
case USB_RTYPE_RECIPIENT_ENDPOINT | (USB_REQ_SYNCH_FRAME << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_INTERFACE | ((uint32_t)USB_REQ_GET_STATUS << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_ENDPOINT | ((uint32_t)USB_REQ_SYNCH_FRAME << 8):
/* Just sending two zero bytes, the application can change the behavior
using a hook..*/
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)zero_status, 2, NULL);
/*lint -restore*/
return true;
case USB_RTYPE_RECIPIENT_ENDPOINT | (USB_REQ_GET_STATUS << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_ENDPOINT | ((uint32_t)USB_REQ_GET_STATUS << 8):
/* Sending the EP status.*/
if (usbp->setup[4] & 0x80) {
switch (usb_lld_get_status_in(usbp, usbp->setup[4] & 0x0F)) {
if ((usbp->setup[4] & 0x80U) != 0U) {
switch (usb_lld_get_status_in(usbp, usbp->setup[4] & 0x0FU)) {
case EP_STATUS_STALLED:
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)halted_status, 2, NULL);
/*lint -restore*/
return true;
case EP_STATUS_ACTIVE:
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)active_status, 2, NULL);
/*lint -restore*/
return true;
case EP_STATUS_DISABLED:
default:
return false;
}
}
else {
switch (usb_lld_get_status_out(usbp, usbp->setup[4] & 0x0F)) {
switch (usb_lld_get_status_out(usbp, usbp->setup[4] & 0x0FU)) {
case EP_STATUS_STALLED:
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)halted_status, 2, NULL);
/*lint -restore*/
return true;
case EP_STATUS_ACTIVE:
/*lint -save -e9005 [11.8] Removing const is fine.*/
usbSetupTransfer(usbp, (uint8_t *)active_status, 2, NULL);
/*lint -restore*/
return true;
case EP_STATUS_DISABLED:
default:
return false;
}
}
case USB_RTYPE_RECIPIENT_ENDPOINT | (USB_REQ_CLEAR_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_ENDPOINT | ((uint32_t)USB_REQ_CLEAR_FEATURE << 8):
/* Only ENDPOINT_HALT is handled as feature.*/
if (usbp->setup[2] != USB_FEATURE_ENDPOINT_HALT)
if (usbp->setup[2] != USB_FEATURE_ENDPOINT_HALT) {
return false;
}
/* Clearing the EP status, not valid for EP0, it is ignored in that case.*/
if ((usbp->setup[4] & 0x0F) > 0) {
if (usbp->setup[4] & 0x80)
usb_lld_clear_in(usbp, usbp->setup[4] & 0x0F);
else
usb_lld_clear_out(usbp, usbp->setup[4] & 0x0F);
if ((usbp->setup[4] & 0x0FU) != 0U) {
if ((usbp->setup[4] & 0x80U) != 0U) {
usb_lld_clear_in(usbp, usbp->setup[4] & 0x0FU);
}
else {
usb_lld_clear_out(usbp, usbp->setup[4] & 0x0FU);
}
}
usbSetupTransfer(usbp, NULL, 0, NULL);
return true;
case USB_RTYPE_RECIPIENT_ENDPOINT | (USB_REQ_SET_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_ENDPOINT | ((uint32_t)USB_REQ_SET_FEATURE << 8):
/* Only ENDPOINT_HALT is handled as feature.*/
if (usbp->setup[2] != USB_FEATURE_ENDPOINT_HALT)
if (usbp->setup[2] != USB_FEATURE_ENDPOINT_HALT) {
return false;
}
/* Stalling the EP, not valid for EP0, it is ignored in that case.*/
if ((usbp->setup[4] & 0x0F) > 0) {
if (usbp->setup[4] & 0x80)
usb_lld_stall_in(usbp, usbp->setup[4] & 0x0F);
else
usb_lld_stall_out(usbp, usbp->setup[4] & 0x0F);
if ((usbp->setup[4] & 0x0FU) != 0U) {
if ((usbp->setup[4] & 0x80U) != 0U) {
usb_lld_stall_in(usbp, usbp->setup[4] & 0x0FU);
}
else {
usb_lld_stall_out(usbp, usbp->setup[4] & 0x0FU);
}
}
usbSetupTransfer(usbp, NULL, 0, NULL);
return true;
case USB_RTYPE_RECIPIENT_DEVICE | (USB_REQ_SET_DESCRIPTOR << 8):
case USB_RTYPE_RECIPIENT_INTERFACE | (USB_REQ_CLEAR_FEATURE << 8):
case USB_RTYPE_RECIPIENT_INTERFACE | (USB_REQ_SET_FEATURE << 8):
case USB_RTYPE_RECIPIENT_INTERFACE | (USB_REQ_GET_INTERFACE << 8):
case USB_RTYPE_RECIPIENT_INTERFACE | (USB_REQ_SET_INTERFACE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_DEVICE | ((uint32_t)USB_REQ_SET_DESCRIPTOR << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_INTERFACE | ((uint32_t)USB_REQ_CLEAR_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_INTERFACE | ((uint32_t)USB_REQ_SET_FEATURE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_INTERFACE | ((uint32_t)USB_REQ_GET_INTERFACE << 8):
case (uint32_t)USB_RTYPE_RECIPIENT_INTERFACE | ((uint32_t)USB_REQ_SET_INTERFACE << 8):
/* All the above requests are not handled here, if you need them then
use the hook mechanism and provide handling.*/
default:
@ -239,7 +271,7 @@ void usbObjectInit(USBDriver *usbp) {
usbp->state = USB_STOP;
usbp->config = NULL;
for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
for (i = 0; i < (unsigned)USB_MAX_ENDPOINTS; i++) {
usbp->in_params[i] = NULL;
usbp->out_params[i] = NULL;
}
@ -264,8 +296,9 @@ void usbStart(USBDriver *usbp, const USBConfig *config) {
osalDbgAssert((usbp->state == USB_STOP) || (usbp->state == USB_READY),
"invalid state");
usbp->config = config;
for (i = 0; i <= USB_MAX_ENDPOINTS; i++)
for (i = 0; i <= (unsigned)USB_MAX_ENDPOINTS; i++) {
usbp->epc[i] = NULL;
}
usb_lld_start(usbp);
usbp->state = USB_READY;
osalSysUnlock();
@ -314,10 +347,12 @@ void usbInitEndpointI(USBDriver *usbp, usbep_t ep,
osalDbgAssert(usbp->epc[ep] == NULL, "already initialized");
/* Logically enabling the endpoint in the USBDriver structure.*/
if (epcp->in_state != NULL)
if (epcp->in_state != NULL) {
memset(epcp->in_state, 0, sizeof(USBInEndpointState));
if (epcp->out_state != NULL)
}
if (epcp->out_state != NULL) {
memset(epcp->out_state, 0, sizeof(USBOutEndpointState));
}
usbp->epc[ep] = epcp;
@ -343,10 +378,11 @@ void usbDisableEndpointsI(USBDriver *usbp) {
osalDbgCheck(usbp != NULL);
osalDbgAssert(usbp->state == USB_SELECTED, "invalid state");
usbp->transmitting &= ~1;
usbp->receiving &= ~1;
for (i = 1; i <= USB_MAX_ENDPOINTS; i++)
usbp->transmitting &= ~1U;
usbp->receiving &= ~1U;
for (i = 1; i <= (unsigned)USB_MAX_ENDPOINTS; i++) {
usbp->epc[i] = NULL;
}
/* Low level endpoints deactivation.*/
usb_lld_disable_endpoints(usbp);
@ -475,10 +511,11 @@ bool usbStartReceiveI(USBDriver *usbp, usbep_t ep) {
osalDbgCheckClassI();
osalDbgCheck(usbp != NULL);
if (usbGetReceiveStatusI(usbp, ep))
if (usbGetReceiveStatusI(usbp, ep)) {
return true;
}
usbp->receiving |= (1 << ep);
usbp->receiving |= (uint16_t)((unsigned)1U << (unsigned)ep);
usb_lld_start_out(usbp, ep);
return false;
}
@ -502,10 +539,11 @@ bool usbStartTransmitI(USBDriver *usbp, usbep_t ep) {
osalDbgCheckClassI();
osalDbgCheck(usbp != NULL);
if (usbGetTransmitStatusI(usbp, ep))
if (usbGetTransmitStatusI(usbp, ep)) {
return true;
}
usbp->transmitting |= (1 << ep);
usbp->transmitting |= (uint16_t)((unsigned)1U << (unsigned)ep);
usb_lld_start_in(usbp, ep);
return false;
}
@ -527,8 +565,9 @@ bool usbStallReceiveI(USBDriver *usbp, usbep_t ep) {
osalDbgCheckClassI();
osalDbgCheck(usbp != NULL);
if (usbGetReceiveStatusI(usbp, ep))
if (usbGetReceiveStatusI(usbp, ep)) {
return true;
}
usb_lld_stall_out(usbp, ep);
return false;
@ -551,8 +590,9 @@ bool usbStallTransmitI(USBDriver *usbp, usbep_t ep) {
osalDbgCheckClassI();
osalDbgCheck(usbp != NULL);
if (usbGetTransmitStatusI(usbp, ep))
if (usbGetTransmitStatusI(usbp, ep)) {
return true;
}
usb_lld_stall_in(usbp, ep);
return false;
@ -578,8 +618,9 @@ void _usb_reset(USBDriver *usbp) {
usbp->receiving = 0;
/* Invalidates all endpoints into the USBDriver structure.*/
for (i = 0; i <= USB_MAX_ENDPOINTS; i++)
for (i = 0; i <= (unsigned)USB_MAX_ENDPOINTS; i++) {
usbp->epc[i] = NULL;
}
/* EP0 state machine initialization.*/
usbp->ep0state = USB_EP0_WAITING_SETUP;
@ -606,12 +647,16 @@ void _usb_ep0setup(USBDriver *usbp, usbep_t ep) {
/* First verify if the application has an handler installed for this
request.*/
if (!(usbp->config->requests_hook_cb) ||
/*lint -save -e9007 [13.5] No side effects, it is intentional.*/
if ((usbp->config->requests_hook_cb == NULL) ||
!(usbp->config->requests_hook_cb(usbp))) {
/*lint -restore*/
/* Invoking the default handler, if this fails then stalls the
endpoint zero as error.*/
/*lint -save -e9007 [13.5] No side effects, it is intentional.*/
if (((usbp->setup[0] & USB_RTYPE_TYPE_MASK) != USB_RTYPE_TYPE_STD) ||
!default_handler(usbp)) {
/*lint -restore*/
/* Error response, the state machine goes into an error state, the low
level layer will have to reset it to USB_EP0_WAITING_SETUP after
receiving a SETUP packet.*/
@ -631,18 +676,19 @@ void _usb_ep0setup(USBDriver *usbp, usbep_t ep) {
/* Transfer preparation. The request handler must have populated
correctly the fields ep0next, ep0n and ep0endcb using the macro
usbSetupTransfer().*/
max = usbFetchWord(&usbp->setup[6]);
max = (size_t)get_hword(&usbp->setup[6]);
/* The transfer size cannot exceed the specified amount.*/
if (usbp->ep0n > max)
if (usbp->ep0n > max) {
usbp->ep0n = max;
}
if ((usbp->setup[0] & USB_RTYPE_DIR_MASK) == USB_RTYPE_DIR_DEV2HOST) {
/* IN phase.*/
if (usbp->ep0n > 0) {
if (usbp->ep0n != 0U) {
/* Starts the transmit phase.*/
usbp->ep0state = USB_EP0_TX;
usbPrepareTransmit(usbp, 0, usbp->ep0next, usbp->ep0n);
osalSysLockFromISR();
usbStartTransmitI(usbp, 0);
(void) usbStartTransmitI(usbp, 0);
osalSysUnlockFromISR();
}
else {
@ -652,7 +698,7 @@ void _usb_ep0setup(USBDriver *usbp, usbep_t ep) {
#if (USB_EP0_STATUS_STAGE == USB_EP0_STATUS_STAGE_SW)
usbPrepareReceive(usbp, 0, NULL, 0);
osalSysLockFromISR();
usbStartReceiveI(usbp, 0);
(void) usbStartReceiveI(usbp, 0);
osalSysUnlockFromISR();
#else
usb_lld_end_setup(usbp, ep);
@ -661,12 +707,12 @@ void _usb_ep0setup(USBDriver *usbp, usbep_t ep) {
}
else {
/* OUT phase.*/
if (usbp->ep0n > 0) {
if (usbp->ep0n != 0U) {
/* Starts the receive phase.*/
usbp->ep0state = USB_EP0_RX;
usbPrepareReceive(usbp, 0, usbp->ep0next, usbp->ep0n);
osalSysLockFromISR();
usbStartReceiveI(usbp, 0);
(void) usbStartReceiveI(usbp, 0);
osalSysUnlockFromISR();
}
else {
@ -676,7 +722,7 @@ void _usb_ep0setup(USBDriver *usbp, usbep_t ep) {
#if (USB_EP0_STATUS_STAGE == USB_EP0_STATUS_STAGE_SW)
usbPrepareTransmit(usbp, 0, NULL, 0);
osalSysLockFromISR();
usbStartTransmitI(usbp, 0);
(void) usbStartTransmitI(usbp, 0);
osalSysUnlockFromISR();
#else
usb_lld_end_setup(usbp, ep);
@ -701,14 +747,15 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
(void)ep;
switch (usbp->ep0state) {
case USB_EP0_TX:
max = usbFetchWord(&usbp->setup[6]);
max = (size_t)get_hword(&usbp->setup[6]);
/* If the transmitted size is less than the requested size and it is a
multiple of the maximum packet size then a zero size packet must be
transmitted.*/
if ((usbp->ep0n < max) && ((usbp->ep0n % usbp->epc[0]->in_maxsize) == 0)) {
if ((usbp->ep0n < max) &&
((usbp->ep0n % usbp->epc[0]->in_maxsize) == 0U)) {
usbPrepareTransmit(usbp, 0, NULL, 0);
osalSysLockFromISR();
usbStartTransmitI(usbp, 0);
(void) usbStartTransmitI(usbp, 0);
osalSysUnlockFromISR();
usbp->ep0state = USB_EP0_WAITING_TX0;
return;
@ -720,7 +767,7 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
#if (USB_EP0_STATUS_STAGE == USB_EP0_STATUS_STAGE_SW)
usbPrepareReceive(usbp, 0, NULL, 0);
osalSysLockFromISR();
usbStartReceiveI(usbp, 0);
(void) usbStartReceiveI(usbp, 0);
osalSysUnlockFromISR();
#else
usb_lld_end_setup(usbp, ep);
@ -728,13 +775,18 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
return;
case USB_EP0_SENDING_STS:
/* Status packet sent, invoking the callback if defined.*/
if (usbp->ep0endcb != NULL)
if (usbp->ep0endcb != NULL) {
usbp->ep0endcb(usbp);
}
usbp->ep0state = USB_EP0_WAITING_SETUP;
return;
default:
;
}
case USB_EP0_WAITING_SETUP:
case USB_EP0_WAITING_STS:
case USB_EP0_RX:
/* All the above are invalid states in the IN phase.*/
osalDbgAssert(false, "EP0 state machine error");
/* Falling through is intentional.*/
case USB_EP0_ERROR:
/* Error response, the state machine goes into an error state, the low
level layer will have to reset it to USB_EP0_WAITING_SETUP after
receiving a SETUP packet.*/
@ -742,6 +794,10 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
usb_lld_stall_out(usbp, 0);
_usb_isr_invoke_event_cb(usbp, USB_EVENT_STALLED);
usbp->ep0state = USB_EP0_ERROR;
return;
default:
osalDbgAssert(false, "EP0 state machine invalid state");
}
}
/**
@ -764,7 +820,7 @@ void _usb_ep0out(USBDriver *usbp, usbep_t ep) {
#if (USB_EP0_STATUS_STAGE == USB_EP0_STATUS_STAGE_SW)
usbPrepareTransmit(usbp, 0, NULL, 0);
osalSysLockFromISR();
usbStartTransmitI(usbp, 0);
(void) usbStartTransmitI(usbp, 0);
osalSysUnlockFromISR();
#else
usb_lld_end_setup(usbp, ep);
@ -774,16 +830,23 @@ void _usb_ep0out(USBDriver *usbp, usbep_t ep) {
/* Status packet received, it must be zero sized, invoking the callback
if defined.*/
#if (USB_EP0_STATUS_STAGE == USB_EP0_STATUS_STAGE_SW)
if (usbGetReceiveTransactionSizeI(usbp, 0) != 0)
if (usbGetReceiveTransactionSizeI(usbp, 0) != 0U) {
break;
}
#endif
if (usbp->ep0endcb != NULL)
if (usbp->ep0endcb != NULL) {
usbp->ep0endcb(usbp);
}
usbp->ep0state = USB_EP0_WAITING_SETUP;
return;
default:
;
}
case USB_EP0_WAITING_SETUP:
case USB_EP0_TX:
case USB_EP0_WAITING_TX0:
case USB_EP0_SENDING_STS:
/* All the above are invalid states in the IN phase.*/
osalDbgAssert(false, "EP0 state machine error");
/* Falling through is intentional.*/
case USB_EP0_ERROR:
/* Error response, the state machine goes into an error state, the low
level layer will have to reset it to USB_EP0_WAITING_SETUP after
receiving a SETUP packet.*/
@ -791,8 +854,12 @@ void _usb_ep0out(USBDriver *usbp, usbep_t ep) {
usb_lld_stall_out(usbp, 0);
_usb_isr_invoke_event_cb(usbp, USB_EVENT_STALLED);
usbp->ep0state = USB_EP0_ERROR;
return;
default:
osalDbgAssert(false, "EP0 state machine invalid state");
}
}
#endif /* HAL_USE_USB */
#endif /* HAL_USE_USB == TRUE */
/** @} */

View File

@ -31,6 +31,16 @@
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Number of transmit mailboxes.
*/
#define CAN_TX_MAILBOXES 1
/**
* @brief Number of receive mailboxes.
*/
#define CAN_RX_MAILBOXES 1
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/

View File

@ -54,6 +54,13 @@
#define HAL_USE_CAN TRUE
#endif
/**
* @brief Enables the DAC subsystem.
*/
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
#define HAL_USE_DAC FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/

View File

@ -78,8 +78,8 @@ void osalSysHalt(const char *reason) {
osalSysDisable();
osal_halt_msg = reason;
while (1)
;
while (true) {
}
}
/**

View File

@ -42,7 +42,7 @@
#endif
#if !defined(TRUE) || defined(__DOXYGEN__)
#define TRUE (!FALSE)
#define TRUE 1
#endif
#define OSAL_SUCCESS FALSE
@ -100,6 +100,20 @@
/* Module pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Enables OSAL assertions.
*/
#if !defined(OSAL_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define OSAL_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Enables OSAL functions parameters checks.
*/
#if !defined(OSAL_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define OSAL_DBG_ENABLE_CHECKS FALSE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@ -148,7 +162,7 @@ typedef struct event_source event_source_t;
* @note This type is not part of the OSAL API and is provided
* exclusively as an example and for convenience.
*/
typedef void (*eventcallback_t)(event_source_t *);
typedef void (*eventcallback_t)(event_source_t *esp);
/**
* @brief Type of an event flags mask.
@ -209,7 +223,16 @@ typedef struct {
*
* @api
*/
#define osalDbgAssert(c, remark)
#define osalDbgAssert(c, remark) do { \
/*lint -save -e506 -e774 [2.1, 14.3] Can be a constant by design.*/ \
if (OSAL_DBG_ENABLE_ASSERTS != FALSE) { \
if (!(c)) { \
/*lint -restore*/ \
osalSysHalt(__func__); \
} \
} \
} while (false)
/**
* @brief Function parameters check.
@ -221,7 +244,16 @@ typedef struct {
*
* @api
*/
#define osalDbgCheck(c)
#define osalDbgCheck(c) do { \
/*lint -save -e506 -e774 [2.1, 14.3] Can be a constant by design.*/ \
if (OSAL_DBG_ENABLE_CHECKS != FALSE) { \
if (!(c)) { \
/*lint -restore*/ \
osalSysHalt(__func__); \
} \
} \
} while (false)
/**
* @brief I-Class state check.
@ -289,7 +321,7 @@ typedef struct {
* @api
*/
#define OSAL_MS2ST(msec) \
((systime_t)(((((uint32_t)(msec)) * ((uint32_t)OSAL_ST_FREQUENCY) - 1UL) /\
((systime_t)((((((uint32_t)(msec)) * ((uint32_t)OSAL_ST_FREQUENCY)) - 1UL) /\
1000UL) + 1UL))
/**
@ -303,7 +335,7 @@ typedef struct {
* @api
*/
#define OSAL_US2ST(usec) \
((systime_t)(((((uint32_t)(usec)) * ((uint32_t)OSAL_ST_FREQUENCY) - 1UL) /\
((systime_t)((((((uint32_t)(usec)) * ((uint32_t)OSAL_ST_FREQUENCY)) - 1UL) /\
1000000UL) + 1UL))
/** @} */
@ -354,6 +386,8 @@ typedef struct {
/* External declarations. */
/*===========================================================================*/
extern const char *osal_halt_msg;
#ifdef __cplusplus
extern "C" {
#endif
@ -542,7 +576,7 @@ static inline bool osalOsIsTimeWithinX(systime_t time,
systime_t start,
systime_t end) {
return (bool)(time - start < end - start);
return (bool)((time - start) < (end - start));
}
/**
@ -730,9 +764,10 @@ static inline void osalEventBroadcastFlagsI(event_source_t *esp,
osalDbgCheck(esp != NULL);
esp->flags |= flags;
if (esp->cb != NULL)
if (esp->cb != NULL) {
esp->cb(esp);
}
}
/**
* @brief Add flags to an event source object.

View File

@ -51,13 +51,13 @@ typedef struct {
/**
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 32
#define PAL_IOPORTS_WIDTH 32U
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFFU)
/**
* @brief Digital I/O port sized unsigned type.
@ -110,7 +110,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readport(port) 0
#define pal_lld_readport(port) 0U
/**
* @brief Reads the output latch.
@ -122,7 +122,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readlatch(port) 0
#define pal_lld_readlatch(port) 0U
/**
* @brief Writes a bits mask on a I/O port.
@ -132,7 +132,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_writeport(port, bits)
#define pal_lld_writeport(port, bits) \
do { \
(void)port; \
(void)bits; \
} while (false)
/**
* @brief Sets a bits mask on a I/O port.
@ -145,7 +150,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_setport(port, bits)
#define pal_lld_setport(port, bits) \
do { \
(void)port; \
(void)bits; \
} while (false)
/**
* @brief Clears a bits mask on a I/O port.
@ -158,7 +168,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_clearport(port, bits)
#define pal_lld_clearport(port, bits) \
do { \
(void)port; \
(void)bits; \
} while (false)
/**
* @brief Toggles a bits mask on a I/O port.
@ -171,7 +186,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_toggleport(port, bits)
#define pal_lld_toggleport(port, bits) \
do { \
(void)port; \
(void)bits; \
} while (false)
/**
* @brief Reads a group of bits.
@ -186,8 +206,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readgroup(port, mask, offset) \
(void)port,(void)mask,(void)offset,0
#define pal_lld_readgroup(port, mask, offset) 0U
/**
* @brief Writes a group of bits.
@ -204,7 +223,12 @@ typedef uint32_t ioportid_t;
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
(void)port,(void)mask,(void)offset,(void)bits
do { \
(void)port; \
(void)mask; \
(void)offset; \
(void)bits; \
} while (false)
/**
* @brief Pads group mode setup.
@ -253,7 +277,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_writepad(port, pad, bit)
#define pal_lld_writepad(port, pad, bit) \
do { \
(void)port; \
(void)pad; \
(void)bit; \
} while (false)
/**
* @brief Sets a pad logical state to @p PAL_HIGH.
@ -266,7 +295,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_setpad(port, pad)
#define pal_lld_setpad(port, pad) \
do { \
(void)port; \
(void)pad; \
} while (false)
/**
* @brief Clears a pad logical state to @p PAL_LOW.
@ -279,7 +313,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_clearpad(port, pad)
#define pal_lld_clearpad(port, pad) \
do { \
(void)port; \
(void)pad; \
} while (false)
/**
* @brief Toggles a pad logical state.
@ -292,7 +331,12 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_togglepad(port, pad)
#define pal_lld_togglepad(port, pad) \
do { \
(void)port; \
(void)pad; \
} while (false)
/**
* @brief Pad mode setup.
@ -308,7 +352,13 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_setpadmode(port, pad, mode)
#define pal_lld_setpadmode(port, pad, mode) \
do { \
(void)port; \
(void)pad; \
(void)mode; \
} while (false)
#if !defined(__DOXYGEN__)
extern const PALConfig pal_default_config;

View File

@ -41,12 +41,12 @@
/**
* @brief Callback support int the driver.
*/
#define RTC_SUPPORTS_CALLBACKS PLATFORM_RTC_HAS_INTERRUPTS
#define RTC_SUPPORTS_CALLBACKS TRUE
/**
* @brief Number of alarms available.
*/
#define RTC_ALARMS PLATFORM_RTC_NUM_ALARMS
#define RTC_ALARMS 2
/**
* @brief Presence of a local persistent storage.
@ -83,6 +83,20 @@
*/
typedef uint32_t rtcalarm_t;
#if (RTC_SUPPORTS_CALLBACKS == TRUE) || defined(__DOXYGEN__)
/**
* @brief Type of an RTC event.
*/
typedef enum {
RTC_EVENT_SECOND = 0 /** Triggered every second. */
} rtcevent_t;
/**
* @brief Type of a generic RTC callback.
*/
typedef void (*rtccb_t)(RTCDriver *rtcp, rtcevent_t event);
#endif
/**
* @brief Type of a structure representing an RTC alarm time stamp.
*/
@ -91,7 +105,7 @@ typedef struct {
uint32_t dummy;
} RTCAlarm;
#if RTC_HAS_STORAGE || defined(__DOXYGEN__)
#if (RTC_HAS_STORAGE == TRUE) || defined(__DOXYGEN__)
/**
* @extends FileStream
*
@ -145,6 +159,9 @@ extern "C" {
rtcalarm_t alarm,
RTCAlarm *alarmspec);
#endif
#if RTC_SUPPORTS_CALLBACKS == TRUE
void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback);
#endif
#ifdef __cplusplus
}
#endif

View File

@ -46,6 +46,11 @@
*/
#define USB_SET_ADDRESS_MODE USB_LATE_SET_ADDRESS
/**
* @brief Method for set address acknowledge.
*/
#define USB_SET_ADDRESS_ACK_HANDLING USB_SET_ADDRESS_ACK_SW
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/

View File

@ -206,4 +206,4 @@ RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
include $(RULESPATH)/rules.mk
misra:
@lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(INCDIR) $(KERNSRC) &> misra.txt
lint-nt -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(HALSRC) $(OSALSRC) $(PLATFORMSRC) > misra.txt

View File

@ -10,12 +10,14 @@
/* Silencing common non-MISRA info generated by PCLint in -w3 mode. All of
them have been controlled. Other infos have been fixed in the code.*/
-e526 -e537
-e714 -e716 -e717 -e757 -e758 -e759 -e768 -e773
-e613
-e714 -e716 -e717 -e749 -e757 -e758 -e759 -e768 -e773 -e778 -e793
-e826 -e830 -e835 -e845
/* Removing *advisory* directives and rules that would negatively impact
code readability or not avoidable.*/
-e970 /* Dir-4.6 */
-e9045 /* Dir-4.8 */
-e9026 /* Dir-4.9 */
-e756 /* Rule-2.3 */
-e9058 /* Rule-2.4 */
@ -25,6 +27,10 @@
-e818 /* Rule 8.13 */
-e9078 /* Rule-11.4 */
-e9079 /* Rule-11.5 */
-e9049 /* Rule-13.3 */
-e9084 /* Rule-13.4 */
-e801 /* Rule-15.1 */
-e9011 /* Rule-15.4 */
-e904 /* Rule-15.5 */
-e9044 /* Rule-17.8 */
-e9016 /* Rule-18.4 */
@ -53,17 +59,37 @@
from asm modules.*/
-e765
/* Waiver Rule 11.1, casts of function pointers are required by system
design.*/
-e9074
/* Waiver Rule 11.3, casts among different types are required by system
design.*/
-e740 /* Wrongly marked as 1.3 in PCLint 9-0L.*/
-e9087
/* Waiver Rule 11.6, cast from integer to pointer is very commonly used
when accessing peripherals where the numeric address of the registers
block is cast to a structure pointer.*/
-e923
/* Waiver Rule 16.1, missing break into case. It is a common occurrence and
thoroughly checked.*/
/* Waiver Rule 16.3, missing break into case. It is a common occurrence and
thoroughly checked.*/
-e9090
-e9077
-e9042
-e616
-e825
/* Waiver Rule 18.2, pointers arithmetic is required by system design and
deemed safe.*/
/* Waiver Rule 18.3, comparisons among pointers is required by system design
and deemed safe.*/
-e946
-e947
/* Waiver Rule 21.1, this is an operating system, its identifiers are
equivalent in importance to compiler symbols.*/
-e9071

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@ -10,7 +10,8 @@
/* Silencing common non-MISRA info generated by PCLint in -w3 mode. All of
them have been controlled. Other infos have been fixed in the code.*/
-e526 -e537
-e714 -e716 -e717 -e757 -e758 -e759 -e768 -e773 -e793
-e613
-e714 -e716 -e717 -e749 -e757 -e758 -e759 -e768 -e773 -e778 -e793
-e826 -e830 -e835 -e845
/* Removing *advisory* directives and rules that would negatively impact
@ -72,9 +73,13 @@
block is cast to a structure pointer.*/
-e923
/* Waiver Rule 16.1, missing break into case. It is a common occurrence and
thoroughly checked.*/
/* Waiver Rule 16.3, missing break into case. It is a common occurrence and
thoroughly checked.*/
-e9090
-e9077
-e9042
-e616
-e825