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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7329 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2014-09-28 08:24:30 +00:00
parent 9c182920f1
commit c822cd9ad1
5 changed files with 23 additions and 14 deletions
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6
os/hal/ports/STM32/LLD/USARTv2/uart_lld.c
View File

@ -99,7 +99,7 @@ static uartflags_t translate_errors(uint32_t isr) {
sts |= UART_FRAMING_ERROR;
if (isr & USART_ISR_NE)
sts |= UART_NOISE_ERROR;
if (isr & USART_ISR_LBD)
if (isr & USART_ISR_LBDF)
sts |= UART_BREAK_DETECTED;
return sts;
}
@ -270,8 +270,8 @@ static void serve_usart_irq(UARTDriver *uartp) {
isr = u->ISR;
u->ICR = isr;
if (isr & (USART_ISR_LBD | USART_ISR_ORE | USART_ISR_NE |
USART_ISR_FE | USART_ISR_PE)) {
if (isr & (USART_ISR_LBDF | USART_ISR_ORE | USART_ISR_NE |
USART_ISR_FE | USART_ISR_PE)) {
if (uartp->config->rxerr_cb != NULL)
uartp->config->rxerr_cb(uartp, translate_errors(isr));
}

9
os/hal/ports/STM32/LLD/can_lld.c
View File

@ -30,6 +30,15 @@
/* Driver local definitions. */
/*===========================================================================*/
/*
* Addressing differences in the headers, they seem unable to agree on names.
*/
#if STM32_CAN_USE_CAN1
#if !defined(CAN1)
#define CAN1 CAN
#endif
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/

8
os/hal/ports/STM32/STM32F30x/adc_lld.c
View File

@ -114,11 +114,11 @@ static void adc_lld_vreg_off(ADCDriver *adcp) {
static void adc_lld_analog_on(ADCDriver *adcp) {
adcp->adcm->CR |= ADC_CR_ADEN;
while ((adcp->adcm->ISR & ADC_ISR_ADRDY) == 0)
while ((adcp->adcm->ISR & ADC_ISR_ADRD) == 0)
;
#if STM32_ADC_DUAL_MODE
adcp->adcs->CR |= ADC_CR_ADEN;
while ((adcp->adcs->ISR & ADC_ISR_ADRDY) == 0)
while ((adcp->adcs->ISR & ADC_ISR_ADRD) == 0)
;
#endif
}
@ -322,7 +322,7 @@ void adc_lld_init(void) {
#if STM32_ADC_USE_ADC1
/* Driver initialization.*/
adcObjectInit(&ADCD1);
ADCD1.adcc = ADC1_2;
ADCD1.adcc = ADC1_2_COMMON;
ADCD1.adcm = ADC1;
#if STM32_ADC_DUAL_MODE
ADCD1.adcs = ADC2;
@ -339,7 +339,7 @@ void adc_lld_init(void) {
#if STM32_ADC_USE_ADC3
/* Driver initialization.*/
adcObjectInit(&ADCD3);
ADCD3.adcc = ADC3_4;
ADCD3.adcc = ADC3_4_COMMON;
ADCD3.adcm = ADC3;
#if STM32_ADC_DUAL_MODE
ADCD3.adcs = ADC4;

8
os/hal/ports/STM32/STM32F30x/ext_lld_isr.c
View File

@ -358,7 +358,7 @@ void ext_lld_exti_irq_enable(void) {
nvicEnableVector(EXTI0_IRQn, STM32_EXT_EXTI0_IRQ_PRIORITY);
nvicEnableVector(EXTI1_IRQn, STM32_EXT_EXTI1_IRQ_PRIORITY);
nvicEnableVector(EXTI2_TS_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
nvicEnableVector(EXTI2_TSC_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
nvicEnableVector(EXTI3_IRQn, STM32_EXT_EXTI3_IRQ_PRIORITY);
nvicEnableVector(EXTI4_IRQn, STM32_EXT_EXTI4_IRQ_PRIORITY);
nvicEnableVector(EXTI9_5_IRQn, STM32_EXT_EXTI5_9_IRQ_PRIORITY);
@ -366,7 +366,7 @@ void ext_lld_exti_irq_enable(void) {
nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
nvicEnableVector(RTC_Alarm_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
nvicEnableVector(USBWakeUp_IRQn, STM32_EXT_EXTI18_IRQ_PRIORITY);
nvicEnableVector(TAMPER_STAMP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
nvicEnableVector(TAMP_STAMP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
nvicEnableVector(COMP1_2_3_IRQn, STM32_EXT_EXTI21_22_29_IRQ_PRIORITY);
nvicEnableVector(COMP4_5_6_IRQn, STM32_EXT_EXTI30_32_IRQ_PRIORITY);
@ -382,7 +382,7 @@ void ext_lld_exti_irq_disable(void) {
nvicDisableVector(EXTI0_IRQn);
nvicDisableVector(EXTI1_IRQn);
nvicDisableVector(EXTI2_TS_IRQn);
nvicDisableVector(EXTI2_TSC_IRQn);
nvicDisableVector(EXTI3_IRQn);
nvicDisableVector(EXTI4_IRQn);
nvicDisableVector(EXTI9_5_IRQn);
@ -390,7 +390,7 @@ void ext_lld_exti_irq_disable(void) {
nvicDisableVector(PVD_IRQn);
nvicDisableVector(RTC_Alarm_IRQn);
nvicDisableVector(USBWakeUp_IRQn);
nvicDisableVector(TAMPER_STAMP_IRQn);
nvicDisableVector(TAMP_STAMP_IRQn);
nvicDisableVector(RTC_WKUP_IRQn);
nvicDisableVector(COMP1_2_3_IRQn);
nvicDisableVector(COMP4_5_6_IRQn);

6
os/hal/ports/STM32/STM32F30x/stm32_rcc.h
View File

@ -227,7 +227,7 @@
*
* @api
*/
#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CAN1EN, lp)
#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CANEN, lp)
/**
* @brief Disables the CAN1 peripheral clock.
@ -237,14 +237,14 @@
*
* @api
*/
#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp)
#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp)
/**
* @brief Resets the CAN1 peripheral.
*
* @api
*/
#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CAN1RST)
#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CANRST)
/** @} */
/**