STM8, MSP430 and AVR ports adjusted for state checker option.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3229 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
930cd17e55
commit
c4f7ff481d
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@ -151,7 +151,7 @@ struct context {
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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sizeof(struct extctx) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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* @brief Static working area allocation.
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* @brief Static working area allocation.
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@ -249,7 +249,7 @@ struct context {
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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sizeof(struct extctx) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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* @brief Static working area allocation.
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* @brief Static working area allocation.
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@ -123,7 +123,7 @@ void port_halt(void) {
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*/
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*/
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void _port_thread_start(void) {
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void _port_thread_start(void) {
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asm volatile ("sei");
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chSysUnlock();
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asm volatile ("movw r24, r4");
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asm volatile ("movw r24, r4");
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asm volatile ("movw r30, r2");
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asm volatile ("movw r30, r2");
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asm volatile ("icall");
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asm volatile ("icall");
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@ -142,15 +142,15 @@ struct context {
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* @details This code usually setup the context switching frame represented
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* @details This code usually setup the context switching frame represented
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* by an @p intctx structure.
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* by an @p intctx structure.
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*/
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*/
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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tp->p_ctx.sp = (struct intctx*)((uint8_t *)workspace + wsize - \
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tp->p_ctx.sp = (struct intctx*)((uint8_t *)workspace + wsize - \
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sizeof(struct intctx)); \
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sizeof(struct intctx)); \
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tp->p_ctx.sp->r2 = (int)pf; \
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tp->p_ctx.sp->r2 = (int)pf; \
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tp->p_ctx.sp->r3 = (int)pf >> 8; \
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tp->p_ctx.sp->r3 = (int)pf >> 8; \
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tp->p_ctx.sp->r4 = (int)arg; \
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tp->p_ctx.sp->r4 = (int)arg; \
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tp->p_ctx.sp->r5 = (int)arg >> 8; \
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tp->p_ctx.sp->r5 = (int)arg >> 8; \
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tp->p_ctx.sp->pcl = (int)_port_thread_start >> 8; \
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tp->p_ctx.sp->pcl = (int)_port_thread_start >> 8; \
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tp->p_ctx.sp->pch = (int)_port_thread_start; \
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tp->p_ctx.sp->pch = (int)_port_thread_start; \
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}
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}
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/**
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/**
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@ -185,9 +185,9 @@ struct context {
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/**
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/**
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* @brief Computes the thread working area global size.
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* @brief Computes the thread working area global size.
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*/
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*/
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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(sizeof(struct intctx) - 1) + \
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(sizeof(struct intctx) - 1) + \
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(sizeof(struct extctx) - 1) + \
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(sizeof(struct extctx) - 1) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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@ -204,9 +204,9 @@ struct context {
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* @note This code tricks the compiler to save all the specified registers
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* @note This code tricks the compiler to save all the specified registers
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* by "touching" them.
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* by "touching" them.
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*/
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*/
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#define PORT_IRQ_PROLOGUE() { \
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#define PORT_IRQ_PROLOGUE() { \
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asm ("" : : : "r18", "r19", "r20", "r21", "r22", "r23", "r24", \
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asm ("" : : : "r18", "r19", "r20", "r21", "r22", "r23", "r24", \
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"r25", "r26", "r27", "r30", "r31"); \
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"r25", "r26", "r27", "r30", "r31"); \
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}
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}
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/**
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/**
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@ -214,9 +214,11 @@ struct context {
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* @details This macro must be inserted at the end of all IRQ handlers
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* @details This macro must be inserted at the end of all IRQ handlers
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* enabled to invoke system APIs.
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* enabled to invoke system APIs.
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*/
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*/
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#define PORT_IRQ_EPILOGUE() { \
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#define PORT_IRQ_EPILOGUE() { \
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if (chSchIsPreemptionRequired()) \
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dbg_check_lock(); \
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chSchDoReschedule(); \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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dbg_check_unlock(); \
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}
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}
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/**
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/**
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@ -93,8 +93,8 @@ void port_halt(void) {
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*/
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*/
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void _port_thread_start(void) {
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void _port_thread_start(void) {
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asm volatile ("eint \n\t" \
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chSysUnlock();
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"mov r11, r15 \n\t" \
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asm volatile ("mov r11, r15 \n\t" \
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"call r10 \n\t" \
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"call r10 \n\t" \
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"call #chThdExit");
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"call #chThdExit");
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}
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}
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@ -119,13 +119,13 @@ struct context {
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* @details This code usually setup the context switching frame represented
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* @details This code usually setup the context switching frame represented
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* by an @p intctx structure.
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* by an @p intctx structure.
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*/
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*/
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
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tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
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wsize - \
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wsize - \
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sizeof(struct intctx)); \
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sizeof(struct intctx)); \
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tp->p_ctx.sp->r10 = pf; \
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tp->p_ctx.sp->r10 = pf; \
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tp->p_ctx.sp->r11 = arg; \
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tp->p_ctx.sp->r11 = arg; \
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tp->p_ctx.sp->pc = _port_thread_start; \
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tp->p_ctx.sp->pc = _port_thread_start; \
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}
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}
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/**
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/**
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@ -159,10 +159,10 @@ struct context {
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/**
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/**
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* @brief Computes the thread working area global size.
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* @brief Computes the thread working area global size.
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*/
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*/
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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sizeof(struct extctx) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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* @brief Static working area allocation.
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* @brief Static working area allocation.
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@ -183,9 +183,11 @@ struct context {
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* @details This macro must be inserted at the end of all IRQ handlers
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* @details This macro must be inserted at the end of all IRQ handlers
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* enabled to invoke system APIs.
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* enabled to invoke system APIs.
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*/
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*/
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#define PORT_IRQ_EPILOGUE() { \
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#define PORT_IRQ_EPILOGUE() { \
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if (chSchIsPreemptionRequired()) \
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dbg_check_lock(); \
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chSchDoReschedule(); \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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dbg_check_unlock(); \
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}
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}
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/**
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/**
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@ -220,7 +222,11 @@ struct context {
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/**
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/**
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* @brief Kernel-lock action from an interrupt handler.
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* @brief Kernel-lock action from an interrupt handler.
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* @details This function is invoked before invoking I-class APIs from
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* @details This function is invoked before invoking I-class APIs from
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* interrupt handlers. The implementation is architecture dependent,
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* interrupt handlers. The implementation is architecture dependen#define PORT_IRQ_EPILOGUE() { \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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}
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* t,
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* in its simplest form it is void.
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* in its simplest form it is void.
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* @note This function is empty in this port.
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* @note This function is empty in this port.
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*/
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*/
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@ -270,8 +276,8 @@ struct context {
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*/
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*/
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#if ENABLE_WFI_IDLE != 0
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#if ENABLE_WFI_IDLE != 0
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#ifndef port_wait_for_interrupt
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#ifndef port_wait_for_interrupt
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#define port_wait_for_interrupt() { \
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#define port_wait_for_interrupt() { \
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asm volatile ("nop" : : : "memory"); \
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asm volatile ("nop" : : : "memory"); \
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}
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}
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#endif
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#endif
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#else
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#else
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@ -221,10 +221,10 @@ struct context {
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/**
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/**
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* @brief Computes the thread working area global size.
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* @brief Computes the thread working area global size.
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*/
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*/
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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sizeof(struct extctx) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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* @brief Static working area allocation.
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* @brief Static working area allocation.
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@ -307,8 +307,8 @@ struct context {
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*/
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*/
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#if ENABLE_WFI_IDLE != 0
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#if ENABLE_WFI_IDLE != 0
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#ifndef port_wait_for_interrupt
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#ifndef port_wait_for_interrupt
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#define port_wait_for_interrupt() { \
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#define port_wait_for_interrupt() { \
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asm volatile ("wait" : : : "memory"); \
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asm volatile ("wait" : : : "memory"); \
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}
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}
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#endif
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#endif
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#else
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#else
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@ -144,7 +144,7 @@ struct context {
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sizeof(void *) * 4 + \
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sizeof(void *) * 4 + \
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sizeof(struct intctx) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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sizeof(struct extctx) + \
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(n) + (PORT_INT_REQUIRED_STACK))
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(n) + (PORT_INT_REQUIRED_STACK))
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/**
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/**
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* Macro used to allocate a thread working area aligned as both position and
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* Macro used to allocate a thread working area aligned as both position and
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@ -54,8 +54,8 @@ void _port_switch(Thread *otp) {
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*/
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*/
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void _port_thread_start(void) {
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void _port_thread_start(void) {
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chSysUnlock();
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#pragma ASM
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#pragma ASM
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RIM
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POPW X
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POPW X
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#pragma ENDASM
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#pragma ENDASM
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}
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}
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@ -206,8 +206,10 @@ struct stm8_startctx {
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* enabled to invoke system APIs.
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* enabled to invoke system APIs.
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*/
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*/
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#define PORT_IRQ_EPILOGUE() { \
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#define PORT_IRQ_EPILOGUE() { \
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dbg_check_lock(); \
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if (chSchIsPreemptionRequired()) \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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chSchDoReschedule(); \
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dbg_check_unlock(); \
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}
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}
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/**
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/**
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@ -50,8 +50,8 @@ void _port_switch(Thread *otp) {
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*/
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*/
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void _port_thread_start(void) {
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void _port_thread_start(void) {
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_asm(" rim \n"
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chSysUnlock();
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" popw x \n");
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_asm(" popw x \n");
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}
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}
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/**
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/**
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@ -203,8 +203,10 @@ struct stm8_startctx {
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* enabled to invoke system APIs.
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* enabled to invoke system APIs.
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*/
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*/
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#define PORT_IRQ_EPILOGUE() { \
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#define PORT_IRQ_EPILOGUE() { \
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dbg_check_lock(); \
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if (chSchIsPreemptionRequired()) \
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if (chSchIsPreemptionRequired()) \
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chSchDoReschedule(); \
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chSchDoReschedule(); \
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dbg_check_unlock(); \
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}
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}
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/**
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/**
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