From c4dcbb3e9881654b9c4d96837a994ce305ab4d35 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 17:41:53 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4999 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F0xx/hal_lld.c | 2 +- os/hal/platforms/STM32F3xx/hal_lld.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/os/hal/platforms/STM32F0xx/hal_lld.c b/os/hal/platforms/STM32F0xx/hal_lld.c index 7c76cb272..a8b73fd88 100644 --- a/os/hal/platforms/STM32F0xx/hal_lld.c +++ b/os/hal/platforms/STM32F0xx/hal_lld.c @@ -114,7 +114,7 @@ void hal_lld_init(void) { SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk; - /* PWR and BD clocks enabled.*/ + /* PWR clock enabled.*/ rccEnablePWRInterface(FALSE); /* Initializes the backup domain.*/ diff --git a/os/hal/platforms/STM32F3xx/hal_lld.c b/os/hal/platforms/STM32F3xx/hal_lld.c index afd6ec354..c0d9ad436 100644 --- a/os/hal/platforms/STM32F3xx/hal_lld.c +++ b/os/hal/platforms/STM32F3xx/hal_lld.c @@ -114,7 +114,11 @@ void hal_lld_init(void) { SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk; - /* PWR and BD clocks enabled.*/ + /* DWT cycle counter enable.*/ + SCS_DEMCR |= SCS_DEMCR_TRCENA; + DWT_CTRL |= DWT_CTRL_CYCCNTENA; + + /* PWR clock enabled.*/ rccEnablePWRInterface(FALSE); /* Initializes the backup domain.*/