git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6308 35acf78f-673a-0410-8e92-d51de3d6d3f4
gdisirio
parent
b295f4426c
commit
be933e6129
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@ -60,7 +60,7 @@ void boardInit(void) {
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*
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* @notapi
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*/
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bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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(void)sdcp;
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return !palReadPad(GPIOE, GPIOE_SDIO_DETECT);
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@ -74,7 +74,7 @@ bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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*
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* @notapi
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*/
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bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
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bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
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(void)sdcp;
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return FALSE;
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@ -28,7 +28,6 @@
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#include <string.h>
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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@ -75,13 +74,13 @@ static union {
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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static bool sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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/* Driver handles data in 512 bytes blocks (just like HC cards). But if we
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have not HC card than we must convert address from blocks to bytes.*/
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@ -92,16 +91,16 @@ static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
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/* Send read multiple blocks command to card.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_MULTIPLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return CH_FAILED;
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return HAL_FAILED;
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}
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else{
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/* Send read single block command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_SINGLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return CH_FAILED;
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return HAL_FAILED;
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}
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -113,13 +112,13 @@ static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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static bool sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
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uint32_t n, uint32_t *resp) {
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/* Driver handles data in 512 bytes blocks (just like HC cards). But if we
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have not HC card than we must convert address from blocks to bytes.*/
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@ -130,16 +129,16 @@ static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
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/* Write multiple blocks command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return CH_FAILED;
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return HAL_FAILED;
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}
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else{
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/* Write single block command.*/
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if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_BLOCK,
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startblk, resp) || MMCSD_R1_ERROR(resp[0]))
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return CH_FAILED;
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return HAL_FAILED;
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}
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -150,26 +149,20 @@ static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
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* @param[in] resp pointer to the response buffer
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*/
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static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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uint32_t *resp) {
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static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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uint32_t *resp) {
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/* Note the mask is checked before going to sleep because the interrupt
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may have occurred before reaching the critical zone.*/
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chSysLock();
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if (SDIO->MASK != 0) {
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chDbgAssert(sdcp->thread == NULL,
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"sdc_lld_start_data_transaction(), #1", "not NULL");
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sdcp->thread = chThdSelf();
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chSchGoSleepS(THD_STATE_SUSPENDED);
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chDbgAssert(sdcp->thread == NULL,
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"sdc_lld_start_data_transaction(), #2", "not NULL");
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}
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osalSysLock();
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if (SDIO->MASK != 0)
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osalThreadSuspendS(&sdcp->thread);
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if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
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chSysUnlock();
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return CH_FAILED;
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osalSysUnlock();
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return HAL_FAILED;
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}
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#if (defined(STM32F4XX) || defined(STM32F2XX))
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@ -182,7 +175,7 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
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SDIO->DCTRL = 0;
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chSysUnlock();
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osalSysUnlock();
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/* Wait until interrupt flags to be cleared.*/
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/*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
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@ -194,14 +187,14 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
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SDIO->DCTRL = 0;
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chSysUnlock();
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osalSysUnlock();
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#endif
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/* Finalize transaction.*/
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if (n > 1)
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return sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp);
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -271,24 +264,21 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp,
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*
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* @isr
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*/
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CH_IRQ_HANDLER(STM32_SDIO_HANDLER) {
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OSAL_IRQ_HANDLER(STM32_SDIO_HANDLER) {
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CH_IRQ_PROLOGUE();
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OSAL_IRQ_PROLOGUE();
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chSysLockFromIsr()
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osalSysLockFromISR();
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/* Disables the source but the status flags are not reset because the
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read/write functions needs to check them.*/
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SDIO->MASK = 0;
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if (SDCD1.thread != NULL) {
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chSchReadyI(SDCD1.thread);
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SDCD1.thread = NULL;
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}
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osalThreadResumeI(&SDCD1.thread, MSG_OK);
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chSysUnlockFromIsr();
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osalSysUnlockFromISR();
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CH_IRQ_EPILOGUE();
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OSAL_IRQ_EPILOGUE();
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}
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/*===========================================================================*/
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@ -333,15 +323,14 @@ void sdc_lld_start(SDCDriver *sdcp) {
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if (sdcp->state == BLK_STOP) {
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/* Note, the DMA must be enabled before the IRQs.*/
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bool_t b;
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bool b;
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b = dmaStreamAllocate(sdcp->dma, STM32_SDC_SDIO_IRQ_PRIORITY, NULL, NULL);
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chDbgAssert(!b, "sdc_lld_start(), #1", "stream already allocated");
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osalDbgAssert(!b, "stream already allocated");
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dmaStreamSetPeripheral(sdcp->dma, &SDIO->FIFO);
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#if (defined(STM32F4XX) || defined(STM32F2XX))
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dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
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#endif
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nvicEnableVector(STM32_SDIO_NUMBER,
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CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY));
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nvicEnableVector(STM32_SDIO_NUMBER, STM32_SDC_SDIO_IRQ_PRIORITY);
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rccEnableSDIO(FALSE);
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}
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@ -478,13 +467,13 @@ void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) {
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* @param[out] resp pointer to the response buffer (one word)
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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uint32_t sta;
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(void)sdcp;
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@ -497,10 +486,10 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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SDIO->ICR = sta;
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if ((sta & (SDIO_STA_CTIMEOUT)) != 0) {
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sdc_lld_collect_errors(sdcp, sta);
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return CH_FAILED;
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return HAL_FAILED;
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}
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*resp = SDIO->RESP1;
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -512,13 +501,13 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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* @param[out] resp pointer to the response buffer (one word)
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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uint32_t sta;
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(void)sdcp;
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@ -531,10 +520,10 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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SDIO->ICR = sta;
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if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0) {
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sdc_lld_collect_errors(sdcp, sta);
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return CH_FAILED;
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return HAL_FAILED;
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}
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*resp = SDIO->RESP1;
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -546,13 +535,13 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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* @param[out] resp pointer to the response buffer (four words)
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp) {
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uint32_t sta;
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(void)sdcp;
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@ -566,14 +555,14 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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SDIO->ICR = sta;
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if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0) {
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sdc_lld_collect_errors(sdcp, sta);
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return CH_FAILED;
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return HAL_FAILED;
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}
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/* Save bytes in reverse order because MSB in response comes first.*/
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*resp++ = SDIO->RESP4;
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*resp++ = SDIO->RESP3;
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*resp++ = SDIO->RESP2;
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*resp = SDIO->RESP1;
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return CH_SUCCESS;
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return HAL_SUCCESS;
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}
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/**
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@ -585,22 +574,22 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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* @param[in] n number of blocks to read
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buf, uint32_t n) {
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bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buf, uint32_t n) {
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uint32_t resp[1];
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chDbgCheck((n < (0x1000000 / MMCSD_BLOCK_SIZE)), "max transaction size");
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osalDbgCheck(n < 0x1000000 / MMCSD_BLOCK_SIZE);
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SDIO->DTIMER = STM32_SDC_READ_TIMEOUT;
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/* Checks for errors and waits for the card to be ready for reading.*/
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if (_sdc_wait_for_transfer_state(sdcp))
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return CH_FAILED;
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return HAL_FAILED;
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/* Prepares the DMA channel for writing.*/
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dmaStreamSetMemory0(sdcp->dma, buf);
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@ -631,11 +620,11 @@ bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
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if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE)
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goto error;
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return CH_SUCCESS;
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return HAL_SUCCESS;
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error:
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sdc_lld_error_cleanup(sdcp, n, resp);
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return CH_FAILED;
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return HAL_FAILED;
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}
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/**
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@ -647,22 +636,22 @@ error:
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* @param[in] n number of blocks to write
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
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const uint8_t *buf, uint32_t n) {
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bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
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const uint8_t *buf, uint32_t n) {
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uint32_t resp[1];
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chDbgCheck((n < (0x1000000 / MMCSD_BLOCK_SIZE)), "max transaction size");
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osalDbgCheck(n < 0x1000000 / MMCSD_BLOCK_SIZE);
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SDIO->DTIMER = STM32_SDC_WRITE_TIMEOUT;
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/* Checks for errors and waits for the card to be ready for writing.*/
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if (_sdc_wait_for_transfer_state(sdcp))
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return CH_FAILED;
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return HAL_FAILED;
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/* Prepares the DMA channel for writing.*/
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dmaStreamSetMemory0(sdcp->dma, buf);
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@ -692,11 +681,11 @@ bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
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if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE)
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goto error;
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return CH_SUCCESS;
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return HAL_SUCCESS;
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error:
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sdc_lld_error_cleanup(sdcp, n, resp);
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return CH_FAILED;
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return HAL_FAILED;
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}
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/**
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@ -708,25 +697,25 @@ error:
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* @param[in] n number of blocks to read
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*
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* @return The operation status.
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* @retval CH_SUCCESS operation succeeded.
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* @retval CH_FAILED operation failed.
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* @retval HAL_SUCCESS operation succeeded.
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* @retval HAL_FAILED operation failed.
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*
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* @notapi
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*/
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bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buf, uint32_t n) {
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bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buf, uint32_t n) {
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#if STM32_SDC_SDIO_UNALIGNED_SUPPORT
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if (((unsigned)buf & 3) != 0) {
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uint32_t i;
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for (i = 0; i < n; i++) {
|
||||
if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1))
|
||||
return CH_FAILED;
|
||||
return HAL_FAILED;
|
||||
memcpy(buf, u.buf, MMCSD_BLOCK_SIZE);
|
||||
buf += MMCSD_BLOCK_SIZE;
|
||||
startblk++;
|
||||
}
|
||||
return CH_SUCCESS;
|
||||
return HAL_SUCCESS;
|
||||
}
|
||||
#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */
|
||||
return sdc_lld_read_aligned(sdcp, startblk, buf, n);
|
||||
|
|
@ -741,13 +730,13 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
|
|||
* @param[in] n number of blocks to write
|
||||
*
|
||||
* @return The operation status.
|
||||
* @retval CH_SUCCESS operation succeeded.
|
||||
* @retval CH_FAILED operation failed.
|
||||
* @retval HAL_SUCCESS operation succeeded.
|
||||
* @retval HAL_FAILED operation failed.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
||||
const uint8_t *buf, uint32_t n) {
|
||||
bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
||||
const uint8_t *buf, uint32_t n) {
|
||||
|
||||
#if STM32_SDC_SDIO_UNALIGNED_SUPPORT
|
||||
if (((unsigned)buf & 3) != 0) {
|
||||
|
|
@ -756,10 +745,10 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
|||
memcpy(u.buf, buf, MMCSD_BLOCK_SIZE);
|
||||
buf += MMCSD_BLOCK_SIZE;
|
||||
if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1))
|
||||
return CH_FAILED;
|
||||
return HAL_FAILED;
|
||||
startblk++;
|
||||
}
|
||||
return CH_SUCCESS;
|
||||
return HAL_SUCCESS;
|
||||
}
|
||||
#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */
|
||||
return sdc_lld_write_aligned(sdcp, startblk, buf, n);
|
||||
|
|
@ -771,16 +760,16 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
|||
* @param[in] sdcp pointer to the @p SDCDriver object
|
||||
*
|
||||
* @return The operation status.
|
||||
* @retval CH_SUCCESS the operation succeeded.
|
||||
* @retval CH_FAILED the operation failed.
|
||||
* @retval HAL_SUCCESS the operation succeeded.
|
||||
* @retval HAL_FAILED the operation failed.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
bool_t sdc_lld_sync(SDCDriver *sdcp) {
|
||||
bool sdc_lld_sync(SDCDriver *sdcp) {
|
||||
|
||||
/* TODO: Implement.*/
|
||||
(void)sdcp;
|
||||
return CH_SUCCESS;
|
||||
return HAL_SUCCESS;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_SDC */
|
||||
|
|
|
|||
|
|
@ -74,15 +74,15 @@
|
|||
/**
|
||||
* @brief Write timeout in milliseconds.
|
||||
*/
|
||||
#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
|
||||
#define SDC_WRITE_TIMEOUT_MS 250
|
||||
#if !defined(STM32_SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
|
||||
#define STM32_SDC_WRITE_TIMEOUT_MS 250
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Read timeout in milliseconds.
|
||||
*/
|
||||
#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
|
||||
#define SDC_READ_TIMEOUT_MS 5
|
||||
#if !defined(STM32_SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
|
||||
#define STM32_SDC_READ_TIMEOUT_MS 5
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -92,21 +92,6 @@
|
|||
#if !defined(STM32_SDC_SDIO_UNALIGNED_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
|
||||
#endif
|
||||
|
||||
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
|
||||
|
||||
/**
|
||||
* @brief DMA stream used for SDC operations.
|
||||
* @note This option is only available on platforms with enhanced DMA.
|
||||
*/
|
||||
#if !defined(STM32_SDC_SDIO_DMA_STREAM) || defined(__DOXYGEN__)
|
||||
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#endif
|
||||
|
||||
#else /* !STM32_ADVANCED_DMA*/
|
||||
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
|
||||
#endif /* !STM32_ADVANCED_DMA*/
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
@ -125,6 +110,20 @@
|
|||
#error "Invalid DMA priority assigned to SDIO"
|
||||
#endif
|
||||
|
||||
/* The following checks are only required when there is a DMA able to
|
||||
reassign streams to different channels.*/
|
||||
#if STM32_ADVANCED_DMA
|
||||
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
|
||||
#if !defined(STM32_SDC_SDIO_DMA_STREAM)
|
||||
#error "SDIO DMA streams not defined"
|
||||
#endif
|
||||
|
||||
/* Check on the validity of the assigned DMA channels.*/
|
||||
#if !STM32_DMA_IS_VALID_ID(STM32_SDC_SDIO_DMA_STREAM, STM32_SDC_SDIO_DMA_MSK)
|
||||
#error "invalid DMA stream associated to SDIO"
|
||||
#endif
|
||||
#endif /* STM32_ADVANCED_DMA */
|
||||
|
||||
#if !defined(STM32_DMA_REQUIRED)
|
||||
#define STM32_DMA_REQUIRED
|
||||
#endif
|
||||
|
|
@ -245,7 +244,7 @@ struct SDCDriver {
|
|||
/**
|
||||
* @brief Thread waiting for I/O completion IRQ.
|
||||
*/
|
||||
Thread *thread;
|
||||
thread_reference_t thread;
|
||||
/**
|
||||
* @brief DMA mode bit mask.
|
||||
*/
|
||||
|
|
@ -286,19 +285,19 @@ extern "C" {
|
|||
void sdc_lld_stop_clk(SDCDriver *sdcp);
|
||||
void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode);
|
||||
void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg);
|
||||
bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
|
||||
uint8_t *buf, uint32_t n);
|
||||
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
||||
const uint8_t *buf, uint32_t n);
|
||||
bool_t sdc_lld_sync(SDCDriver *sdcp);
|
||||
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp);
|
||||
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp);
|
||||
bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
|
||||
uint32_t *resp);
|
||||
bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
|
||||
uint8_t *buf, uint32_t n);
|
||||
bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
|
||||
const uint8_t *buf, uint32_t n);
|
||||
bool sdc_lld_sync(SDCDriver *sdcp);
|
||||
bool sdc_lld_is_card_inserted(SDCDriver *sdcp);
|
||||
bool sdc_lld_is_write_protected(SDCDriver *sdcp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ bool _sdc_wait_for_transfer_state(SDCDriver *sdcp) {
|
|||
case MMCSD_STS_RCV:
|
||||
case MMCSD_STS_PRG:
|
||||
#if SDC_NICE_WAITING
|
||||
osalThreadSleepMilliseconds(1);
|
||||
osalThreadSleep(MS2ST(1));
|
||||
#endif
|
||||
continue;
|
||||
default:
|
||||
|
|
@ -257,7 +257,7 @@ bool sdcConnect(SDCDriver *sdcp) {
|
|||
}
|
||||
if (++i >= SDC_INIT_RETRY)
|
||||
goto failed;
|
||||
osalThreadSleepMilliseconds(10);
|
||||
osalThreadSleep(MS2ST(10));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -25,40 +25,61 @@
|
|||
#include "ch.h"
|
||||
#include "evtimer.h"
|
||||
|
||||
static void tmrcb(void *p) {
|
||||
EvTimer *etp = p;
|
||||
/*===========================================================================*/
|
||||
/* Module local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
chSysLockFromIsr();
|
||||
/*===========================================================================*/
|
||||
/* Module exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void tmrcb(void *p) {
|
||||
event_timer_t *etp = p;
|
||||
|
||||
chSysLockFromISR();
|
||||
chEvtBroadcastI(&etp->et_es);
|
||||
chVTSetI(&etp->et_vt, etp->et_interval, tmrcb, etp);
|
||||
chSysUnlockFromIsr();
|
||||
chVTDoSetI(&etp->et_vt, etp->et_interval, tmrcb, etp);
|
||||
chSysUnlockFromISR();
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Initializes an @p event_timer_t structure.
|
||||
*
|
||||
* @param[out] etp the @p event_timer_t structure to be initialized
|
||||
* @param[in] time the interval in system ticks
|
||||
*/
|
||||
void evtObjectInit(event_timer_t *etp, systime_t time) {
|
||||
|
||||
chEvtObjectInit(&etp->et_es);
|
||||
chVTObjectInit(&etp->et_vt);
|
||||
etp->et_interval = time;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the timer
|
||||
* @brief Starts the timer
|
||||
* @details If the timer was already running then the function has no effect.
|
||||
*
|
||||
* @param etp pointer to an initialized @p EvTimer structure.
|
||||
* @param[in] etp pointer to an initialized @p event_timer_t structure.
|
||||
*/
|
||||
void evtStart(EvTimer *etp) {
|
||||
void evtStart(event_timer_t *etp) {
|
||||
|
||||
chSysLock();
|
||||
|
||||
if (!chVTIsArmedI(&etp->et_vt))
|
||||
chVTSetI(&etp->et_vt, etp->et_interval, tmrcb, etp);
|
||||
|
||||
chSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops the timer.
|
||||
* @details If the timer was already stopped then the function has no effect.
|
||||
*
|
||||
* @param etp pointer to an initialized @p EvTimer structure.
|
||||
*/
|
||||
void evtStop(EvTimer *etp) {
|
||||
|
||||
chVTReset(&etp->et_vt);
|
||||
chVTSet(&etp->et_vt, etp->et_interval, tmrcb, etp);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
|
|
|||
|
|
@ -25,42 +25,68 @@
|
|||
#ifndef _EVTIMER_H_
|
||||
#define _EVTIMER_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* Module dependencies check.
|
||||
*/
|
||||
#if !CH_USE_EVENTS
|
||||
#error "Event Timers require CH_USE_EVENTS"
|
||||
#if !CH_CFG_USE_EVENTS
|
||||
#error "Event Timers require CH_CFG_USE_EVENTS"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Event timer structure.
|
||||
* @brief Type of a event timer structure.
|
||||
*/
|
||||
typedef struct {
|
||||
VirtualTimer et_vt;
|
||||
EventSource et_es;
|
||||
systime_t et_interval;
|
||||
} EvTimer;
|
||||
virtual_timer_t et_vt;
|
||||
event_source_t et_es;
|
||||
systime_t et_interval;
|
||||
} event_timer_t;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void evtStart(EvTimer *etp);
|
||||
void evtStop(EvTimer *etp);
|
||||
void evtObjectInit(event_timer_t *etp, systime_t time);
|
||||
void evtStart(event_timer_t *etp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Initializes an @p EvTimer structure.
|
||||
* @brief Stops the timer.
|
||||
* @details If the timer was already stopped then the function has no effect.
|
||||
*
|
||||
* @param etp the EvTimer structure to be initialized
|
||||
* @param time the interval in system ticks
|
||||
* @param[in] etp pointer to an initialized @p event_timer_t structure.
|
||||
*/
|
||||
#define evtInit(etp, time) { \
|
||||
chEvtInit(&(etp)->et_es); \
|
||||
(etp)->et_vt.vt_func = NULL; \
|
||||
(etp)->et_interval = (time); \
|
||||
static inline void vevtStop(event_timer_t *etp) {
|
||||
|
||||
chVTReset(&etp->et_vt);
|
||||
}
|
||||
|
||||
#endif /* _EVTIMER_H_ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue