diff --git a/demos/various/RT-ARMCM4-GENERIC/Makefile b/demos/various/RT-ARMCM4-GENERIC/Makefile index 580eacb92..383f60b98 100644 --- a/demos/various/RT-ARMCM4-GENERIC/Makefile +++ b/demos/various/RT-ARMCM4-GENERIC/Makefile @@ -199,4 +199,4 @@ include $(RULESPATH)/rules.mk # MISRA check rule, requires PCLint and the setup files, not provided. # misra: - @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(INCDIR) $(KERNSRC) &> misra.txt + @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt diff --git a/demos/various/RT-ARMCM4-GENERIC/main.c b/demos/various/RT-ARMCM4-GENERIC/main.c index a7e4e8794..fd6b6558e 100644 --- a/demos/various/RT-ARMCM4-GENERIC/main.c +++ b/demos/various/RT-ARMCM4-GENERIC/main.c @@ -29,8 +29,6 @@ static THD_FUNCTION(Thread1, arg) { while (true) { chThdSleepMilliseconds(1000); } - - return 0; } /* @@ -48,7 +46,7 @@ int main(void) { /* * Creates the example thread. */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + (void) chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* * Normal main() thread activity, in this demo it just sleeps. diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0.c b/os/common/ports/ARMCMx/compilers/GCC/crt0.c index 21b2c4d84..daa6a63aa 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/crt0.c +++ b/os/common/ports/ARMCMx/compilers/GCC/crt0.c @@ -26,36 +26,40 @@ */ #include +#include #if !defined(FALSE) #define FALSE 0 #endif #if !defined(TRUE) -#define TRUE (!FALSE) +#define TRUE 1 #endif #define SCB_CPACR *((uint32_t *)0xE000ED88U) #define SCB_FPCCR *((uint32_t *)0xE000EF34U) #define SCB_FPDSCR *((uint32_t *)0xE000EF3CU) -#define FPCCR_ASPEN (0x1U << 31) -#define FPCCR_LSPEN (0x1U << 30) +#define FPCCR_ASPEN (uint32_t)((uint32_t)0x1U << (uint32_t)31U) +#define FPCCR_LSPEN (uint32_t)((uint32_t)0x1U << (uint32_t)30U) typedef void (*funcp_t)(void); typedef funcp_t * funcpp_t; -#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +#define SYMVAL(sym) (uint32_t)&(sym) /* * Area fill code, it is a macro because here functions cannot be called * until stacks are initialized. */ -#define fill32(start, end, filler) { \ +#define fill32(start, end, filler) do { \ uint32_t *p1 = (start); \ uint32_t *p2 = (end); \ - while (p1 < p2) \ + /*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/ \ + while (p1 < p2) { \ + /*lint -restore*/ \ *p1++ = (filler); \ -} + } \ +} while (false) /*===========================================================================*/ /** @@ -223,7 +227,9 @@ extern void main(void); #if !defined(__DOXYGEN__) __attribute__((weak)) #endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void __early_init(void) {} +/*lint -restore*/ /** * @brief Late initialization. @@ -235,7 +241,9 @@ void __early_init(void) {} #if !defined(__DOXYGEN__) __attribute__((weak)) #endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void __late_init(void) {} +/*lint -restore*/ /** * @brief Default @p main() function exit handler. @@ -246,9 +254,12 @@ void __late_init(void) {} #if !defined(__DOXYGEN__) __attribute__((noreturn, weak)) #endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void _default_exit(void) { - while (1) - ; +/*lint -restore*/ + + while (true) { + } } /** @@ -257,63 +268,68 @@ void _default_exit(void) { #if !defined(__DOXYGEN__) __attribute__((naked)) #endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void Reset_Handler(void) { +/*lint -restore*/ uint32_t psp, reg; /* Process Stack initialization, it is allocated starting from the symbol __process_stack_end__ and its lower limit is the symbol __process_stack_base__.*/ - asm volatile ("cpsid i"); + __asm volatile ("cpsid i"); psp = SYMVAL(__process_stack_end__); - asm volatile ("msr PSP, %0" : : "r" (psp)); + __asm volatile ("msr PSP, %0" : : "r" (psp)); -#if CORTEX_USE_FPU +#if CORTEX_USE_FPU == TRUE /* Initializing the FPU context save in lazy mode.*/ SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN; /* CP10 and CP11 set to full access.*/ - SCB_CPACR |= 0x00F00000; + SCB_CPACR |= 0x00F00000U; /* FPSCR and FPDSCR initially zero.*/ reg = 0; - asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory"); + __asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory"); SCB_FPDSCR = reg; /* CPU mode initialization, enforced FPCA bit.*/ - reg = CRT0_CONTROL_INIT | 4; + reg = (uint32_t)CRT0_CONTROL_INIT | 4U; #else /* CPU mode initialization.*/ reg = CRT0_CONTROL_INIT; #endif - asm volatile ("msr CONTROL, %0" : : "r" (reg)); - asm volatile ("isb"); + __asm volatile ("msr CONTROL, %0" : : "r" (reg)); + __asm volatile ("isb"); /* Early initialization hook invocation.*/ __early_init(); -#if CRT0_INIT_STACKS +#if CRT0_INIT_STACKS == TRUE /* Main and Process stacks initialization.*/ fill32(&__main_stack_base__, &__main_stack_end__, - CRT0_STACKS_FILL_PATTERN); + (uint32_t)CRT0_STACKS_FILL_PATTERN); fill32(&__process_stack_base__, &__process_stack_end__, - CRT0_STACKS_FILL_PATTERN); + (uint32_t)CRT0_STACKS_FILL_PATTERN); #endif -#if CRT0_INIT_DATA +#if CRT0_INIT_DATA == TRUE /* DATA segment initialization.*/ { uint32_t *tp, *dp; tp = &_textdata; dp = &_data; - while (dp < &_edata) + /*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/ + while (dp < &_edata) { + /*lint -restore*/ *dp++ = *tp++; + } } #endif -#if CRT0_INIT_BSS +#if CRT0_INIT_BSS == TRUE /* BSS segment initialization.*/ fill32(&_bss_start, &_bss_end, 0); #endif @@ -325,7 +341,9 @@ void Reset_Handler(void) { /* Constructors invocation.*/ { funcpp_t fpp = &__init_array_start; + /*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/ while (fpp < &__init_array_end) { + /*lint -restore*/ (*fpp)(); fpp++; } @@ -335,11 +353,13 @@ void Reset_Handler(void) { /* Invoking application main() function.*/ main(); -#if CRT0_CALL_DESTRUCTORS +#if CRT0_CALL_DESTRUCTORS == TRUE /* Destructors invocation.*/ { funcpp_t fpp = &__fini_array_start; + /*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/ while (fpp < &__fini_array_end) { + /*lint -restore*/ (*fpp)(); fpp++; } diff --git a/os/common/ports/ARMCMx/compilers/GCC/vectors.c b/os/common/ports/ARMCMx/compilers/GCC/vectors.c index 837797b4c..d67d4171b 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/vectors.c +++ b/os/common/ports/ARMCMx/compilers/GCC/vectors.c @@ -30,7 +30,7 @@ #include "cmparams.h" -#if (CORTEX_NUM_VECTORS & 7) != 0 +#if (CORTEX_NUM_VECTORS % 8) != 0 #error "the constant CORTEX_NUM_VECTORS must be a multiple of 8" #endif @@ -73,10 +73,12 @@ typedef struct { * * @notapi */ +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void _unhandled_exception(void) { +/*lint -restore*/ - while (true) - ; + while (true) { + } } #if !defined(__DOXYGEN__) @@ -462,7 +464,9 @@ void Vector3FC(void) __attribute__((weak, alias("_unhandled_exception"))); #if !defined(__DOXYGEN__) __attribute__ ((used, section("vectors"))) #endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ vectors_t _vectors = { +/*lint -restore*/ &__main_stack_end__,Reset_Handler, NMI_Handler, HardFault_Handler, MemManage_Handler, BusFault_Handler, UsageFault_Handler, Vector1C, Vector20, Vector24, Vector28, SVC_Handler, diff --git a/os/rt/ports/ARMCMx/chcore_v7m.c b/os/rt/ports/ARMCMx/chcore_v7m.c index 577599834..82cbb1c32 100644 --- a/os/rt/ports/ARMCMx/chcore_v7m.c +++ b/os/rt/ports/ARMCMx/chcore_v7m.c @@ -51,14 +51,16 @@ /* Module interrupt handlers. */ /*===========================================================================*/ -#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__) +#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__) /** * @brief SVC vector. * @details The SVC vector is used for exception mode re-entering after a * context switch. * @note The PendSV vector is only used in advanced kernel mode. */ +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void SVC_Handler(void) { +/*lint -restore*/ struct port_extctx *ctxp; #if CORTEX_USE_FPU @@ -79,16 +81,18 @@ void SVC_Handler(void) { /* Restoring the normal interrupts status.*/ port_unlock_from_isr(); } -#endif /* !CORTEX_SIMPLIFIED_PRIORITY */ +#endif /* CORTEX_SIMPLIFIED_PRIORITY == FALSE */ -#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__) +#if (CORTEX_SIMPLIFIED_PRIORITY == TRUE) || defined(__DOXYGEN__) /** * @brief PendSV vector. * @details The PendSV vector is used for exception mode re-entering after a * context switch. * @note The PendSV vector is only used in compact kernel mode. */ +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ void PendSV_Handler(void) { +/*lint -restore*/ struct port_extctx *ctxp; #if CORTEX_USE_FPU @@ -106,7 +110,7 @@ void PendSV_Handler(void) { /* Writing back the modified PSP value.*/ __set_PSP((uint32_t)ctxp); } -#endif /* CORTEX_SIMPLIFIED_PRIORITY */ +#endif /* CORTEX_SIMPLIFIED_PRIORITY == TRUE */ /*===========================================================================*/ /* Module exported functions. */ @@ -118,10 +122,10 @@ void PendSV_Handler(void) { void _port_irq_epilogue(void) { port_lock_from_isr(); - if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0) { + if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) { struct port_extctx *ctxp; -#if CORTEX_USE_FPU +#if CORTEX_USE_FPU == TRUE /* Enforcing a lazy FPU state save by accessing the FPCSR register.*/ (void) __get_FPSCR(); #endif @@ -135,7 +139,7 @@ void _port_irq_epilogue(void) { /* Setting up a fake XPSR register value.*/ ctxp->xpsr = (regarm_t)0x01000000; -#if CORTEX_USE_FPU +#if CORTEX_USE_FPU == TRUE ctxp->fpscr = (regarm_t)FPU->FPDSCR; #endif diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h index b4fafc736..f3c59a296 100644 --- a/os/rt/ports/ARMCMx/chcore_v7m.h +++ b/os/rt/ports/ARMCMx/chcore_v7m.h @@ -85,7 +85,7 @@ */ #if !defined(CORTEX_USE_FPU) #define CORTEX_USE_FPU CORTEX_HAS_FPU -#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU +#elif (CORTEX_USE_FPU == TRUE) && (CORTEX_HAS_FPU == FALSE) /* This setting requires an FPU presence check in case it is externally redefined.*/ #error "the selected core does not have an FPU" diff --git a/test/hal/testbuild/pclint/waivers.lnt b/test/hal/testbuild/pclint/waivers.lnt index ea5b15dd1..78b58e3c2 100644 --- a/test/hal/testbuild/pclint/waivers.lnt +++ b/test/hal/testbuild/pclint/waivers.lnt @@ -14,8 +14,8 @@ Remove temporarily the following -e in order to perform extra code quality checks.*/ -e526 -e537 -e552 --e613 --e714 -e716 -e717 -e749 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793 +-e611 -e613 +-e714 -e716 -e717 -e749 -e750 -e754 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793 -e826 -e830 -e835 -e845 /* Removing *advisory* directives and rules that would negatively impact diff --git a/test/rt/testbuild/pclint/waivers.lnt b/test/rt/testbuild/pclint/waivers.lnt index 13a964f92..1acdaf818 100644 --- a/test/rt/testbuild/pclint/waivers.lnt +++ b/test/rt/testbuild/pclint/waivers.lnt @@ -15,8 +15,8 @@ Remove temporarily the following -e in order to perform extra code quality checks.*/ -e526 -e537 -e552 --e613 --e714 -e716 -e717 -e749 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793 +-e611 -e613 +-e714 -e716 -e717 -e749 -e750 -e754 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793 -e826 -e830 -e835 -e845 /* Removing *advisory* directives and rules that would negatively impact