git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7744 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
a9cbe386f2
commit
b8dcd884ff
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@ -199,4 +199,4 @@ include $(RULESPATH)/rules.mk
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# MISRA check rule, requires PCLint and the setup files, not provided.
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#
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misra:
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@lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(INCDIR) $(KERNSRC) &> misra.txt
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@lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt
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@ -29,8 +29,6 @@ static THD_FUNCTION(Thread1, arg) {
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while (true) {
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chThdSleepMilliseconds(1000);
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}
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return 0;
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}
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/*
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@ -48,7 +46,7 @@ int main(void) {
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/*
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* Creates the example thread.
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*/
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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(void) chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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/*
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* Normal main() thread activity, in this demo it just sleeps.
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@ -26,36 +26,40 @@
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#if !defined(FALSE)
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#define FALSE 0
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#endif
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#if !defined(TRUE)
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#define TRUE (!FALSE)
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#define TRUE 1
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#endif
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#define SCB_CPACR *((uint32_t *)0xE000ED88U)
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#define SCB_FPCCR *((uint32_t *)0xE000EF34U)
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#define SCB_FPDSCR *((uint32_t *)0xE000EF3CU)
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#define FPCCR_ASPEN (0x1U << 31)
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#define FPCCR_LSPEN (0x1U << 30)
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#define FPCCR_ASPEN (uint32_t)((uint32_t)0x1U << (uint32_t)31U)
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#define FPCCR_LSPEN (uint32_t)((uint32_t)0x1U << (uint32_t)30U)
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typedef void (*funcp_t)(void);
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typedef funcp_t * funcpp_t;
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#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
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#define SYMVAL(sym) (uint32_t)&(sym)
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/*
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* Area fill code, it is a macro because here functions cannot be called
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* until stacks are initialized.
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*/
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#define fill32(start, end, filler) { \
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#define fill32(start, end, filler) do { \
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uint32_t *p1 = (start); \
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uint32_t *p2 = (end); \
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while (p1 < p2) \
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/*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/ \
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while (p1 < p2) { \
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/*lint -restore*/ \
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*p1++ = (filler); \
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}
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} \
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} while (false)
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/*===========================================================================*/
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/**
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@ -223,7 +227,9 @@ extern void main(void);
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#if !defined(__DOXYGEN__)
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__attribute__((weak))
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#endif
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void __early_init(void) {}
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/*lint -restore*/
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/**
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* @brief Late initialization.
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@ -235,7 +241,9 @@ void __early_init(void) {}
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#if !defined(__DOXYGEN__)
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__attribute__((weak))
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#endif
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void __late_init(void) {}
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/*lint -restore*/
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/**
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* @brief Default @p main() function exit handler.
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@ -246,9 +254,12 @@ void __late_init(void) {}
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#if !defined(__DOXYGEN__)
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__attribute__((noreturn, weak))
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#endif
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void _default_exit(void) {
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while (1)
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;
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/*lint -restore*/
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while (true) {
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}
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}
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/**
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@ -257,63 +268,68 @@ void _default_exit(void) {
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#if !defined(__DOXYGEN__)
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__attribute__((naked))
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#endif
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void Reset_Handler(void) {
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/*lint -restore*/
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uint32_t psp, reg;
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/* Process Stack initialization, it is allocated starting from the
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symbol __process_stack_end__ and its lower limit is the symbol
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__process_stack_base__.*/
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asm volatile ("cpsid i");
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__asm volatile ("cpsid i");
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psp = SYMVAL(__process_stack_end__);
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asm volatile ("msr PSP, %0" : : "r" (psp));
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__asm volatile ("msr PSP, %0" : : "r" (psp));
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#if CORTEX_USE_FPU
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#if CORTEX_USE_FPU == TRUE
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/* Initializing the FPU context save in lazy mode.*/
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SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
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/* CP10 and CP11 set to full access.*/
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SCB_CPACR |= 0x00F00000;
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SCB_CPACR |= 0x00F00000U;
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/* FPSCR and FPDSCR initially zero.*/
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reg = 0;
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asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory");
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__asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory");
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SCB_FPDSCR = reg;
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/* CPU mode initialization, enforced FPCA bit.*/
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reg = CRT0_CONTROL_INIT | 4;
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reg = (uint32_t)CRT0_CONTROL_INIT | 4U;
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#else
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/* CPU mode initialization.*/
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reg = CRT0_CONTROL_INIT;
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#endif
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asm volatile ("msr CONTROL, %0" : : "r" (reg));
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asm volatile ("isb");
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__asm volatile ("msr CONTROL, %0" : : "r" (reg));
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__asm volatile ("isb");
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/* Early initialization hook invocation.*/
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__early_init();
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#if CRT0_INIT_STACKS
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#if CRT0_INIT_STACKS == TRUE
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/* Main and Process stacks initialization.*/
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fill32(&__main_stack_base__,
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&__main_stack_end__,
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CRT0_STACKS_FILL_PATTERN);
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(uint32_t)CRT0_STACKS_FILL_PATTERN);
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fill32(&__process_stack_base__,
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&__process_stack_end__,
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CRT0_STACKS_FILL_PATTERN);
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(uint32_t)CRT0_STACKS_FILL_PATTERN);
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#endif
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#if CRT0_INIT_DATA
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#if CRT0_INIT_DATA == TRUE
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/* DATA segment initialization.*/
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{
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uint32_t *tp, *dp;
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tp = &_textdata;
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dp = &_data;
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while (dp < &_edata)
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/*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/
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while (dp < &_edata) {
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/*lint -restore*/
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*dp++ = *tp++;
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}
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}
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#endif
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#if CRT0_INIT_BSS
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#if CRT0_INIT_BSS == TRUE
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/* BSS segment initialization.*/
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fill32(&_bss_start, &_bss_end, 0);
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#endif
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/* Constructors invocation.*/
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{
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funcpp_t fpp = &__init_array_start;
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/*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/
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while (fpp < &__init_array_end) {
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/*lint -restore*/
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(*fpp)();
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fpp++;
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}
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@ -335,11 +353,13 @@ void Reset_Handler(void) {
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/* Invoking application main() function.*/
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main();
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#if CRT0_CALL_DESTRUCTORS
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#if CRT0_CALL_DESTRUCTORS == TRUE
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/* Destructors invocation.*/
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{
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funcpp_t fpp = &__fini_array_start;
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/*lint -save -e681 [2.1] Lint cannot see the scatter file symbols.*/
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while (fpp < &__fini_array_end) {
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/*lint -restore*/
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(*fpp)();
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fpp++;
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}
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@ -30,7 +30,7 @@
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#include "cmparams.h"
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#if (CORTEX_NUM_VECTORS & 7) != 0
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#if (CORTEX_NUM_VECTORS % 8) != 0
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#error "the constant CORTEX_NUM_VECTORS must be a multiple of 8"
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#endif
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@ -73,10 +73,12 @@ typedef struct {
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*
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* @notapi
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*/
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void _unhandled_exception(void) {
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/*lint -restore*/
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while (true)
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;
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while (true) {
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}
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}
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#if !defined(__DOXYGEN__)
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#if !defined(__DOXYGEN__)
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__attribute__ ((used, section("vectors")))
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#endif
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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vectors_t _vectors = {
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/*lint -restore*/
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&__main_stack_end__,Reset_Handler, NMI_Handler, HardFault_Handler,
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MemManage_Handler, BusFault_Handler, UsageFault_Handler, Vector1C,
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Vector20, Vector24, Vector28, SVC_Handler,
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@ -51,14 +51,16 @@
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/* Module interrupt handlers. */
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/*===========================================================================*/
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#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
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#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__)
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/**
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* @brief SVC vector.
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* @details The SVC vector is used for exception mode re-entering after a
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* context switch.
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* @note The PendSV vector is only used in advanced kernel mode.
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*/
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void SVC_Handler(void) {
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/*lint -restore*/
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU
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/* Restoring the normal interrupts status.*/
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port_unlock_from_isr();
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}
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#endif /* !CORTEX_SIMPLIFIED_PRIORITY */
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#endif /* CORTEX_SIMPLIFIED_PRIORITY == FALSE */
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#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
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#if (CORTEX_SIMPLIFIED_PRIORITY == TRUE) || defined(__DOXYGEN__)
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/**
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* @brief PendSV vector.
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* @details The PendSV vector is used for exception mode re-entering after a
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* context switch.
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* @note The PendSV vector is only used in compact kernel mode.
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*/
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void PendSV_Handler(void) {
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/*lint -restore*/
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU
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@ -106,7 +110,7 @@ void PendSV_Handler(void) {
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/* Writing back the modified PSP value.*/
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__set_PSP((uint32_t)ctxp);
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}
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#endif /* CORTEX_SIMPLIFIED_PRIORITY */
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#endif /* CORTEX_SIMPLIFIED_PRIORITY == TRUE */
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/*===========================================================================*/
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/* Module exported functions. */
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@ -118,10 +122,10 @@ void PendSV_Handler(void) {
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void _port_irq_epilogue(void) {
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port_lock_from_isr();
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if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0) {
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if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) {
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU
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#if CORTEX_USE_FPU == TRUE
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/* Enforcing a lazy FPU state save by accessing the FPCSR register.*/
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(void) __get_FPSCR();
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#endif
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/* Setting up a fake XPSR register value.*/
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ctxp->xpsr = (regarm_t)0x01000000;
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#if CORTEX_USE_FPU
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#if CORTEX_USE_FPU == TRUE
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ctxp->fpscr = (regarm_t)FPU->FPDSCR;
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#endif
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@ -85,7 +85,7 @@
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*/
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#if !defined(CORTEX_USE_FPU)
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#define CORTEX_USE_FPU CORTEX_HAS_FPU
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#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU
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#elif (CORTEX_USE_FPU == TRUE) && (CORTEX_HAS_FPU == FALSE)
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/* This setting requires an FPU presence check in case it is externally
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redefined.*/
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#error "the selected core does not have an FPU"
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@ -14,8 +14,8 @@
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Remove temporarily the following -e in order to perform extra code quality
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checks.*/
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-e526 -e537 -e552
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-e613
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-e714 -e716 -e717 -e749 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793
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-e611 -e613
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-e714 -e716 -e717 -e749 -e750 -e754 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793
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-e826 -e830 -e835 -e845
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/* Removing *advisory* directives and rules that would negatively impact
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@ -15,8 +15,8 @@
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Remove temporarily the following -e in order to perform extra code quality
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checks.*/
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-e526 -e537 -e552
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-e613
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-e714 -e716 -e717 -e749 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793
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-e611 -e613
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-e714 -e716 -e717 -e749 -e750 -e754 -e757 -e758 -e759 -e766 -e768 -e769 -e773 -e778 -e793
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-e826 -e830 -e835 -e845
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/* Removing *advisory* directives and rules that would negatively impact
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