git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@135 35acf78f-673a-0410-8e92-d51de3d6d3f4

demos/ARM7-LPC214x-GCC/chcore.c

@@ -116,13 +116,11 @@ void hwinit(void) {
    */
   InitVIC();
   VICDefVectAddr = (IOREG32)IrqHandler;
-  SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
-  SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);
-  SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);
 
   /*
    * System Timer initialization, 1ms intervals.
    */
+  SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
   VICIntEnable = INTMASK(SOURCE_Timer0);
   TC *timer = T0Base;
   timer->TC_PR = VAL_TC0_PRESCALER;
@@ -134,7 +132,7 @@ void hwinit(void) {
   /*
    * Other subsystems.
    */
-  InitSerial();
+  InitSerial(1, 2);
   InitSSP();
   InitMMC();
   InitBuzzer();
@@ -174,17 +172,45 @@ void chSysPuts(char *msg) {
 /*
  * Non-vectored IRQs handling here.
  */
-void NonVectoredIrq(void) {
+__attribute__((naked, weak))
+void IrqHandler(void) {
 
+  asm(".code 32                                 \n\t" \
+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");
+#ifdef THUMB
+  asm("add      r0, pc, #1                      \n\t" \
+      "bx       r0                              \n\t" \
+      ".code 16                                 \n\t");
   VICVectAddr = 0;
+  asm("ldr      r0, =IrqCommon                  \n\t" \
+      "bx       r0                              \n\t");
+#else
+  VICVectAddr = 0;
+  asm("b        IrqCommon                       \n\t");
+#endif
 }
 
 /*
  * Timer 0 IRQ handling here.
  */
-void Timer0Irq(void) {
+__attribute__((naked, weak))
+void T0IrqHandler(void) {
 
+  asm(".code 32                                 \n\t" \
+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");
+#ifdef THUMB
+  asm("add      r0, pc, #1                      \n\t" \
+      "bx       r0                              \n\t" \
+      ".code 16                                 \n\t");
   T0IR = 1;             /* Clear interrupt on match MR0. */
   chSysTimerHandlerI();
   VICVectAddr = 0;
+  asm("ldr      r0, =IrqCommon                  \n\t" \
+      "bx       r0                              \n\t");
+#else
+  T0IR = 1;             /* Clear interrupt on match MR0. */
+  chSysTimerHandlerI();
+  VICVectAddr = 0;
+  asm("b        IrqCommon                       \n\t");
+#endif
 }

demos/ARM7-LPC214x-GCC/chcore2.s

@@ -53,18 +53,23 @@ jmpr4:  bx      r4
 .code 32
 #endif
 
+.weak UndHandler
 .globl UndHandler
 UndHandler:
 
+.weak SwiHandler
 .globl SwiHandler
 SwiHandler:
 
+.weak PrefetchHandler
 .globl PrefetchHandler
 PrefetchHandler:
 
+.weak AbortHandler
 .globl AbortHandler
 AbortHandler:
 
+.weak FiqHandler
 .globl FiqHandler
 FiqHandler:
 #ifdef THUMB_NO_INTERWORKING
@@ -111,6 +116,8 @@ chSysSwitchI:
 #endif /* CH_CURRP_REGISTER_CACHE */
 
 /*
+ * Common exit point for all IRQ routines, it performs the rescheduling if
+ * required.
  * System stack frame structure after a context switch in the
  * interrupt handler:
  *
@@ -135,70 +142,6 @@ chSysSwitchI:
  * SP-> |     R4     | -+
  * Low  +------------+
  */
-.globl IrqHandler
-IrqHandler:
-        stmfd   sp!, {r0-r3, r12, lr}
-#ifdef THUMB_NO_INTERWORKING
-        add     r0, pc, #1
-        bx      r0
-.code 16
-        bl      NonVectoredIrq
-        b       IrqCommon
-.code 32
-#else
-        bl      NonVectoredIrq
-        b       IrqCommon
-#endif
-
-.globl T0IrqHandler
-T0IrqHandler:
-        stmfd   sp!, {r0-r3, r12, lr}
-#ifdef THUMB_NO_INTERWORKING
-        add     r0, pc, #1
-        bx      r0
-.code 16
-        bl      Timer0Irq
-        b       IrqCommon
-.code 32
-#else
-        bl      Timer0Irq
-        b       IrqCommon
-#endif
-
-.globl UART0IrqHandler
-UART0IrqHandler:
-        stmfd   sp!, {r0-r3, r12, lr}
-#ifdef THUMB_NO_INTERWORKING
-        add     r0, pc, #1
-        bx      r0
-.code 16
-        bl      UART0Irq
-        b       IrqCommon
-.code 32
-#else
-        bl      UART0Irq
-        b       IrqCommon
-#endif
-
-.globl UART1IrqHandler
-UART1IrqHandler:
-        stmfd   sp!, {r0-r3, r12, lr}
-#ifdef THUMB_NO_INTERWORKING
-        add     r0, pc, #1
-        bx      r0
-.code 16
-        bl      UART1Irq
-        b       IrqCommon
-.code 32
-#else
-        bl      UART1Irq
-        b       IrqCommon
-#endif
-
-/*
- * Common exit point for all IRQ routines, it performs the rescheduling if
- * required.
- */
 #ifdef THUMB_NO_INTERWORKING
 .code 16
 .globl IrqCommon

ports/ARM7-LPC214x/GCC/lpc214x_serial.c

@@ -20,6 +20,7 @@
 #include <ch.h>
 
 #include "lpc214x.h"
+#include "vic.h"
 #include "lpc214x_serial.h"
 
 FullDuplexDriver COM1;
@@ -94,14 +95,40 @@ static void ServeInterrupt(UART *u, FullDuplexDriver *com) {
   }
 }
 
-void UART0Irq(void) {
+__attribute__((naked, weak))
+void UART0IrqHandler(void) {
 
+  asm(".code 32                                 \n\t" \
+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");
+#ifdef THUMB
+  asm("add      r0, pc, #1                      \n\t" \
+      "bx       r0                              \n\t" \
+      ".code 16                                 \n\t");
   ServeInterrupt(U0Base, &COM1);
+  asm("ldr      r0, =IrqCommon                  \n\t" \
+      "bx       r0                              \n\t");
+#else
+  ServeInterrupt(U0Base, &COM1);
+  asm("b        IrqCommon                       \n\t");
+#endif
 }
 
-void UART1Irq(void) {
+__attribute__((naked, weak))
+void UART1IrqHandler(void) {
 
+  asm(".code 32                                 \n\t" \
+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");
+#ifdef THUMB
+  asm("add      r0, pc, #1                      \n\t" \
+      "bx       r0                              \n\t" \
+      ".code 16                                 \n\t");
   ServeInterrupt(U1Base, &COM2);
+  asm("ldr      r0, =IrqCommon                  \n\t" \
+      "bx       r0                              \n\t");
+#else
+  ServeInterrupt(U1Base, &COM2);
+  asm("b        IrqCommon                       \n\t");
+#endif
 }
 
 #ifdef FIFO_PRELOAD
@@ -176,7 +203,10 @@ void SetUARTI(UART *u, int speed, int lcr, int fcr) {
 /*
  * Serial subsystem initialization.
  */
-void InitSerial(void) {
+void InitSerial(int vector1, int vector2) {
+
+  SetVICVector(UART0IrqHandler, vector1, SOURCE_UART0);
+  SetVICVector(UART1IrqHandler, vector2, SOURCE_UART1);
 
   PCONP = (PCONP & PCALL) | PCUART0 | PCUART1;
 

ports/ARM7-LPC214x/GCC/lpc214x_serial.h

@@ -40,7 +40,7 @@
 #ifdef __cplusplus
 }
 #endif
-  void InitSerial(void);
+  void InitSerial(int vector1, int vector2);
   void UART0IrqHandler(void);
   void UART1IrqHandler(void);
   void SetUARTI(UART *u, int speed, int lcr, int fcr);

readme.txt

@@ -39,6 +39,13 @@ AVR-AT90CANx-GCC       - Port on AVR AT90CAN128, not complete yet.
 *** Releases                                                              ***
 *****************************************************************************
 
+*** 0.4.5 ***
+- Moved the serial IRQ handlers and VIC vectors initialization inside the
+  serial drivers. Now the serial-related code is all inside the driver.
+- Moved all the other interrupt handlers from chcore2.s into chcore.c as
+  inline asm code. The interrupt code now is faster because one less call
+  level.
+
 *** 0.4.4 ***
 - Fixed a very important bug in the preemption ARM code, important enough to
   make this update *mandatory*.