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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1713 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2010-03-05 19:01:12 +00:00
parent 549fe1b7d3
commit b69948bc48
26 changed files with 2851 additions and 13 deletions
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67
boards/RAISONANCE_REVA_STM8S/board.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/*
* TIM 2 clock after the prescaler.
*/
#define TIM2_CLOCK (SYSCLK / 16)
#define TIM2_ARR ((TIM2_CLOCK / CH_FREQUENCY) - 1)
/*
* TIM2 interrupt handler.
*/
CH_IRQ_HANDLER(13) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
TIM2_SR1 = 0;
CH_IRQ_EPILOGUE();
}
/*
* Board initialization code.
*/
void hwinit(void) {
/*
* HAL initialization.
*/
halInit();
/*
* TIM2 initialization as system tick.
*/
CLK_PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
TIM2_PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2_ARRH = TIM2_ARR >> 8;
TIM2_ARRL = TIM2_ARR;
TIM2_CNTRH = 0;
TIM2_CNTRL = 0;
TIM2_SR1 = 0;
TIM2_IER = 1; /* UIE */
TIM2_CR1 = 1; /* CEN */
}

186
boards/RAISONANCE_REVA_STM8S/board.h Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Raisonance REva V3 + STM8S208RB daughter board.
*/
/*
* Board identifiers.
*/
#define BOARD_REVA_V3_STM8S208RB
#define BOARD_NAME "Raisonance REva V3 + STM8S208RB"
/*
* Board frequencies.
*/
#define HSECLK 24000000
/*
* MCU model used on the board.
* The available models are listed in the file ./os/hal/platforms/stm8/stm8.h
*/
#define STM8_PLATFORM PLATFORM_STM8S208RB
/*
* Pin definitions.
*/
#define PA_OSCIN 1
#define PA_J2_25 2 /* It is also OSCOUT. */
#define PA_J2_27 3
#define PA_RX 4
#define PA_TX 5
#define PB_LED(n) (n)
#define PB_LCD_D0 0
#define PB_LCD_D1 1
#define PB_LCD_CSB 2
#define PB_LCD_RESB 3
#define PC_ADC_ETR 0
#define PC_J2_51 1
#define PC_J2_53 2
#define PC_J2_55 3
#define PC_J2_57 4
#define PC_SCK 5
#define PC_MOSI 6
#define PC_MISO 7
#define PD_J2_69 0
#define PD_J2_21 1
#define PD_J2_67 2
#define PD_J2_65 3
#define PD_PWM 4
#define PD_J2_63 5
#define PD_J2_61 6
#define PD_J2_59 7
#define PE_P2_49 0
#define PE_SCL 1
#define PE_SDA 2
#define PE_P2_47 3
#define PE_P2_45 4
#define PE_P2_43 5
#define PE_P2_41 6
#define PE_P2_39 7
#define PF_J2_37 0
#define PF_J2_35 1
#define PF_J2_33 2
#define PF_J2_31 3
#define PF_ANA_IN1 4
#define PF_ANA_IN2 5
#define PF_ANA_TEMP 6
#define PF_ANA_POT 7
#define PG_CAN_TX 0
#define PG_CAN_RX 1
#define PG_BT5 2
#define PG_BT6 3
#define PG_SW4 4
#define PG_SW3 5
#define PG_SW2 6
#define PG_SW1 7
#define PI_J2_71 0
/*
* Port A initial setup.
*/
#define VAL_GPIOAODR (1 << PA_TX) /* PA_TX initially to 1. */
#define VAL_GPIOADDR (1 << PA_TX) /* PA_TX output, others inputs. */
#define VAL_GPIOACR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOACR2 0
/*
* Port B initial setup.
*/
#define VAL_GPIOBODR 0xFF /* Initially all set to high. */
#define VAL_GPIOBDDR 0xFF /* All outputs. */
#define VAL_GPIOBCR1 0xFF /* All push-pull. */
#define VAL_GPIOBCR2 0
/*
* Port C initial setup.
*/
#define VAL_GPIOCODR 0
#define VAL_GPIOCDDR 0 /* All inputs. */
#define VAL_GPIOCCR1 0xFF /* All pull-up. */
#define VAL_GPIOCCR2 0
/*
* Port D initial setup.
*/
#define VAL_GPIODODR 0
#define VAL_GPIODDDR 0 /* All inputs. */
#define VAL_GPIODCR1 0xFF /* All pull-up. */
#define VAL_GPIODCR2 0
/*
* Port E initial setup.
*/
#define VAL_GPIOEODR 0
#define VAL_GPIOEDDR 0 /* All inputs. */
#define VAL_GPIOECR1 0xFF /* All pull-up. */
#define VAL_GPIOECR2 0
/*
* Port F initial setup.
*/
#define VAL_GPIOFODR 0
#define VAL_GPIOFDDR 0 /* All inputs. */
#define VAL_GPIOFCR1 0xFF /* All pull-up. */
#define VAL_GPIOFCR2 0
/*
* Port G initial setup.
*/
#define VAL_GPIOGODR (1 << PG_CAN_TX)/* CAN_TX initially to 1. */
#define VAL_GPIOGDDR (1 << PG_CAN_TX)/* CAN_TX output, others inputs. */
#define VAL_GPIOGCR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOGCR2 0
/*
* Port H initial setup (dummy, not present).
*/
#define VAL_GPIOHODR 0
#define VAL_GPIOHDDR 0 /* All inputs. */
#define VAL_GPIOHCR1 0xFF /* All pull-up. */
#define VAL_GPIOHCR2 0
/*
* Port I initial setup.
*/
#define VAL_GPIOIODR 0
#define VAL_GPIOIDDR 0 /* All inputs. */
#define VAL_GPIOICR1 0xFF /* All pull-up. */
#define VAL_GPIOICR2 0
#ifdef __cplusplus
extern "C" {
#endif
void hwinit(void);
#ifdef __cplusplus
}
#endif
#endif /* _BOARD_H_ */

167
demos/STM8S-STM8S208-RC/ch.rapp Normal file
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<NodeC Path="..\..\os\kernel\src\chmempools.c" Header="chmempools.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmempools.obj" sate="0" > </NodeC>
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</NodeC>
</Group>
<Group Header="test" Marker="-1" OutputFile="" sate="96" >
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</Group>
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<NodeASM Path="..\..\os\ports\RC\STM8\chcoreasm.asm" Header="chcoreasm.asm" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chcoreasm.obj" sate="0" />
</Group>
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</Group>
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4
demos/STM8S-STM8S208-RC/ch.rprj Normal file
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<Project Header="Project 'ch'" Path=".\ch.rprj" Project="Yes" OutputFile="" sate="96" ActiveApp="ch" >
<ApplicationBuild Header="ch" Extern=".\ch.rapp" Path=".\ch.rapp" OutputFile="..\STM8S-STM8S208-RC/bin\ch.aof" sate="96" />
</Project>

480
demos/STM8S-STM8S208-RC/chconf.h Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/* Kernel parameters. */
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 100
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 10
#endif
/**
* @brief Nested locks.
* @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
* operations is allowed.<br>
* For performance and code size reasons the recommended setting
* is to leave this option disabled.<br>
* You may use this option if you need to merge ChibiOS/RT with
* external libraries that require nested lock/unlock operations.
*
* @note T he default is @p FALSE.
*/
#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
#define CH_USE_NESTED_LOCKS FALSE
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_COREMEM.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 3072
#endif
/*===========================================================================*/
/* Performance options. */
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES FALSE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS FALSE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES FALSE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE FALSE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP FALSE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS FALSE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC FALSE
#endif
/*===========================================================================*/
/* Debug options. */
/*===========================================================================*/
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/*===========================================================================*/
/* Kernel hooks. */
/*===========================================================================*/
/**
* @brief Threads descriptor structure hook.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitily from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
#endif /* _CHCONF_H_ */
/** @} */

152
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@ -0,0 +1,152 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @addtogroup HAL_CONF
* @{
*/
/*
* HAL configuration file, this file allows to enable or disable the various
* device drivers from your application. You may also use this file in order
* to override the device drivers default settings.
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
/*
* Uncomment the following line in order to include a mcu-related
* settings file. This file can be used to include platform specific
* header files or to override the low level drivers settings.
*/
#include "mcuconf.h"
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_PAL TRUE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
#define CH_HAL_USE_ADC FALSE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
#define CH_HAL_USE_CAN FALSE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC FALSE
#endif
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM FALSE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#endif
/*
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI FALSE
#endif
/*
* Default SPI settings overrides (uncomment to override).
*/
/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI FALSE
#endif
/*
* Default MMC_SPI settings overrides (uncomment to override).
*/
/*#define MMC_SECTOR_SIZE 512*/
/*#define MMC_NICE_WAITING TRUE*/
/*#define MMC_POLLING_INTERVAL 10*/
/*#define MMC_POLLING_DELAY 10*/
#endif /* _HALCONF_H_ */
/** @} */

75
demos/STM8S-STM8S208-RC/main.c Normal file
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@ -0,0 +1,75 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
#include "test.h"
/*
* LEDs blinker thread, times are in milliseconds.
*/
static WORKING_AREA(waThread1, 64);
static msg_t Thread1(void *arg) {
(void)arg;
while (TRUE) {
palClearPad(IOPORT2, PB_LED(7));
chThdSleepMilliseconds(500);
palSetPad(IOPORT2, PB_LED(7));
chThdSleepMilliseconds(500);
}
return 0;
}
/*
* Entry point.
*/
void main(void) {
/*
* Board/HAL initialization.
*/
hwinit();
/*
* OS initialization.
*/
chSysInit();
/*
* Activates the serial driver 1 using the driver default configuration.
*/
sdStart(&SD1, NULL);
/*
* Creates the blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/*
* Normal main() thread activity.
*/
while (TRUE) {
if (palReadPad(IOPORT7, PG_BT5) == PAL_LOW)
TestThread(&SD1);
if (palReadPad(IOPORT7, PG_BT6) == PAL_LOW)
sdWriteTimeout(&SD1, "Hello World!\r\n", 14, TIME_INFINITE);
chThdSleepMilliseconds(1000);
}
}

39
demos/STM8S-STM8S208-RC/mcuconf.h Normal file
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@ -0,0 +1,39 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* STM8 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*/
/*
* HAL general settings.
*/
#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI
#define STM8_HSI_DIVIDER CLK_HSI_DIV1
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
/*
* SERIAL driver system settings.
*/
#define USE_STM8_UART1 TRUE
#define USE_STM8_UART3 FALSE

4
docs/Doxyfile
View File

@ -579,6 +579,7 @@ INPUT = ../docs/src \
../os/kernel/src \ ../os/kernel/src \
../os/kernel/templates \ ../os/kernel/templates \
../os/ports \ ../os/ports \
../os/ports/GCC/AVR \
../os/ports/GCC/ARM7 \ ../os/ports/GCC/ARM7 \
../os/ports/GCC/ARM7/crt0.s \ ../os/ports/GCC/ARM7/crt0.s \
../os/ports/GCC/ARM7/chcoreasm.s \ ../os/ports/GCC/ARM7/chcoreasm.s \
@ -587,7 +588,7 @@ INPUT = ../docs/src \
../os/ports/GCC/PPC \ ../os/ports/GCC/PPC \
../os/ports/GCC/PPC/crt0.s \ ../os/ports/GCC/PPC/crt0.s \
../os/ports/GCC/MSP430 \ ../os/ports/GCC/MSP430 \
../os/ports/GCC/AVR \ ../os/ports/RC/STM8 \
../os/hal \ ../os/hal \
../os/hal/include \ ../os/hal/include \
../os/hal/src \ ../os/hal/src \
@ -597,6 +598,7 @@ INPUT = ../docs/src \
../os/hal/platforms/LPC214x \ ../os/hal/platforms/LPC214x \
../os/hal/platforms/MSP430 \ ../os/hal/platforms/MSP430 \
../os/hal/platforms/STM32 \ ../os/hal/platforms/STM32 \
../os/hal/platforms/STM8 \
../os/various \ ../os/various \
../test \ ../test \
../ext/ext.dox ../ext/ext.dox

16
docs/reports/STM8S208-16.txt
View File

@ -1,12 +1,12 @@
*************************************************************************** ***************************************************************************
Options: Optimized for space (3) Options: Optimized for speed (3)
Settings: CPUCLK=16MHz (HSI) Settings: CPUCLK=16MHz (HSI)
Compiler: Raisonance Compiler: Raisonance
*************************************************************************** ***************************************************************************
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 1.5.1unstable *** Kernel: 1.5.3unstable
*** Architecture: STM8 *** Architecture: STM8
*** Test Board: Raisonance REva V3 + STM8S208RB *** Test Board: Raisonance REva V3 + STM8S208RB
@ -51,15 +51,15 @@ Compiler: Raisonance
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1) --- Test Case 11.1 (Benchmark, messages #1)
--- Score : 32096 msgs/S, 64192 ctxswc/S --- Score : 31903 msgs/S, 63806 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2) --- Test Case 11.2 (Benchmark, messages #2)
--- Score : 25014 msgs/S, 50028 ctxswc/S --- Score : 24897 msgs/S, 49794 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3) --- Test Case 11.3 (Benchmark, messages #3)
--- Score : 25014 msgs/S, 50028 ctxswc/S --- Score : 24897 msgs/S, 49794 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch) --- Test Case 11.4 (Benchmark, context switch)
@ -75,7 +75,7 @@ Compiler: Raisonance
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads) --- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 7239 reschedulations/S, 43434 ctxswc/S --- Score : 7322 reschedulations/S, 43932 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching) --- Test Case 11.8 (Benchmark, round robin context switching)
@ -87,11 +87,11 @@ Compiler: Raisonance
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset) --- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 65508 timers/S --- Score : 64842 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal) --- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 200424 wait+signal/S --- Score : 200420 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, RAM footprint) --- Test Case 11.12 (Benchmark, RAM footprint)

111
os/hal/platforms/STM8/hal_lld.c Normal file
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@ -0,0 +1,111 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/hal_lld.c
* @brief STM8 HAL subsystem low level driver source.
*
* @addtogroup STM8_HAL
* @{
*/
#include "ch.h"
#include "hal.h"
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const STM8GPIOConfig pal_default_config =
{
{
{VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
{VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
{VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
{VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
{VAL_GPIOHODR, 0, VAL_GPIOHDDR, VAL_GPIOHCR1, VAL_GPIOHCR2},
{VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2}
}
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
*/
void hal_lld_init(void) {
#if STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT
#if STM8_CLOCK_SOURCE == CLK_SOURCE_HSI
CLK_ICKR = 1; /* HSIEN */
while ((CLK_ICKR & 2) == 0) /* HSIRDY */
;
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
CLK_ICKR = 8; /* LSIEN */
while ((CLK_ICKR & 16) == 0) /* LSIRDY */
;
#else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */
CLK_ECKR = 1; /* HSEEN */
while ((CLK_ECKR & 2) == 0) /* HSERDY */
;
#endif
#if STM8_CLOCK_SOURCE != CLK_SOURCE_HSI
/* Switching clock (manual switch mode).*/
CLK_SWCR = 0;
CLK_SWR = STM8_CLOCK_SOURCE;
while ((CLK_SWCR & 8) == 0) /* SWIF */
;
CLK_SWCR = 2; /* SWEN */
#endif
/* Setting up clock dividers.*/
CLK_CKDIVR = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0);
/* Clocks initially all disabled.*/
CLK_PCKENR1 = 0;
CLK_PCKENR2 = 0;
/* Other clock related initializations.*/
CLK_CSSR = 0;
CLK_CCOR = 0;
CLK_CANCCR = 0;
#endif /* STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT */
}
/** @} */

142
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@ -0,0 +1,142 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/hal_lld.h
* @brief STM8 HAL subsystem low level driver source.
*
* @addtogroup STM8_HAL
* @{
*/
#ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
#include "stm8.h"
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define LSICLK 128000 /**< Low speed internal clock. */
#define HSICLK 16000000 /**< High speed internal clock. */
#define CLK_SOURCE_DEFAULT 0 /**< No clock initialization. */
#define CLK_SOURCE_HSI 0xE1 /**< HSI clock selector. */
#define CLK_SOURCE_LSI 0xD2 /**< LSI clock selector. */
#define CLK_SOURCE_HSE 0xB4 /**< HSE clock selector. */
#define CLK_HSI_DIV1 0 /**< HSI clock divided by 1. */
#define CLK_HSI_DIV2 1 /**< HSI clock divided by 2. */
#define CLK_HSI_DIV4 2 /**< HSI clock divided by 4. */
#define CLK_HSI_DIV8 3 /**< HSI clock divided by 8. */
#define CLK_CPU_DIV1 0 /**< CPU clock divided by 1. */
#define CLK_CPU_DIV2 1 /**< CPU clock divided by 2. */
#define CLK_CPU_DIV4 2 /**< CPU clock divided by 4. */
#define CLK_CPU_DIV8 3 /**< CPU clock divided by 8. */
#define CLK_CPU_DIV16 4 /**< CPU clock divided by 16. */
#define CLK_CPU_DIV32 5 /**< CPU clock divided by 32. */
#define CLK_CPU_DIV64 6 /**< CPU clock divided by 64. */
#define CLK_CPU_DIV128 7 /**< CPU clock divided by 128. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Clock source setting.
*/
#if !defined(STM8_CLOCK_SOURCE) || defined(__DOXYGEN__)
#define STM8_CLOCK_SOURCE CLK_SOURCE_DEFAULT
#endif
/**
* @brief HSI clock divider.
*/
#if !defined(STM8_HSI_DIVIDER) || defined(__DOXYGEN__)
#define STM8_HSI_DIVIDER CLK_HSI_DIV8
#endif
/**
* @brief CPU clock divider.
*/
#if !defined(STM8_CPU_DIVIDER) || defined(__DOXYGEN__)
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if (STM8_HSI_DIVIDER != CLK_HSI_DIV1) && \
(STM8_HSI_DIVIDER != CLK_HSI_DIV2) && \
(STM8_HSI_DIVIDER != CLK_HSI_DIV4) && \
(STM8_HSI_DIVIDER != CLK_HSI_DIV8)
#error "specified invalid HSI divider"
#endif
#if (STM8_CPU_DIVIDER != CLK_CPU_DIV1) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV2) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV4) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV8) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV16) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV32) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV64) && \
(STM8_CPU_DIVIDER != CLK_CPU_DIV128)
#error "specified invalid CPU divider"
#endif
#if STM8_CLOCK_SOURCE == CLK_SOURCE_DEFAULT
#define SYSCLK (HSICLK / 8)
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSI
#define SYSCLK (HSICLK / (1 << STM8_HSI_DIVIDER))
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
#define SYSCLK LSICLK
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSE
#define SYSCLK HSECLK
#else
#error "specified invalid clock source"
#endif
#define CPUCLK (SYSCLK / (1 << STM8_CPU_DIVIDER))
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void hal_lld_init(void);
#ifdef __cplusplus
}
#endif
#endif /* _HAL_LLD_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/pal_lld.c
* @brief STM8 GPIO low level driver code.
*
* @addtogroup STM8_PAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if CH_HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
#endif /* CH_HAL_USE_PAL */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/pal_lld.h
* @brief STM8 GPIO low level driver header.
*
* @addtogroup STM8_PAL
* @{
*/
#ifndef _PAL_LLD_H_
#define _PAL_LLD_H_
#if CH_HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
/*===========================================================================*/
/* I/O Ports Types and constants. */
/*===========================================================================*/
typedef struct {
volatile uint8_t ODR;
volatile uint8_t IDR;
volatile uint8_t DDR;
volatile uint8_t CR1;
volatile uint8_t CR2;
} gpio_t;
/**
* @brief Generic I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialized the digital I/O
* subsystem. This represents only the initial setup, specific pads
* or whole ports can be reprogrammed at later time.
*/
typedef struct {
gpio_t P[9];
} STM8GPIOConfig;
/**
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 32
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint32_t ioportmask_t;
/**
* @brief Port Identifier.
*/
typedef gpio_t *ioportid_t;
/*===========================================================================*/
/* I/O Ports Identifiers. */
/*===========================================================================*/
/**
* @brief GPIO ports as a whole.
*/
#define IOPORTS ((STM8GPIOConfig *)0x5000)
/**
* @brief GPIO port A identifier.
*/
#define IOPORT1 ((gpio_t *)0x5000)
/**
* @brief GPIO port B identifier.
*/
#define IOPORT2 ((gpio_t *)0x5005)
/**
* @brief GPIO port C identifier.
*/
#define IOPORT3 ((gpio_t *)0x500A)
/**
* @brief GPIO port D identifier.
*/
#define IOPORT4 ((gpio_t *)0x500F)
/**
* @brief GPIO port E identifier.
*/
#define IOPORT5 ((gpio_t *)0x5014)
/**
* @brief GPIO port F identifier.
*/
#define IOPORT6 ((gpio_t *)0x5019)
/**
* @brief GPIO port G identifier.
*/
#define IOPORT7 ((gpio_t *)0x501E)
/**
* @brief GPIO port H identifier.
*/
#define IOPORT8 ((gpio_t *)0x5023)
/**
* @brief GPIO port I identifier.
*/
#define IOPORT9 ((gpio_t *)0x5028)
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*/
#define pal_lld_init(config) *IOPORTS = *(config)
/**
* @brief Reads the physical I/O port states.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The port bits.
*/
#define pal_lld_readport(port) ((port)->IDR)
/**
* @brief Reads the output latch.
* @details The purpose of this function is to read back the latched output
* value.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The latched logical states.
*/
#define pal_lld_readlatch(port) ((port)->ODR)
/**
* @brief Writes a bits mask on a I/O port.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly by the
* application code.
* @note Programming an unknown or unsupported mode is silently ignored.
*
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*/
#define pal_lld_setgroupmode(port, mask, mode) ((void)(mode))
extern const STM8GPIOConfig pal_default_config;
#endif /* CH_HAL_USE_PAL */
#endif /* _PAL_LLD_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM8_DRIVERS STM8 Drivers
* @brief Device drivers included in the STM8 support.
*
* @ingroup STM8
*/
/**
* @defgroup STM8_HAL STM8 HAL Support
* @brief HAL support.
*
* @ingroup STM8_DRIVERS
*/
/**
* @defgroup STM8_PAL STM8 I/O Ports Support
* @brief I/O Ports peripherals support.
* @details This module supports the STM8 GPIO controller. The controller
* supports the following features (see @ref PAL):
* - 8 bits wide ports.
* - Atomic set/reset/toggle functions because special STM8 instruction set.
* - Output latched regardless of the pad setting.
* - Direct read of input pads regardless of the pad setting.
* .
* <h2>Supported Setup Modes</h2>
* - @p PAL_MODE_RESET.
* - @p PAL_MODE_UNCONNECTED.
* - @p PAL_MODE_INPUT.
* - @p PAL_MODE_INPUT_PULLUP.
* - @p PAL_MODE_OUTPUT_PUSHPULL.
* - @p PAL_MODE_OUTPUT_OPENDRAIN.
* .
* Any attempt to setup an invalid mode is ignored.
*
* <h2>Suboptimal Behavior</h2>
* Some STM8 I/O ports features are less than optimal:
* - Bus/group writing is not atomic.
* - Pad/group mode setup is not atomic.
* .
* @ingroup STM8_DRIVERS
*/
/**
* @defgroup STM8_SERIAL STM8 UART Support
* @brief USART support.
* @details The serial driver supports the STM8 USARTs in asynchronous mode.
*
* @ingroup STM8_DRIVERS
*/

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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/serial_lld.c
* @brief STM8 low level serial driver code.
*
* @addtogroup STM8_SERIAL
* @{
*/
#include "ch.h"
#include "hal.h"
/* Because someone somewhere couldn't use the same name for the same thing.*/
#if STM8_PLATFORM == PLATFORM_STM8AF51AA
#define UART1_BRR1 USART_BRR1
#define UART1_BRR2 USART_BRR2
#define UART1_SR USART_SR
#define UART1_DR USART_DR
#define UART1_CR1 USART_CR1
#define UART1_CR2 USART_CR2
#define UART1_CR3 USART_CR3
#define UART1_CR4 USART_CR4
#define UART1_CR5 USART_CR5
#define UART3_BRR1 LINUART_BRR1
#define UART3_BRR2 LINUART_BRR2
#define UART3_SR LINUART_SR
#define UART3_DR LINUART_DR
#define UART3_CR1 LINUART_CR1
#define UART3_CR2 LINUART_CR2
#define UART3_CR3 LINUART_CR3
#define UART3_CR4 LINUART_CR4
#define UART3_CR5 LINUART_CR5
#define UART3_CR6 LINUART_CR6
#endif
#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief UART1 serial driver identifier.
*/
#if USE_STM8_UART1 || defined(__DOXYGEN__)
SerialDriver SD1;
#endif
/**
* @brief UART3 serial driver identifier.
*/
#if USE_STM8_UART3 || defined(__DOXYGEN__)
SerialDriver SD3;
#endif
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/**
* @brief Driver default configuration.
*/
static const SerialConfig default_config = {
BBR(SERIAL_DEFAULT_BITRATE),
SD_MODE_PARITY_NONE | SD_MODE_STOP_1
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void set_error(SerialDriver *sdp, uint8_t sr) {
sdflags_t sts = 0;
if (sr & 0x08) /* OR bit. */
sts |= SD_OVERRUN_ERROR;
if (sr & 0x04) /* NF bit. */
sts |= SD_NOISE_ERROR;
if (sr & 0x02) /* FE bit. */
sts |= SD_FRAMING_ERROR;
if (sr & 0x01) /* PE bit. */
sts |= SD_PARITY_ERROR;
chSysLockFromIsr();
sdAddFlagsI(sdp, sts);
chSysUnlockFromIsr();
}
#if USE_STM8_UART1 || defined(__DOXYGEN__)
static void notify1(void) {
UART1_CR2 |= 0x80; /* TIEN bit. */
}
/**
* @brief UART1 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart1_init(const SerialConfig *config) {
UART1_BRR2 = ((uint8_t)(config->sc_brr >> 8) % (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F);
UART1_BRR1 = (uint8_t)(config->sc_brr >> 4);
UART1_CR1 = config->sc_mode &
SD_MODE_PARITY; /* PIEN included. */
UART1_CR2 = 0x2C; /* RIEN | TEN | REN. */
UART1_CR3 = config->sc_mode & SD_MODE_STOP;
UART1_CR4 = 0;
UART1_CR5 = 0;
UART1_PSCR = 1;
(void)UART1_SR;
(void)UART1_DR;
}
/**
* @brief UART1 de-initialization.
*/
static void uart1_deinit(void) {
UART1_CR1 = 0x20; /* UARTD (low power). */
UART1_CR2 = 0;
UART1_CR3 = 0;
UART1_CR4 = 0;
UART1_CR5 = 0;
UART1_PSCR = 0;
}
#endif /* USE_STM8_UART1 */
#if USE_STM8_UART3 || defined(__DOXYGEN__)
static void notify3(void) {
UART1_CR2 |= 0x80; /* TIEN bit. */
}
/**
* @brief UART3 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart3_init(const SerialConfig *config) {
UART3_BRR2 = ((uint8_t)(config->sc_brr >> 8) % (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F);
UART3_BRR1 = (uint8_t)(config->sc_brr >> 4);
UART3_CR1 = config->sc_mode &
SD_MODE_PARITY; /* PIEN included. */
UART3_CR2 = 0x2C; /* RIEN | TEN | REN. */
UART3_CR3 = config->sc_mode & SD_MODE_STOP;
UART3_CR4 = 0;
UART3_CR6 = 0;
(void)UART3_SR;
(void)UART3_DR;
}
/**
* @brief UART3 de-initialization.
*/
static void uart3_deinit(void) {
UART3_CR1 = 0x20; /* UARTD (low power). */
UART3_CR2 = 0;
UART3_CR3 = 0;
UART3_CR4 = 0;
UART3_CR6 = 0;
}
#endif /* USE_STM8_UART3 */
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if USE_STM8_UART1 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(17) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD1);
chSysUnlockFromIsr();
if (b < Q_OK)
UART1_CR2 &= ~0x80; /* TIEN. */
else
UART1_DR = b;
CH_IRQ_EPILOGUE();
}
CH_IRQ_HANDLER(18) {
uint8_t sr = UART1_SR;
CH_IRQ_PROLOGUE();
if ((sr = UART1_SR) & 0x0F) /* OR | BF | FE | PE. */
set_error(&SD1, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD1, UART1_DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* USE_STM8_UART1 */
#if USE_STM8_UART3 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(20) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD3);
chSysUnlockFromIsr();
if (b < Q_OK)
UART3_CR2 &= ~0x80; /* TIEN. */
else
UART3_DR = b;
CH_IRQ_EPILOGUE();
}
CH_IRQ_HANDLER(21) {
uint8_t sr = UART3_SR;
CH_IRQ_PROLOGUE();
if ((sr = UART3_SR) & 0x0F) /* OR | BF | FE | PE. */
set_error(&SD3, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD3, UART3_DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* USE_STM8_UART3 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level serial driver initialization.
*/
void sd_lld_init(void) {
#if USE_STM8_UART1
sdObjectInit(&SD1, NULL, notify1);
CLK_PCKENR1 |= 4; /* PCKEN12, clock source. */
UART1_CR1 = 0x20; /* UARTD (low power). */
#endif
#if USE_STM8_UART3
sdObjectInit(&SD3, NULL, notify3);
CLK_PCKENR1 |= 8; /* PCKEN13, clock source. */
UART3_CR1 = 0x20; /* UARTD (low power). */
#endif
}
/**
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
*/
void sd_lld_start(SerialDriver *sdp) {
if (sdp->config == NULL)
sdp->config = &default_config;
#if USE_STM8_UART1
if (&SD1 == sdp) {
uart1_init(sdp->config);
return;
}
#endif
#if USE_STM8_UART3
if (&SD3 == sdp) {
uart3_init(sdp->config);
return;
}
#endif
}
/**
* @brief Low level serial driver stop.
* @details De-initializes the USART, stops the associated clock, resets the
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*/
void sd_lld_stop(SerialDriver *sdp) {
#if USE_STM8_UART1
if (&SD1 == sdp) {
uart1_deinit();
return;
}
#endif
#if USE_STM8_UART3
if (&SD3 == sdp) {
uart3_deinit();
return;
}
#endif
}
#endif /* CH_HAL_USE_SERIAL */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8/serial_lld.h
* @brief STM8 low level serial driver header.
*
* @addtogroup STM8_SERIAL
* @{
*/
#ifndef _SERIAL_LLD_H_
#define _SERIAL_LLD_H_
#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define SD_MODE_PARITY 0x07 /**< @brief Parity field mask. */
#define SD_MODE_PARITY_NONE 0x00 /**< @brief No parity. */
#define SD_MODE_PARITY_EVEN 0x05 /**< @brief Even parity. */
#define SD_MODE_PARITY_ODD 0x07 /**< @brief Odd parity. */
#define SD_MODE_STOP 0x30 /**< @brief Stop bits mask. */
#define SD_MODE_STOP_1 0x00 /**< @brief One stop bit. */
#define SD_MODE_STOP_2 0x20 /**< @brief Two stop bits. */
#define SD_MODE_STOP_1P5 0x30 /**< @brief 1.5 stop bits. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief UART1 driver enable switch.
* @details If set to @p TRUE the support for UART1 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_STM8_UART1) || defined(__DOXYGEN__)
#define USE_STM8_UART1 TRUE
#endif
/**
* @brief UART3 driver enable switch.
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_STM8_UART3) || defined(__DOXYGEN__)
#define USE_STM8_UART3 TRUE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Serial Driver condition flags type.
*/
typedef uint8_t sdflags_t;
/**
* @brief Generic Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
* @note This structure content is architecture dependent, each driver
* implementation defines its own version and the custom static
* initializers.
*/
typedef struct {
/**
* @brief Bit rate register.
*/
uint16_t sc_brr;
/**
* @brief Mode flags.
*/
uint8_t sc_mode;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \
/* Driver state.*/ \
sdstate_t state; \
/* Current configuration data.*/ \
const SerialConfig *config; \
/* Input queue.*/ \
InputQueue iqueue; \
/* Output queue.*/ \
OutputQueue oqueue; \
/* Status Change @p EventSource.*/ \
EventSource sevent; \
/* I/O driver status flags.*/ \
sdflags_t flags; \
/* Input circular buffer.*/ \
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
/* Output circular buffer.*/ \
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Macro for baud rate computation.
* @note Make sure the final baud rate is within tolerance.
*/
#define BBR(b) (SYSCLK / (b))
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if USE_STM8_UART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
#if USE_STM8_UART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp);
void sd_lld_stop(SerialDriver *sdp);
#ifdef __cplusplus
}
#endif
#endif /* CH_HAL_USE_SERIAL */
#endif /* _SERIAL_LLD_H_ */
/** @} */

41
os/hal/platforms/STM8/stm8.h Normal file
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@ -0,0 +1,41 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _STM8_H_
#define _STM8_H_
/*
* Supported platforms.
*/
#define PLATFORM_STM8S208RB 1
#define PLATFORM_STM8AF51AA 2
#ifndef STM8_PLATFORM
#error "STM8 platform not defined"
#endif
#if STM8_PLATFORM == PLATFORM_STM8S208RB
#include "STM8/STM8S208RB.h"
#elif STM8_PLATFORM == PLATFORM_STM8AF51AA
#include "STM8/STM8AF51AA.h"
#else
#error "unsupported or invalid STM8 platform"
#endif
#endif /* _STM8_H_ */

3
os/kernel/src/chmsg.c
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@ -77,7 +77,8 @@ msg_t chMsgWait(void) {
chSysLock(); chSysLock();
if (!chMsgIsPendingI(currp)) if (!chMsgIsPendingI(currp))
chSchGoSleepS(THD_STATE_WTMSG); chSchGoSleepS(THD_STATE_WTMSG);
msg = chMsgGetI(currp); /* msg = chMsgGetI(currp);*/
msg = chMsgGetI((volatile Thread *)currp); /* Temporary hack.*/
chSysUnlock(); chSysUnlock();
return msg; return msg;
} }

48
os/ports/RC/STM8/chcore.c Normal file
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@ -0,0 +1,48 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chcore.c
* @brief Port related template code.
* @details This file is a template of the system driver functions provided by
* a port. Some of the following functions may be implemented as
* macros in chcore.h if the implementer decides that there is an
* advantage in doing so, as example because performance concerns.
*
* @addtogroup core
* @{
*/
#include "ch.h"
/**
* @brief Halts the system.
* @details This function is invoked by the operating system when an
* unrecoverable error is detected (as example because a programming
* error in the application code that triggers an assertion while in
* debug mode).
*/
void port_halt(void) {
port_disable();
while (TRUE) {
}
}
/** @} */

267
os/ports/RC/STM8/chcore.h Normal file
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@ -0,0 +1,267 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chcore.h
* @brief Port related template macros and structures.
* @details This file is a template of the system driver macros provided by
* a port.
*
* @addtogroup core
* @{
*/
#ifndef _CHCORE_H_
#define _CHCORE_H_
#include <intrins.h>
/**
* @brief Unique macro for the implemented architecture.
*/
#define CH_ARCHITECTURE_STM8
/**
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "STM8"
/**
* @brief Base type for stack alignment.
* @note No alignment constraints so uint8_t.
*/
typedef uint8_t stkalign_t;
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
* @note The structure requires one dummy field at its start because the
* stack is handled as preincremented/postdecremented.
*/
struct extctx {
uint8_t _next;
uint16_t cx;
uint16_t bx;
uint8_t cc;
uint8_t a;
uint16_t x;
uint16_t y;
uint8_t pce;
uint8_t pch;
uint8_t pcl;
};
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching..
* @note The structure requires one dummy field at its start because the
* stack is handled as preincremented/postdecremented.
*/
struct intctx {
uint8_t _next;
uint16_t pc;
};
/**
* @brief Start context.
* @details This context is the stack organization for the trampoline code
* @p _port_thread_start().
*/
struct startctx {
uint8_t _next;
uint16_t ts; /* Trampoline address. */
uint16_t arg; /* Thread argument. */
uint16_t pc; /* Thread function address. */
uint16_t ret; /* chThdExit() address. */
};
/**
* @brief Platform dependent part of the @p Thread structure.
* @details This structure usually contains just the saved stack pointer
* defined as a pointer to a @p intctx structure.
*/
struct context {
struct intctx *sp;
};
/**
* @brief Platform dependent part of the @p chThdInit() API.
* @details This code usually setup the context switching frame represented
* by an @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
struct startctx *scp; \
scp = (struct startctx *)((uint8_t *)workspace + wsize - \
sizeof(struct startctx)); \
scp->ts = (uint16_t)_port_thread_start; \
scp->arg = (uint16_t)arg; \
scp->pc = (uint16_t)pf; \
scp->ret = (uint16_t)chThdExit; \
tp->p_ctx.sp = (struct intctx *)scp; \
}
/**
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#endif
/**
* @brief Per-thread stack overhead for interrupts servicing.
* @details This constant is used in the calculation of the correct working
* area size.
* This value can be zero on those architecture where there is a
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 32
#endif
/**
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
(n) + (INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_PROLOGUE()
/**
* @brief IRQ epilogue code.
* @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \
chSchDoRescheduleI(); \
}
/**
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
#define PORT_IRQ_HANDLER(id) void irq##id(void) interrupt id
/**
* @brief Port-related initialization code.
* @note None in this port.
*/
#define port_init()
/**
* @brief Kernel-lock action.
* @note Implemented as global interrupts disable.
*/
#define port_lock() _sim_()
/**
* @brief Kernel-unlock action.
* @note Implemented as global interrupts enable.
*/
#define port_unlock() _rim_()
/**
* @brief Kernel-lock action from an interrupt handler.
* @note This function is empty in this port.
*/
#define port_lock_from_isr()
/**
* @brief Kernel-unlock action from an interrupt handler.
* @note This function is empty in this port.
*/
#define port_unlock_from_isr()
/**
* @brief Disables all the interrupt sources.
* @note Implemented as global interrupts disable.
* @note Of course non maskable interrupt sources are not included.
*/
#define port_disable() _sim_()
/**
* @brief Disables the interrupt sources that are not supposed to preempt
* the kernel.
* @note Same as @p port_disable() in this port, there is no difference
* between the two states.
*/
#define port_suspend() _sim_()
/**
* @brief Enables all the interrupt sources.
* @note Implemented as global interrupt enable.
*/
#define port_enable() _rim_()
/**
* @brief Enters an architecture-dependent halt mode.
* @note Implemented with the specific "wfi" instruction.
*/
#define port_wait_for_interrupt() _wfi_()
/**
* @brief Performs a context switch between two threads.
* @details This is the most critical code in any port, this function
* is responsible for the context switch between 2 threads.
* @note Implemented as a call to a low level assembler routine.
*
* @param otp the thread to be switched out
* @param ntp the thread to be switched in
*/
#define port_switch(otp, ntp) _port_switch(otp)
#ifdef __cplusplus
extern "C" {
#endif
void port_halt(void);
void _port_switch(Thread *otp);
void _port_thread_start(void);
#ifdef __cplusplus
}
#endif
#endif /* _CHCORE_H_ */
/** @} */

44
os/ports/RC/STM8/chcoreasm.asm Normal file
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@ -0,0 +1,44 @@
; ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
;
; This file is part of ChibiOS/RT.
;
; ChibiOS/RT is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 3 of the License, or
; (at your option) any later version.
; ChibiOS/RT is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
?PR??_THREAD_START?CHCOREASM SEGMENT CODE
RSEG ?PR??_THREAD_START?CHCOREASM
EXTRN PAGE0(rlist)
; Performs a context switch between two threads.
; In this port swapping the stack pointers is enough, there are
; no registers to be preserved across function calls and the
; program counter is already in the stack.
PUBLIC ?_port_switch
?_port_switch:
LDW Y,SP
LDW (005H,X),Y ; SP saved in otp->p_ctx.sp
; LDW X,(003H,SP) ; ntp
LDW X,rlist + 0DH ; rlist.r_current (currp)
LDW X,(005H,X)
LDW SP,X ; SP restored from currp->p_ctx.sp
RET
PUBLIC ?_port_thread_start
?_port_thread_start:
RIM
POPW X
RET
end

125
os/ports/RC/STM8/chtypes.h Normal file
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@ -0,0 +1,125 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chtypes.h
* @brief System types template.
* @details The types defined in this file may change depending on the target
* architecture. You may also try to optimize the size of the various
* types in order to privilege size or performance, be careful in
* doing so.
*
* @addtogroup types
* @{
*/
#ifndef _CHTYPES_H_
#define _CHTYPES_H_
#define __need_NULL
#define __need_size_t
#include <stddef.h>
//#if !defined(_STDINT_H) && !defined(__STDINT_H_)
//#include <stdint.h>
//#endif
typedef unsigned char uint8_t;
typedef signed char int8_t;
typedef unsigned int uint16_t;
typedef signed int int16_t;
typedef unsigned long uint32_t;
typedef signed long int32_t;
typedef uint8_t uint_fast8_t;
typedef uint16_t uint_fast16_t;
typedef uint32_t uint_fast32_t;
/**
* @brief Boolean, recommended the fastest signed.
*/
typedef int8_t bool_t;
/**
* @brief Thread mode flags, uint8_t is ok.
*/
typedef uint8_t tmode_t;
/**
* @brief Thread state, uint8_t is ok.
*/
typedef uint8_t tstate_t;
/**
* @brief Thread references counter, uint8_t is ok.
*/
typedef uint8_t trefs_t;
/**
* @brief Priority, use the fastest unsigned type.
*/
typedef uint8_t tprio_t;
/**
* @brief Message, use signed pointer equivalent.
*/
typedef int16_t msg_t;
/**
* @brief Event Id, use fastest signed.
*/
typedef int8_t eventid_t;
/**
* @brief Event Mask, recommended fastest unsigned.
*/
typedef uint8_t eventmask_t;
/**
* @brief System Time, recommended fastest unsigned.
*/
typedef uint16_t systime_t;
/**
* @brief Counter, recommended fastest signed.
*/
typedef int16_t cnt_t;
/**
* @brief Inline function modifier.
*/
#define INLINE inline
/**
* @brief Packed structure modifier (within).
*/
#define PACK_STRUCT_STRUCT
/**
* @brief Packed structure modifier (before).
*/
#define PACK_STRUCT_BEGIN
/**
* @brief Packed structure modifier (after).
*/
#define PACK_STRUCT_END
#endif /* _CHTYPES_H_ */
/** @} */

80
os/ports/RC/STM8/port.dox Normal file
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@ -0,0 +1,80 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM8 STM8
* @details STM8 port details. This section how the ChibiOS/RT features are
* implemented on this architecture.
*
* @section STM8_STATES Mapping of the System States in the STM8 port
* The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
* port:
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a
* special hardware state associated.
* - <b>Normal</b>. This is the state the system has after executing
* @p chSysInit(). Interrupts are enabled.
* - <b>Suspended</b>. Interrupts are disabled.
* - <b>Disabled</b>. Interrupts are enabled. This state is equivalent to the
* Suspended state because there are no fast interrupts in this architecture.
* - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
* loop.
* - <b>S-Locked</b>. Interrupts are disabled.
* - <b>I-Locked</b>. This state is equivalent to the SRI state, the
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
* order to formally change state because this may change).
* - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
* - <b>Serving Fast Interrupt</b>. Not present in this architecture.
* - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
* maskable interrupt sources that can be associated to this state.
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
* .
* @section STM8_NOTES The STM8 port notes
* - The STM8 does not have a dedicated interrupt stack, make sure to reserve
* enough stack space for interrupts in each thread stack. This can be done
* by modifying the @p INT_REQUIRED_STACK macro into
* <b>./os/ports/RC/STM8/chcore.h</b>.
* .
* @ingroup ports
*/
/**
* @defgroup STM8_CONF Configuration Options
* @brief STM8 Configuration Options.
* @details The STM8 port allows some architecture-specific configurations
* settings that can be specified externally, as example on the compiler
* command line:
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space
* used by the interrupt handlers.<br>
* The default for this value is @p 32, this space is allocated for each
* thread so be careful in order to not waste precious RAM space.<br>
* The default value is set into <b>./os/ports/RC/STM8/chcore.h</b>.
* .
* @ingroup STM8
*/
/**
* @defgroup MSP430_CORE Core Port Implementation
* @brief MSP430 specific port code, structures and macros.
*
* @ingroup MSP430
* @file MSP430/chtypes.h Port types.
* @file MSP430/chcore.h Port related structures and macros.
* @file MSP430/chcore.c Port related code.
*/

2
readme.txt
View File

@ -58,6 +58,8 @@
in 1.4.2). in 1.4.2).
- FIX: Fixed missing reschedulation in chEvtSignal() (bug 2961208)(backported - FIX: Fixed missing reschedulation in chEvtSignal() (bug 2961208)(backported
in 1.4.2). in 1.4.2).
- NEW: Added STM8 port and demo, the demo targets the Raisonance REva board
with STM8S208RB piggyback.
- NEW: Enhanced the kernel size report to cover more cases. - NEW: Enhanced the kernel size report to cover more cases.
- NEW: Improvements to the documentation. - NEW: Improvements to the documentation.
- OPT: Minor optimizations in the "compact" code path. - OPT: Minor optimizations in the "compact" code path.

3
test/testbmk.c
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@ -110,7 +110,6 @@ static void bmk1_execute(void) {
threads[0] = chThdCreateStatic(wa[0], WA_SIZE, chThdGetPriority()-1, thread1, NULL); threads[0] = chThdCreateStatic(wa[0], WA_SIZE, chThdGetPriority()-1, thread1, NULL);
n = msg_loop_test(threads[0]); n = msg_loop_test(threads[0]);
chThdTerminate(threads[0]);
test_wait_threads(); test_wait_threads();
test_print("--- Score : "); test_print("--- Score : ");
test_printn(n); test_printn(n);
@ -145,7 +144,6 @@ static void bmk2_execute(void) {
threads[0] = chThdCreateStatic(wa[0], WA_SIZE, chThdGetPriority()+1, thread1, NULL); threads[0] = chThdCreateStatic(wa[0], WA_SIZE, chThdGetPriority()+1, thread1, NULL);
n = msg_loop_test(threads[0]); n = msg_loop_test(threads[0]);
chThdTerminate(threads[0]);
test_wait_threads(); test_wait_threads();
test_print("--- Score : "); test_print("--- Score : ");
test_printn(n); test_printn(n);
@ -190,7 +188,6 @@ static void bmk3_execute(void) {
threads[3] = chThdCreateStatic(wa[3], WA_SIZE, chThdGetPriority()-4, thread2, NULL); threads[3] = chThdCreateStatic(wa[3], WA_SIZE, chThdGetPriority()-4, thread2, NULL);
threads[4] = chThdCreateStatic(wa[4], WA_SIZE, chThdGetPriority()-5, thread2, NULL); threads[4] = chThdCreateStatic(wa[4], WA_SIZE, chThdGetPriority()-5, thread2, NULL);
n = msg_loop_test(threads[0]); n = msg_loop_test(threads[0]);
chThdTerminate(threads[0]);
test_wait_threads(); test_wait_threads();
test_print("--- Score : "); test_print("--- Score : ");
test_printn(n); test_printn(n);