From b536b109923b260cf6fc3b4c03cf65e4b4c5c795 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 13 Jun 2015 09:01:31 +0000
Subject: [PATCH] Fixed bug #603.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8022 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/ports/STM32/STM32F3xx/hal_lld.h | 22 +++++++++++-----------
 readme.txt                             |  1 +
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/os/hal/ports/STM32/STM32F3xx/hal_lld.h b/os/hal/ports/STM32/STM32F3xx/hal_lld.h
index 9cd53c61f..3b9db8474 100644
--- a/os/hal/ports/STM32/STM32F3xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F3xx/hal_lld.h
@@ -905,7 +905,7 @@
 /**
  * @brief   ADC34 frequency.
  */
-#if (STM32_ADC43PRES == STM32_ADC34PRES_NOCLOCK) || defined(__DOXYGEN__)
+#if (STM32_ADC34PRES == STM32_ADC34PRES_NOCLOCK) || defined(__DOXYGEN__)
 #define STM32_ADC34CLK              0
 #elif STM32_ADC34PRES == STM32_ADC34PRES_DIV1
 #define STM32_ADC34CLK              (STM32_PLLCLKOUT / 1)
@@ -974,9 +974,9 @@
 #define STM32_USART1CLK             STM32_PCLK2
 #elif STM32_USART1SW == STM32_USART1SW_SYSCLK
 #define STM32_USART1CLK             STM32_SYSCLK
-#elif STM32_USART1SW == STM32_USART1SW_LSECLK
+#elif STM32_USART1SW == STM32_USART1SW_LSE
 #define STM32_USART1CLK             STM32_LSECLK
-#elif STM32_USART1SW == STM32_USART1SW_HSICLK
+#elif STM32_USART1SW == STM32_USART1SW_HSI
 #define STM32_USART1CLK             STM32_HSICLK
 #else
 #error "invalid source selected for USART1 clock"
@@ -989,9 +989,9 @@
 #define STM32_USART2CLK             STM32_PCLK1
 #elif STM32_USART2SW == STM32_USART2SW_SYSCLK
 #define STM32_USART2CLK             STM32_SYSCLK
-#elif STM32_USART2SW == STM32_USART2SW_LSECLK
+#elif STM32_USART2SW == STM32_USART2SW_LSE
 #define STM32_USART2CLK             STM32_LSECLK
-#elif STM32_USART2SW == STM32_USART2SW_HSICLK
+#elif STM32_USART2SW == STM32_USART2SW_HSI
 #define STM32_USART2CLK             STM32_HSICLK
 #else
 #error "invalid source selected for USART2 clock"
@@ -1004,9 +1004,9 @@
 #define STM32_USART3CLK             STM32_PCLK1
 #elif STM32_USART3SW == STM32_USART3SW_SYSCLK
 #define STM32_USART3CLK             STM32_SYSCLK
-#elif STM32_USART3SW == STM32_USART3SW_LSECLK
+#elif STM32_USART3SW == STM32_USART3SW_LSE
 #define STM32_USART3CLK             STM32_LSECLK
-#elif STM32_USART3SW == STM32_USART3SW_HSICLK
+#elif STM32_USART3SW == STM32_USART3SW_HSI
 #define STM32_USART3CLK             STM32_HSICLK
 #else
 #error "invalid source selected for USART3 clock"
@@ -1019,9 +1019,9 @@
 #define STM32_UART4CLK             STM32_PCLK1
 #elif STM32_UART4SW == STM32_UART4SW_SYSCLK
 #define STM32_UART4CLK             STM32_SYSCLK
-#elif STM32_UART4SW == STM32_UART4SW_LSECLK
+#elif STM32_UART4SW == STM32_UART4SW_LSE
 #define STM32_UART4CLK             STM32_LSECLK
-#elif STM32_UART4SW == STM32_UART4SW_HSICLK
+#elif STM32_UART4SW == STM32_UART4SW_HSI
 #define STM32_UART4CLK             STM32_HSICLK
 #else
 #error "invalid source selected for UART4 clock"
@@ -1034,9 +1034,9 @@
 #define STM32_UART5CLK             STM32_PCLK1
 #elif STM32_UART5SW == STM32_UART5SW_SYSCLK
 #define STM32_UART5CLK             STM32_SYSCLK
-#elif STM32_UART5SW == STM32_UART5SW_LSECLK
+#elif STM32_UART5SW == STM32_UART5SW_LSE
 #define STM32_UART5CLK             STM32_LSECLK
-#elif STM32_UART5SW == STM32_UART5SW_HSICLK
+#elif STM32_UART5SW == STM32_UART5SW_HSI
 #define STM32_UART5CLK             STM32_HSICLK
 #else
 #error "invalid source selected for UART5 clock"
diff --git a/readme.txt b/readme.txt
index ef9036998..63070ec9b 100644
--- a/readme.txt
+++ b/readme.txt
@@ -77,6 +77,7 @@
 - NIL: Added INTC priorities check to the e200z port.
 - RT:  Added INTC priorities check to the e200z port.
 - HAL: Added support for extra DMA channels in STM32F072 devices.
+- HAL: Fixed wrong macro names in STM32F3xx HAL driver (bug #603).
 - HAL: Fixed errors in STM32 OTGv1 driver (bug #601).
 - DEM: Fixed missing paths in e200z demos (bug #600).
 - HAL: Fixed error in platform_f105_f107.mk file (bug #599).