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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2971 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2011-05-18 09:03:50 +00:00
parent ade5cc3c6f
commit b4aa14e88c
60 changed files with 75 additions and 928 deletions
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20
demos/ARM7-AT91SAM7S-FATFS-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-AT91SAM7S-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-AT91SAM7X-FATFS-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-AT91SAM7X-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-AT91SAM7X-LWIP-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-LPC214x-FATFS-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-LPC214x-G++/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARM7-LPC214x-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM0-LPC1114-LPCXPRESSO/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-LPC1343-LPCXPRESSO/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F100-DISCOVERY/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F103-G++/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F103/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F103ZG/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/ARMCM3-STM32F107/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/AVR-AT90CANx-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/AVR-ATmega128-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/MSP430-MSP430x1611-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/PPC-SPC563-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/Posix-GCC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/STM8S-STM8S105-DISCOVERY-STVD/demo/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/STM8S-STM8S208-RC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
demos/Win32-MinGW/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

6
os/kernel/include/chschd.h
View File

@ -84,10 +84,8 @@ typedef struct {
#if CH_TIME_QUANTUM > 0
cnt_t r_preempt; /**< @brief Round robin counter. */
#endif
#ifndef CH_CURRP_REGISTER_CACHE
Thread *r_current; /**< @brief The currently running
thread. */
#endif
} ReadyList;
#endif /* !defined(PORT_OPTIMIZED_READYLIST_STRUCT) */
@ -103,11 +101,7 @@ extern ReadyList rlist;
* (currp = something), use @p setcurrp() instead.
*/
#if !defined(PORT_OPTIMIZED_CURRP) || defined(__DOXYGEN__)
#if !defined(CH_CURRP_REGISTER_CACHE) || defined(__DOXYGEN__)
#define currp rlist.r_current
#else /* defined(CH_CURRP_REGISTER_CACHE) */
register Thread *currp asm(CH_CURRP_REGISTER_CACHE);
#endif /* defined(CH_CURRP_REGISTER_CACHE) */
#endif /* !defined(PORT_OPTIMIZED_CURRP) */
/**

2
os/kernel/src/chsys.c
View File

@ -38,7 +38,7 @@
#if !CH_NO_IDLE_THREAD || defined(__DOXYGEN__)
/**
* @brief Idle thread working area.
* @see IDLE_THREAD_STACK_SIZE
* @see PORT_IDLE_THREAD_STACK_SIZE
*/
WORKING_AREA(_idle_thread_wa, PORT_IDLE_THREAD_STACK_SIZE);

20
os/kernel/templates/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

8
os/kernel/templates/chcore.h
View File

@ -47,10 +47,10 @@
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@ -62,7 +62,7 @@
* @p extctx is known to be zero.
*/
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 0
#define PORT_INT_REQUIRED_STACK 0
#endif
/*===========================================================================*/
@ -151,7 +151,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

14
os/ports/GCC/ARM/chcore.h
View File

@ -155,9 +155,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@ -192,12 +190,12 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 4 because the idle thread does have
* a stack frame when compiling without optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 4
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 4
#endif
/**
@ -210,8 +208,8 @@ struct context {
* @note In this port 0x10 is a safe value, it can be reduced after careful
* analysis of the generated code.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 0x10
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 0x10
#endif
/**
@ -225,7 +223,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

15
os/ports/GCC/ARMCMx/old/chcore_v7m.c
View File

@ -54,7 +54,6 @@ void SysTickVector(void) {
chSysUnlockFromIsr();
}
#if !defined(CH_CURRP_REGISTER_CACHE)
#define PUSH_CONTEXT(sp, prio) { \
asm volatile ("mrs %0, PSP \n\t" \
"stmdb %0!, {r3-r11,lr}" : \
@ -67,20 +66,6 @@ void SysTickVector(void) {
"msr BASEPRI, r3 \n\t" \
"bx lr" : "=r" (sp) : "r" (sp)); \
}
#else /* defined(CH_CURRP_REGISTER_CACHE) */
#define PUSH_CONTEXT(sp, prio) { \
asm volatile ("mrs %0, PSP \n\t" \
"stmdb %0!, {r3-r6,r8-r11, lr}" : \
"=r" (sp) : "r" (sp), "r" (prio)); \
}
#define POP_CONTEXT(sp) { \
asm volatile ("ldmia %0!, {r3-r6,r8-r11, lr} \n\t" \
"msr PSP, %0 \n\t" \
"msr BASEPRI, r3 \n\t" \
"bx lr" : "=r" (sp) : "r" (sp)); \
}
#endif /* defined(CH_CURRP_REGISTER_CACHE) */
/**
* @brief SVC vector.

10
os/ports/GCC/ARMCMx/old/chcore_v7m.h
View File

@ -96,12 +96,12 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 4 because the idle thread does have
* a stack frame when compiling without optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 4
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 4
#endif
/**
@ -113,8 +113,8 @@ struct intctx {
* @p extctx is known to be zero.
* @note This port requires no extra stack space for interrupt handling.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 0
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 0
#endif
/**

4
os/ports/GCC/AVR/chcore.c
View File

@ -51,10 +51,8 @@ void port_switch(Thread *ntp, Thread *otp) {
asm volatile ("push r5");
asm volatile ("push r6");
asm volatile ("push r7");
#ifndef CH_CURRP_REGISTER_CACHE
asm volatile ("push r8");
asm volatile ("push r9");
#endif
asm volatile ("push r10");
asm volatile ("push r11");
asm volatile ("push r12");
@ -88,10 +86,8 @@ void port_switch(Thread *ntp, Thread *otp) {
asm volatile ("pop r12");
asm volatile ("pop r11");
asm volatile ("pop r10");
#ifndef CH_CURRP_REGISTER_CACHE
asm volatile ("pop r9");
asm volatile ("pop r8");
#endif
asm volatile ("pop r7");
asm volatile ("pop r6");
asm volatile ("pop r5");

14
os/ports/GCC/AVR/chcore.h
View File

@ -105,10 +105,8 @@ struct intctx {
uint8_t r12;
uint8_t r11;
uint8_t r10;
#ifndef CH_CURRP_REGISTER_CACHE
uint8_t r9;
uint8_t r8;
#endif
uint8_t r7;
uint8_t r6;
uint8_t r5;
@ -149,11 +147,11 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 8
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 8
#endif
/**
@ -165,8 +163,8 @@ struct context {
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 32
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@ -180,7 +178,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

12
os/ports/GCC/MSP430/chcore.h
View File

@ -122,10 +122,10 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@ -137,8 +137,8 @@ struct context {
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 32
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@ -152,7 +152,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

12
os/ports/GCC/PPC/chcore.h
View File

@ -185,10 +185,10 @@ struct context {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@ -199,8 +199,8 @@ struct context {
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 128
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 128
#endif
/**
@ -214,7 +214,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

10
os/ports/GCC/SIMIA32/chcore.h
View File

@ -108,8 +108,8 @@ struct context {
/**
* Stack size for the system idle thread.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 256
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 256
#endif
/**
@ -118,8 +118,8 @@ struct context {
* It requires stack space because the simulated "interrupt handlers" can
* invoke host library functions inside so it better have a lot of space.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 16384
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 16384
#endif
/**
@ -134,7 +134,7 @@ struct context {
sizeof(void *) * 4 + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* Macro used to allocate a thread working area aligned as both position and

2
os/ports/IAR/ARMCMx/chcore.h
View File

@ -302,7 +302,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

10
os/ports/IAR/ARMCMx/chcore_v6m.h
View File

@ -76,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 16
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -96,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 16
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 16
#endif
/**

14
os/ports/IAR/ARMCMx/chcore_v7m.h
View File

@ -49,9 +49,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@ -78,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 16 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 8
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -98,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 16
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 16
#endif
/**

12
os/ports/RC/STM8/chcore.h
View File

@ -147,10 +147,10 @@ struct stm8_startctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@ -158,8 +158,8 @@ struct stm8_startctx {
* @details This is a safe value, you may trim it down after reading the
* right size in the map file.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 48
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 48
#endif
/**
@ -173,7 +173,7 @@ struct stm8_startctx {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

2
os/ports/RVCT/ARMCMx/chcore.h
View File

@ -305,7 +305,7 @@ struct context {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

10
os/ports/RVCT/ARMCMx/chcore_v6m.h
View File

@ -76,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 16
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -96,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 16
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 16
#endif
/**

14
os/ports/RVCT/ARMCMx/chcore_v7m.h
View File

@ -49,9 +49,7 @@ struct intctx {
regarm_t r4;
regarm_t r5;
regarm_t r6;
#ifndef CH_CURRP_REGISTER_CACHE
regarm_t r7;
#endif
regarm_t r8;
regarm_t r9;
regarm_t r10;
@ -78,13 +76,13 @@ struct intctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* @note In this port it is set to 8 because the idle thread does have
* by @p PORT_INT_REQUIRED_STACK.
* @note In this port it is set to 16 because the idle thread does have
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 8
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -98,8 +96,8 @@ struct intctx {
* @p chSchDoRescheduleI() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 16
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 16
#endif
/**

12
os/ports/cosmic/STM8/chcore.h
View File

@ -145,10 +145,10 @@ struct stm8_startctx {
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
* by @p PORT_INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#ifndef PORT_IDLE_THREAD_STACK_SIZE
#define PORT_IDLE_THREAD_STACK_SIZE 0
#endif
/**
@ -156,8 +156,8 @@ struct stm8_startctx {
* @details This is a safe value, you may trim it down after reading the
* right size in the map file.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 48
#ifndef PORT_INT_REQUIRED_STACK
#define PORT_INT_REQUIRED_STACK 48
#endif
/**
@ -171,7 +171,7 @@ struct stm8_startctx {
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
(n) + (INT_REQUIRED_STACK))
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.

20
test/coverage/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/LPC11xx/IRQ_STORM/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/LPC13xx/IRQ_STORM/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/ADC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/CAN/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/GPT/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/IRQ_STORM/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/PWM-ICU/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/SDIO/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/SPI/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/UART/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/USB_CDC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM32/USB_MSC/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED TRUE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/

20
testhal/STM8S/SPI/demo/chconf.h
View File

@ -123,26 +123,6 @@
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/