diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c
index 8cfad815c..585b657b4 100644
--- a/os/hal/platforms/STM32F2xx/hal_lld.c
+++ b/os/hal/platforms/STM32F2xx/hal_lld.c
@@ -187,7 +187,7 @@ void stm32_clock_init(void) {
 
 #if STM32_ACTIVATE_PLLI2S
   /* PLLI2S activation.*/
-  RCC->PLLI2SCFGR = STM32_PLLI2SR_VALUE | STM32_PLLI2SN_VALUE;
+  RCC->PLLI2SCFGR = STM32_PLLI2SR | STM32_PLLI2SN;
   RCC->CR |= RCC_CR_PLLI2SON;
   while (!(RCC->CR & RCC_CR_PLLI2SRDY))
     ;                           /* Waits until PLLI2S is stable.            */
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index 8982da7b9..61bceab37 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -189,7 +189,7 @@ void stm32_clock_init(void) {
 
 #if STM32_ACTIVATE_PLLI2S
   /* PLLI2S activation.*/
-  RCC->PLLI2SCFGR = STM32_PLLI2SR_VALUE | STM32_PLLI2SN_VALUE;
+  RCC->PLLI2SCFGR = STM32_PLLI2SR | STM32_PLLI2SN;
   RCC->CR |= RCC_CR_PLLI2SON;
   while (!(RCC->CR & RCC_CR_PLLI2SRDY))
     ;                           /* Waits until PLLI2S is stable.            */
diff --git a/readme.txt b/readme.txt
index ed1bbfd88..7b9b37cd7 100644
--- a/readme.txt
+++ b/readme.txt
@@ -107,6 +107,8 @@
   3508758)(backported to 2.4.1).
 - FIX: Fixed chMBFetchI does not decrement mb_fullsem (bug 3504450)(backported
   to 2.2.9 and 2.4.1).
+- FIX: Fixed STM32 PLLI2S initialization error (bug 3503490)(backported
+  to 2.4.1).
 - FIX: Fixed USART3 not working on STM32F2/F4 UART driver (bug 3496981)
   (backported to 2.4.1).
 - FIX: Fixed stack misalignment on Posix-MacOSX (bug 3495487)(backported