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Fixed bug 3475188 and other minor problems. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3829 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2012-01-20 11:18:01 +00:00
parent 45efc9bae6
commit ae601b1e4e
7 changed files with 3 additions and 7 deletions
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2
os/hal/platforms/STM32F1xx/hal_lld.c
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@ -52,7 +52,7 @@ static void hal_lld_backup_domain_init(void) {
PWR->CR |= PWR_CR_DBP; PWR->CR |= PWR_CR_DBP;
/* Reset BKP domain if different clock source selected.*/ /* Reset BKP domain if different clock source selected.*/
if ((RCC->BDCR & STM32_RTCSEL_MSK) != STM32_RTCSEL){ if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL){
/* Backup domain reset.*/ /* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST; RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = 0; RCC->BDCR = 0;

1
os/hal/platforms/STM32F1xx/stm32_dma.c
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@ -446,7 +446,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
/* Putting the stream in a safe state.*/ /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp); dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE; dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
/* Enables the associated IRQ vector if a callback is defined.*/ /* Enables the associated IRQ vector if a callback is defined.*/

2
os/hal/platforms/STM32F1xx/stm32_dma.h
View File

@ -310,7 +310,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
* @special * @special
*/ */
#define dmaStreamDisable(dmastp) { \ #define dmaStreamDisable(dmastp) { \
(dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \
dmaStreamClearInterrupt(dmastp); \ dmaStreamClearInterrupt(dmastp); \
} }

1
os/hal/platforms/STM32F2xx/stm32_dma.c
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@ -483,7 +483,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
/* Putting the stream in a safe state.*/ /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp); dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE; dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE;
dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE; dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE;

1
os/hal/platforms/STM32F4xx/stm32_dma.c
View File

@ -483,7 +483,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
/* Putting the stream in a safe state.*/ /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp); dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE; dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE;
dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE; dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE;

1
os/hal/platforms/STM32L1xx/stm32_dma.c
View File

@ -302,7 +302,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
/* Putting the stream in a safe state.*/ /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp); dmaStreamDisable(dmastp);
dmaStreamClearInterrupt(dmastp);
dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE; dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
/* Enables the associated IRQ vector if a callback is defined.*/ /* Enables the associated IRQ vector if a callback is defined.*/

2
os/hal/platforms/STM32L1xx/stm32_dma.h
View File

@ -301,7 +301,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
* @special * @special
*/ */
#define dmaStreamDisable(dmastp) { \ #define dmaStreamDisable(dmastp) { \
(dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \
dmaStreamClearInterrupt(dmastp); \ dmaStreamClearInterrupt(dmastp); \
} }