git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2970 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2011-05-17 17:17:16 +00:00
parent 228f5ba575
commit ade5cc3c6f
2 changed files with 6 additions and 5 deletions

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@ -520,8 +520,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/ /*===========================================================================*/
/*#define CORTEX_SIMPLIFIED_PRIORITY TRUE*/
#endif /* _CHCONF_H_ */ #endif /* _CHCONF_H_ */
/** @} */ /** @} */

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@ -75,10 +75,13 @@
(backported to 2.2.4). (backported to 2.2.4).
- NEW: Reorganization of the Cortex-Mx ports in order to reduced code and - NEW: Reorganization of the Cortex-Mx ports in order to reduced code and
comments duplication in the various headers. comments duplication in the various headers.
- NEW: Improved the ARMv7-M port now there are two modes: Compact and Advanced. - NEW: Improved the ARMv7-M sub-port now there are two modes: Compact and
Advanced.
The advanced mode is equivalent to the previous versions, the compact mode The advanced mode is equivalent to the previous versions, the compact mode
is new and makes the kernel *much* smaller and faster but does not support is new and makes the kernel *much* smaller and generally faster but does
fast interrupts, see reports. not support fast interrupts, see the reports for details.
- NEW: Now the port layer exports info regarding the compiler and the port
options. The info are printed into the test reports.
- CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK - CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK
to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency. to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency.
- CHANGE: Removed the "old" Cortex-M3 port from the code, the current port - CHANGE: Removed the "old" Cortex-M3 port from the code, the current port