git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2292 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/platforms/AT91SAM7/hal_lld.c

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/hal_lld.c
  * @brief   AT91SAM7 HAL subsystem low level driver source.
  *
- * @addtogroup AT91SAM7_HAL
+ * @addtogroup HAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/hal_lld.h

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/hal_lld.h
  * @brief   AT91SAM7 HAL subsystem low level driver header.
  *
- * @addtogroup AT91SAM7_HAL
+ * @addtogroup HAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/mac_lld.c

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/mac_lld.c
  * @brief   AT91SAM7 low level MAC driver code.
  *
- * @addtogroup AT91SAM7_MAC
+ * @addtogroup MAC
  * @{
  */
 

os/hal/platforms/AT91SAM7/mac_lld.h

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/mac_lld.h
  * @brief   AT91SAM7 low level MAC driver header.
  *
- * @addtogroup AT91SAM7_MAC
+ * @addtogroup MAC
  * @{
  */
 

os/hal/platforms/AT91SAM7/pal_lld.c

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/pal_lld.c
  * @brief   AT91SAM7 PIO low level driver code.
  *
- * @addtogroup AT91SAM7_PAL
+ * @addtogroup PAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/pal_lld.h

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/pal_lld.h
  * @brief   AT91SAM7 PIO low level driver header.
  *
- * @addtogroup AT91SAM7_PAL
+ * @addtogroup PAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/platform.dox

@@ -20,34 +20,66 @@
 /**
  * @defgroup AT91SAM7 AT91SAM7 Drivers
  * @brief AT91SAM7 specific support.
- * @details The AT91SAM7 support includes:
+ *
- * - Buffered, interrupt driven, serial driver.
- * - EMAC driver with MII support.
- * - A demo supporting the kernel test suite.
- * - A Web server demo using the uIP TCP/IP stack.
- * - A Web server demo using the lwIP TCP/IP stack.
- * .
  * @ingroup platforms
  */
 
 /**
  * @defgroup AT91SAM7_HAL AT91SAM7 HAL Support
  * @brief HAL support.
+ * @details The AT91SAM7 HAL support is responsible for system initialization.
+ *
+ * @section at91sam7_hal_1 Supported HW resources
+ * - MC.
+ * - PMC.
+ * .
+ * @section at91sam7_hal_2 STM32 HAL driver implementation features
+ * - PLLs startup and stabilization.
+ * - Clock source selection.
+ * - Flash wait states.
+ * .
+* @ingroup AT91SAM7
+ */
+
+/**
+ * @defgroup AT91SAM7_MAC AT91SAM7 EMAC Support
+ * @brief EMAC+PHY peripheral support.
+ * @details This driver supports the AT91SAM7 EMAC peripheral.
+ *
+ * @section at91sam7_mac_1 Supported HW resources
+ * - EMAC.
+ * .
+ * @ingroup AT91SAM7
+ */
+
+/**
+ * @defgroup AT91SAM7_MII AT91SAM7 MII Support
+ * @brief PHY peripheral support.
+ * @details This driver supports the AT91SAM7 EMAC peripheral communicating
+ *          with an external PHY transceiver. The driver currently supports
+ *          the Micrel KS8721 PHY and the Davicom DV9161 modules.
  *
  * @ingroup AT91SAM7
  */
 
 /**
- * @defgroup AT91SAM7_PAL AT91SAM7 I/O Ports Support
+ * @defgroup AT91SAM7_PAL AT91SAM7 PIO Support
  * @brief I/O Ports peripherals support.
- * @details This module supports the AT91SAM7 PIO controller. The controller
+ *
- * supports the following features (see @ref PAL):
+ * @section at91sam7_pal_1 Supported HW resources
+ * - PIOA.
+ * - PIOB.
+ * .
+ * @section at91sam7_pal_2 AT91SAM7 PAL driver implementation features
+ * The PAL driver implementation fully supports the following hardware
+ * capabilities:
  * - 32 bits wide ports.
  * - Atomic set/reset functions.
  * - Output latched regardless of the pad setting.
  * - Direct read of input pads regardless of the pad setting.
  * .
- * <h2>Supported Setup Modes</h2>
+ * @section at91sam7_pal_3 Supported PAL setup modes
+ * The AT91SAM7 PAL driver supports the following I/O modes:
  * - @p PAL_MODE_RESET.
  * - @p PAL_MODE_UNCONNECTED.
  * - @p PAL_MODE_INPUT.
@@ -58,8 +90,9 @@
  * .
  * Any attempt to setup an invalid mode is ignored.
  *
- * <h2>Suboptimal Behavior</h2>
+ * @section at91sam7_pal_4 Suboptimal behavior
- * Some PIO features are less than optimal:
+ * The STM32 PIO is less than optimal in several areas, the limitations should
+ * be taken in account while using the PAL driver:
  * - Pad/port toggling operations are not atomic.
  * - Pad/group mode setup is not atomic.
  * .
@@ -67,36 +100,42 @@
  */
 
 /**
- * @defgroup AT91SAM7_SERIAL AT91SAM7 USART Support
+ * @defgroup AT91SAM7_SPI AT91SAM7 SPI Support
+ * @brief SPI peripheral support.
+ * @details The SPI driver supports the AT91SAM7 SPIs using DMA channels for
+ *          improved performance.
+ *
+ * @section at91sam7_spi_1 Supported HW resources
+ * - SPI1.
+ * - SPI2.
+ * .
+ * @section at91sam7_spi_2 AT91SAM7 SPI driver implementation features
+ * - Clock stop for reduced power usage when the driver is in stop state.
+ * - Each SPI can be independently enabled and programmed. Unused
+ *   peripherals are left in low power mode.
+ * - Programmable interrupt priority levels for each SPI.
+ * - DMA is used for receiving and transmitting.
+ * .
+ * @ingroup AT91SAM7
+ */
+
+/**
+ * @defgroup AT91SAM7_SERIAL AT91SAM7 USART Support (buffered)
  * @brief USART peripherals support.
  * @details The serial driver supports the AT91SAM7 USART peripherals.
  *
- * @ingroup AT91SAM7
+ * @section at91sam7_serial_1 Supported HW resources
- */
+ * The serial driver can support any of the following hardware resources:
-
+ * - USART1.
-/**
+ * - USART2.
- * @defgroup AT91SAM7_SPI AT91SAM7 SPI Support
+ * - DBGU.
- * @brief SPI peripheral support.
+ * .
- * @details The SPI driver supports the AT91SAM7 SPI, the driver works in
+ * @section at91sam7_serial_2 AT91SAM7 Serial driver implementation features
- * polling mode.
+ * - Clock stop for reduced power usage when the driver is in stop state.
- *
+ * - Each USART can be independently enabled and programmed. Unused
- * @ingroup AT91SAM7
+ *   peripherals are left in low power mode.
- */
+ * - Fully interrupt driven.
-
+ * - Programmable priority levels for each USART.
-/**
+ * .
- * @defgroup AT91SAM7_MAC AT91SAM7 EMAC Support
- * @brief EMAC peripheral support.
- * @details the @ref MAC supports the AT91SAM7 EMAC peripheral.
- *
- * @ingroup AT91SAM7
- */
-
-/**
- * @defgroup AT91SAM7_MII AT91SAM7 MII Support
- * @brief EMAC+PHY peripheral support.
- * @details This driver supports the AT91SAM7 EMAC peripheral communicating
- *          with an external PHY transceiver. The driver currently supports
- *          the Micrel KS8721 PHY and the Davicom DV9161 modules.
- *
  * @ingroup AT91SAM7
  */

os/hal/platforms/AT91SAM7/serial_lld.c

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/serial_lld.c
  * @brief   AT91SAM7 low level serial driver code.
  *
- * @addtogroup AT91SAM7_SERIAL
+ * @addtogroup SERIAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/serial_lld.h

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/serial_lld.h
  * @brief   AT91SAM7 low level serial driver header.
  *
- * @addtogroup AT91SAM7_SERIAL
+ * @addtogroup SERIAL
  * @{
  */
 

os/hal/platforms/AT91SAM7/spi_lld.c

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/spi_lld.c
  * @brief   AT91SAM7 low level SPI driver code.
  *
- * @addtogroup AT91SAM7_SPI
+ * @addtogroup SPI
  * @{
  */
 

os/hal/platforms/AT91SAM7/spi_lld.h

@@ -21,7 +21,7 @@
  * @file    AT91SAM7/spi_lld.h
  * @brief   AT91SAM7 low level SPI driver header.
  *
- * @addtogroup AT91SAM7_SPI
+ * @addtogroup SPI
  * @{
  */
 

os/hal/platforms/STM32/platform.dox

@@ -24,6 +24,30 @@
  * @ingroup platforms
  */
 
+/**
+ * @defgroup STM32_HAL STM32 HAL Support
+ * @brief HAL support.
+ * @details The STM32 HAL support is responsible for system initialization.
+ *
+ * @section stm32_hal_1 Supported HW resources
+ * - PLL1.
+ * - PLL2 (where present).
+ * - RCC.
+ * - Flash.
+ * - DMA1.
+ * - DMA2 (where present).
+ * .
+ * @section stm32_hal_2 STM32 HAL driver implementation features
+ * - PLLs startup and stabilization.
+ * - Clock tree initialization.
+ * - Clock source selection.
+ * - Flash wait states initialization based on the selected clock options.
+ * - SYSTICK initialization based on current clock and kernel required rate.
+ * - DMA support initialization.
+ * .
+ * @ingroup STM32
+ */
+
 /**
  * @defgroup STM32_ADC STM32 ADC Support
  * @brief ADC peripheral support.
@@ -59,30 +83,6 @@
  * @ingroup STM32
  */
 
-/**
- * @defgroup STM32_HAL STM32 Clock Support
- * @brief Clock support.
- * @details The STM32 Clock support is responsible for system initialization.
- *
- * @section stm32_hal_1 Supported HW resources
- * - PLL1.
- * - PLL2 (where present).
- * - RCC.
- * - Flash.
- * - DMA1.
- * - DMA2 (where present).
- * .
- * @section stm32_hal_2 STM32 HAL driver implementation features
- * - PLLs startup and stabilization.
- * - Clock tree initialization.
- * - Clock source selection.
- * - Flash wait states initialization based on the selected clock options.
- * - SYSTICK initialization based on current clock and kernel required rate.
- * - DMA support initialization.
- * .
- * @ingroup STM32
- */
-
 /**
  * @defgroup STM32_DMA STM32 DMA Support
  * @brief DMA helper driver.
@@ -139,7 +139,7 @@
  * Any attempt to setup an invalid mode is ignored.
  *
  * @section stm32_pal_4 Suboptimal behavior
- * The GPIO is less than optimal in several areas, the limitations should
+ * The STM32 GPIO is less than optimal in several areas, the limitations should
  * be taken in account while using the PAL driver:
  * - Pad/port toggling operations are not atomic.
  * - Pad/group mode setup is not atomic.