git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4885 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
b674238b33
commit
a98fcfb82b
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@ -124,6 +124,13 @@ void hal_lld_init(void) {
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#if STM32_PVD_ENABLE
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#if STM32_PVD_ENABLE
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PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
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PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
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#endif /* STM32_PVD_ENABLE */
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#endif /* STM32_PVD_ENABLE */
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/* SYSCFG clock enabled here because it is a multi-functional unit shared
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among multiple drivers.*/
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rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
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/* USB IRQ relocated to not conflict with CAN.*/
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SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
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}
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}
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/**
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/**
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@ -192,14 +199,6 @@ void stm32_clock_init(void) {
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while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
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while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
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; /* Waits selection complete. */
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; /* Waits selection complete. */
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#endif
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#endif
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/* SYSCFG clock enabled here because it is a multi-functional unit shared
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among multiple drivers.*/
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rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
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/* USB IRQ relocated to not conflict with CAN.*/
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SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
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#endif /* !STM32_NO_INIT */
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#endif /* !STM32_NO_INIT */
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}
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}
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