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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6259 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-09-04 10:26:42 +00:00
parent 66d1c88211
commit a923a46007
11 changed files with 732 additions and 106 deletions
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6
demos/nil/NIL-STM32F051-DISCOVERY/Makefile
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@ -59,9 +59,9 @@ PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../..
#include $(CHIBIOS)/os/hal/hal.mk
#include $(CHIBIOS)/os/hal/boards/ST_STM32F0_DISCOVERY/board.mk
#include $(CHIBIOS)/os/hal/ports/STM32F0xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/boards/ST_STM32F0_DISCOVERY/board.mk
include $(CHIBIOS)/os/hal/ports/STM32F0xx/platform.mk
include $(CHIBIOS)/os/nil/nil.mk
include $(CHIBIOS)/os/nil/osal/osal.mk
include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_stm32f0xx.mk

305
demos/nil/NIL-STM32F051-DISCOVERY/halconf.h Normal file
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@ -0,0 +1,305 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

23
demos/nil/NIL-STM32F051-DISCOVERY/main.c
View File

@ -17,6 +17,7 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "hal.h"
#include "nil.h"
/*
@ -28,9 +29,9 @@ THD_FUNCTION(Thread1, arg) {
(void)arg;
while (true) {
// gpioSetPad(GPIOC, GPIOC_LED4);
palSetPad(GPIOC, GPIOC_LED4);
chThdSleepMilliseconds(500);
// gpioClearPad(GPIOC, GPIOC_LED4);
palSetPad(GPIOC, GPIOC_LED4);
chThdSleepMilliseconds(500);
}
}
@ -44,9 +45,9 @@ THD_FUNCTION(Thread2, arg) {
(void)arg;
while (true) {
// gpioSetPad(GPIOC, GPIOC_LED3);
palSetPad(GPIOC, GPIOC_LED3);
chThdSleepMilliseconds(250);
// gpioClearPad(GPIOC, GPIOC_LED3);
palSetPad(GPIOC, GPIOC_LED3);
chThdSleepMilliseconds(250);
}
}
@ -66,15 +67,19 @@ THD_TABLE_END
int main(void) {
/*
* System initializations:
* - HW specific initialization.
* - Nil RTOS initialization.
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
// hwInit();
halInit();
chSysInit();
/* This is now the idle thread loop, you may perform here a low priority
task but you must never try to sleep or wait in this loop.*/
task but you must never try to sleep or wait in this loop. Note that
this tasks runs at the lowest priority level so any instruction added
here will be executed after all other tasks have been started.*/
while (true) {
}
}

153
demos/nil/NIL-STM32F051-DISCOVERY/mcuconf.h Normal file
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@ -0,0 +1,153 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F0xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
#define STM32F0xx_MCUCONF
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_HSI_ENABLED TRUE
#define STM32_HSI14_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSI
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE STM32_PPRE_DIV1
#define STM32_ADCSW STM32_ADCSW_HSI14
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_ADCSW STM32_ADCSW_HSI14
#define STM32_CECSW STM32_CECSW_HSI
#define STM32_I2C1SW STM32_I2C1SW_HSI
#define STM32_USART1SW STM32_USART1SW_PCLK
#define STM32_RTCSEL STM32_RTCSEL_LSI
/*
* ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 2
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
/*
* I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 10
#define STM32_I2C_I2C2_IRQ_PRIORITY 10
#define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 TRUE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USART1_PRIORITY 3
#define STM32_SERIAL_USART2_PRIORITY 3
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
/*
* ST driver system settings.
*/
#define STM32_ST_IRQ_PRIORITY 2
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 3
#define STM32_UART_USART2_IRQ_PRIORITY 3
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")

12
demos/nil/NIL-STM32F051-DISCOVERY/nilconf.h
View File

@ -41,7 +41,7 @@
/**
* @brief System tick frequency.
*/
#define NIL_CFG_FREQUENCY 1000
#define NIL_CFG_ST_FREQUENCY 1000
/**
* @brief Time delta constant for the tick-less mode.
@ -53,6 +53,16 @@
*/
#define NIL_CFG_TIMEDELTA 0
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(NIL_CFG_USE_EVENTS) || defined(__DOXYGEN__)
#define NIL_CFG_USE_EVENTS TRUE
#endif
/**
* @brief System assertions.
*/

12
os/hal/include/hal_queues.h
View File

@ -160,7 +160,7 @@ typedef io_queue_t input_queue_t;
*
* @iclass
*/
#define iqIsEmptyI(iqp) ((bool_t)(qSpaceI(iqp) <= 0))
#define iqIsEmptyI(iqp) ((bool)(qSpaceI(iqp) <= 0))
/**
* @brief Evaluates to @p TRUE if the specified input queue is full.
@ -172,8 +172,8 @@ typedef io_queue_t input_queue_t;
*
* @iclass
*/
#define iqIsFullI(iqp) ((bool_t)(((iqp)->q_wrptr == (iqp)->q_rdptr) && \
((iqp)->q_counter != 0)))
#define iqIsFullI(iqp) ((bool)(((iqp)->q_wrptr == (iqp)->q_rdptr) && \
((iqp)->q_counter != 0)))
/**
* @brief Input queue read.
@ -275,8 +275,8 @@ typedef io_queue_t output_queue_t;
*
* @iclass
*/
#define oqIsEmptyI(oqp) ((bool_t)(((oqp)->q_wrptr == (oqp)->q_rdptr) && \
((oqp)->q_counter != 0)))
#define oqIsEmptyI(oqp) ((bool)(((oqp)->q_wrptr == (oqp)->q_rdptr) && \
((oqp)->q_counter != 0)))
/**
* @brief Evaluates to @p TRUE if the specified output queue is full.
@ -288,7 +288,7 @@ typedef io_queue_t output_queue_t;
*
* @iclass
*/
#define oqIsFullI(oqp) ((bool_t)(qSpaceI(oqp) <= 0))
#define oqIsFullI(oqp) ((bool)(qSpaceI(oqp) <= 0))
/**
* @brief Output queue write.

107
os/nil/include/nil.h
View File

@ -88,10 +88,27 @@
#define NIL_STATE_SLEEPING 1 /**< @brief Thread sleeping. */
#define NIL_STATE_SUSP 2 /**< @brief Thread suspended. */
#define NIL_STATE_WTSEM 3 /**< @brief Thread waiting on semaphore.*/
#define NIL_STATE_WTOREVT 4 /**< @brief Thread waiting for events. */
#define NIL_THD_IS_READY(tr) ((tr)->state == NIL_STATE_READY)
#define NIL_THD_IS_SLEEPING(tr) ((tr)->state == NIL_STATE_SLEEPING)
#define NIL_THD_IS_SUSP(tr) ((tr)->state == NIL_STATE_SUSP)
#define NIL_THD_IS_WTSEM(tr) ((tr)->state == NIL_STATE_WTSEM)
#define NIL_THD_IS_WTOREVT(tr) ((tr)->state == NIL_STATE_WTOREVT)
/** @} */
/**
* @name Events related macros
* @{
*/
/**
* @brief All events allowed mask.
*/
#define ALL_EVENTS ((eventmask_t)-1)
/**
* @brief Returns an event mask from an event identifier.
*/
#define EVENT_MASK(eid) ((eventmask_t)(1 << (eid)))
/** @} */
/*===========================================================================*/
@ -110,8 +127,8 @@
/**
* @brief System timer resolution in Hz.
*/
#if !defined(NIL_CFG_FREQUENCY) || defined(__DOXYGEN__)
#define NIL_CFG_FREQUENCY 100
#if !defined(NIL_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define NIL_CFG_ST_FREQUENCY 100
#endif
/**
@ -126,6 +143,16 @@
#define NIL_CFG_TIMEDELTA 0
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(NIL_CFG_USE_EVENTS) || defined(__DOXYGEN__)
#define NIL_CFG_USE_EVENTS TRUE
#endif
/**
* @brief System assertions.
*/
@ -154,8 +181,8 @@
"ChibiOS/RT instead"
#endif
#if NIL_CFG_FREQUENCY <= 0
#error "invalid NIL_CFG_FREQUENCY specified"
#if NIL_CFG_ST_FREQUENCY <= 0
#error "invalid NIL_CFG_ST_FREQUENCY specified"
#endif
#if (NIL_CFG_TIMEDELTA < 0) || (NIL_CFG_TIMEDELTA == 1)
@ -228,9 +255,15 @@ struct nil_thread {
void *p; /**< @brief Generic pointer. */
thread_reference_t *trp; /**< @brief Pointer to thread reference. */
semaphore_t *semp; /**< @brief Pointer to semaphore. */
#if NIL_CFG_USE_EVENTS
eventmask_t ewmask; /**< @brief Enabled events mask. */
#endif
} u1;
volatile systime_t timeout;/**< @brief Timeout counter, zero
if disabled. */
#if NIL_CFG_USE_EVENTS
eventmask_t epmask; /**< @brief Pending events mask. */
#endif
/* Optional extra fields.*/
NIL_CFG_THREAD_EXT_FIELDS
};
@ -244,40 +277,40 @@ typedef struct {
/**
* @brief Pointer to the running thread.
*/
thread_reference_t current;
thread_reference_t current;
/**
* @brief Pointer to the next thread to be executed.
* @note This pointer must point at the same thread pointed by @p currp
* or to an higher priority thread if a switch is required.
*/
thread_reference_t next;
thread_reference_t next;
#if NIL_CFG_TIMEDELTA == 0 || defined(__DOXYGEN__)
/**
* @brief System time.
*/
systime_t systime;
systime_t systime;
#endif
#if NIL_CFG_TIMEDELTA > 0 || defined(__DOXYGEN__)
/**
* @brief System time of the last tick event.
*/
systime_t lasttime;
systime_t lasttime;
/**
* @brief Time of the next scheduled tick event.
*/
systime_t nexttime;
systime_t nexttime;
#endif
/**
* @brief Thread structures for all the defined threads.
*/
thread_t threads[NIL_CFG_NUM_THREADS + 1];
thread_t threads[NIL_CFG_NUM_THREADS + 1];
#if CH_DBG_ENABLED || defined(__DOXYGEN__)
/**
* @brief Panic message.
* @note This field is only present if some debug options have been
* activated.
*/
const char *dbg_panic_msg;
const char *dbg_panic_msg;
#endif
} nil_system_t;
@ -424,7 +457,7 @@ typedef struct {
* @api
*/
#define S2ST(sec) \
((systime_t)((sec) * NIL_CFG_FREQUENCY))
((systime_t)((sec) * NIL_CFG_ST_FREQUENCY))
/**
* @brief Milliseconds to system ticks.
@ -437,8 +470,8 @@ typedef struct {
* @api
*/
#define MS2ST(msec) \
((systime_t)(((((uint32_t)(msec)) * ((uint32_t)NIL_CFG_FREQUENCY) - 1UL) /\
1000UL) + 1UL))
((systime_t)(((((uint32_t)(msec)) * \
((uint32_t)NIL_CFG_ST_FREQUENCY) - 1UL) / 1000UL) + 1UL))
/**
* @brief Microseconds to system ticks.
@ -451,8 +484,8 @@ typedef struct {
* @api
*/
#define US2ST(usec) \
((systime_t)(((((uint32_t)(usec)) * ((uint32_t)NIL_CFG_FREQUENCY) - 1UL) /\
1000000UL) + 1UL))
((systime_t)(((((uint32_t)(usec)) * \
((uint32_t)NIL_CFG_ST_FREQUENCY) - 1UL) / 1000000UL) + 1UL))
/** @} */
/**
@ -572,7 +605,7 @@ typedef struct {
* @sclass
*/
#define chThdSleepUntilS(time) \
chSchGoSleepTimeoutS(NIL_STATE_SLEEPING, (time) - chTimeNow())
chSchGoSleepTimeoutS(NIL_STATE_SLEEPING, (time) - chVTGetSystemTimeX())
/**
* @brief Initializes a semaphore with the specified counter value.
@ -625,36 +658,20 @@ typedef struct {
* @details Returns the number of system ticks since the @p chSysInit()
* invocation.
* @note The counter can reach its maximum and then restart from zero.
* @note This function is designed to work with the @p chThdSleepUntil().
* @note This function can be called from any context but its atomicity
* is not guaranteed on architectures whose word size is less than
* @systime_t size.
*
* @return The system time in ticks.
*
* @iclass
* @xclass
*/
#if NIL_CFG_TIMEDELTA == 0 || defined(__DOXYGEN__)
#define chTimeNowI() (nil.systime)
#define chVTGetSystemTimeX() (nil.systime)
#else
#define chTimeNowI() port_timer_get_time()
#define chVTGetSystemTimeX() port_timer_get_time()
#endif
/**
* @brief Checks if the specified time is within the specified time window.
* @note When start==end then the function returns always true because the
* whole time range is specified.
*
* @param[in] time the time to be verified
* @param[in] start the start of the time window (inclusive)
* @param[in] end the end of the time window (non inclusive)
*
* @retval true current time within the specified time window.
* @retval false current time not within the specified time window.
*
* @api
*/
#define chTimeIsWithin(time, start, end) \
((end) > (start) ? ((time) >= (start)) && ((time) < (end)) : \
((time) >= (start)) || ((time) < (end)))
#if NIL_CFG_ENABLE_ASSERTS || defined(__DOXYGEN__)
/**
* @brief Condition assertion.
@ -671,9 +688,9 @@ typedef struct {
* @api
*/
#if !defined(chDbgAssert)
#define chDbgAssert(c, r) { \
#define chDbgAssert(c, r) { \
if (!(c)) \
chSysHalt("A:"__CH_QUOTE(__FUNCTION__)":"__CH_QUOTE(__LINE__)); \
chSysHalt("A:"__CH_QUOTE(__FUNCTION__)":"__CH_QUOTE(__LINE__)); \
}
#endif /* !defined(chDbgAssert) */
#else /* !NIL_CFG_ENABLE_ASSERTS */
@ -696,6 +713,8 @@ extern "C" {
void chSysInit(void);
void chSysHalt(const char *reason);
void chSysTimerHandlerI(void);
syssts_t chSysGetStatusAndLockX(void);
void chSysRestoreStatusX(syssts_t sts);
thread_reference_t chSchReadyI(thread_reference_t trp, msg_t msg);
msg_t chSchGoSleepTimeoutS(tstate_t newstate, systime_t timeout);
void chSchRescheduleS(void);
@ -703,14 +722,16 @@ extern "C" {
void chThdResumeI(thread_reference_t *trp, msg_t msg);
void chThdSleep(systime_t time);
void chThdSleepUntil(systime_t time);
systime_t chTimeNow(void);
bool chTimeNowIsWithin(systime_t start, systime_t end);
bool chVTIsTimeWithinX(systime_t time, systime_t start, systime_t end);
msg_t chSemWaitTimeout(semaphore_t *sp, systime_t time);
msg_t chSemWaitTimeoutS(semaphore_t *sp, systime_t time);
void chSemSignal(semaphore_t *sp);
void chSemSignalI(semaphore_t *sp);
void chSemReset(semaphore_t *sp, cnt_t n);
void chSemResetI(semaphore_t *sp, cnt_t n);
void chEvtSignal(thread_t *tp, eventmask_t mask);
void chEvtSignalI(thread_t *tp, eventmask_t mask);
eventmask_t chEvtWaitAnyTimeout(eventmask_t mask, systime_t timeout);
#ifdef __cplusplus
}
#endif

60
os/nil/osal/osal.h
View File

@ -107,6 +107,10 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !NIL_CFG_USE_EVENTS
#error "OSAL requires NIL_CFG_USE_EVENTS=TRUE"
#endif
#if !(OSAL_ST_MODE == OSAL_ST_MODE_NONE) && \
!(OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) && \
!(OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING)
@ -152,12 +156,6 @@ typedef uint32_t rtcnt_t;
typedef thread_t * thread_reference_t;
#endif
typedef (*eventcallback_t)()
/**
* @brief Type of an event flags mask.
*/
typedef uint32_t eventflags_t;
/**
* @brief Type of an event flags object.
* @note The content of this structure is not part of the API and should
@ -166,10 +164,33 @@ typedef uint32_t eventflags_t;
* @note Retrieval and clearing of the flags are not defined in this
* API and are implementation-dependent.
*/
typedef struct {
volatile eventflags_t flags; /**< @brief Flags stored into the
object. */
} eventsource_t;
typedef struct event_source event_source_t;
/**
* @brief Type of an event source callback.
* @note This type is not part of the OSAL API and is provided
* exclusively as an example and for convenience.
*/
typedef void (*eventcallback_t)(event_source_t *);
/**
* @brief Type of an event flags mask.
*/
typedef uint32_t eventflags_t;
/**
* @brief Events source object.
* @note The content of this structure is not part of the API and should
* not be relied upon. Implementers may define this structure in
* an entirely different way.
* @note Retrieval and clearing of the flags are not defined in this
* API and are implementation-dependent.
*/
struct event_source {
volatile eventflags_t flags; /**< @brief Stored event flags. */
eventcallback_t cb; /**< @brief Event source callback. */
void *param; /**< @brief User defined field. */
};
/**
* @brief Type of a mutex.
@ -653,9 +674,11 @@ static inline msg_t osalQueueGoSleepTimeoutS(threads_queue_t *tqp,
*
* @init
*/
static inline void osalEventObjectInit(eventsource_t *esp) {
static inline void osalEventObjectInit(event_source_t *esp) {
chEvtObjectInit(esp);
esp->flags = 0;
esp->cb = NULL;
esp->param = NULL;
}
/**
@ -666,10 +689,12 @@ static inline void osalEventObjectInit(eventsource_t *esp) {
*
* @iclass
*/
static inline void osalEventBroadcastFlagsI(eventsource_t *esp,
static inline void osalEventBroadcastFlagsI(event_source_t *esp,
eventflags_t flags) {
chEvtBroadcastFlagsI(esp, flags);
esp->flags |= flags;
if (esp->cb != NULL)
esp->cb(esp);
}
/**
@ -680,10 +705,13 @@ static inline void osalEventBroadcastFlagsI(eventsource_t *esp,
*
* @iclass
*/
static inline void osalEventBroadcastFlags(eventsource_t *esp,
static inline void osalEventBroadcastFlags(event_source_t *esp,
eventflags_t flags) {
chEvtBroadcastFlags(esp, flags);
chSysLock();
osalEventBroadcastFlagsI(esp, flags);
chSchRescheduleS();
chSysUnlock();
}
/**

1
os/nil/ports/ARMCMx/compilers/GCC/niltypes.h
View File

@ -55,6 +55,7 @@ typedef uint32_t systime_t; /**< System time. */
typedef uint32_t rtcnt_t; /**< Realtime counter. */
typedef uint8_t tstate_t; /**< Thread state. */
typedef int32_t msg_t; /**< Inter-thread message. */
typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
typedef int32_t cnt_t; /**< Generic signed counter. */
typedef uint32_t ucnt_t; /**< Generic unsigned counter. */

157
os/nil/src/nil.c
View File

@ -210,6 +210,52 @@ void chSysTimerHandlerI(void) {
#endif
}
/**
* @brief Returns the execution status and enters a critical zone.
* @details This functions enters into a critical zone and can be called
* from any context. Because its flexibility it is less efficient
* than @p chSysLock() which is preferable when the calling context
* is known.
* @post The system is in a critical zone.
*
* @return The previous system status, the encoding of this
* status word is architecture-dependent and opaque.
*
* @xclass
*/
syssts_t chSysGetStatusAndLockX(void) {
syssts_t sts = port_get_irq_status();
if (port_irq_enabled(sts)) {
if (port_is_isr_context())
chSysLockFromISR();
else
chSysLock();
}
return sts;
}
/**
* @brief Restores the specified execution status and leaves a critical zone.
* @note A call to @p chSchRescheduleS() is automatically performed
* if exiting the critical zone and if not in ISR context.
*
* @param[in] sts the system status to be restored.
*
* @xclass
*/
void chSysRestoreStatusX(syssts_t sts) {
if (port_irq_enabled(sts)) {
if (port_is_isr_context())
chSysUnlockFromISR();
else {
chSchRescheduleS();
chSysUnlock();
}
}
}
/**
* @brief Makes the specified thread ready for execution.
*
@ -409,43 +455,23 @@ void chThdSleepUntil(systime_t time) {
}
/**
* @brief Current system time.
* @details Returns the number of system ticks since the @p chSysInit()
* invocation.
* @note The counter can reach its maximum and then restart from zero.
* @note This function is designed to work with the @p chThdSleepUntil().
*
* @return The system time in ticks.
*
* @api
*/
systime_t chTimeNow(void) {
systime_t time;
chSysLock();
time = chTimeNowI();
chSysUnlock();
return time;
}
/**
* @brief Checks if the current system time is within the specified time
* window.
* @brief Checks if the specified time is within the specified time window.
* @note When start==end then the function returns always true because the
* whole time range is specified.
* @note This function can be called from any context.
*
* @param[in] time the time to be verified
* @param[in] start the start of the time window (inclusive)
* @param[in] end the end of the time window (non inclusive)
*
* @retval true current time within the specified time window.
* @retval false current time not within the specified time window.
*
* @api
* @xclass
*/
bool chTimeNowIsWithin(systime_t start, systime_t end) {
bool chVTIsTimeWithinX(systime_t time, systime_t start, systime_t end) {
systime_t time = chTimeNow();
return chTimeIsWithin(time, start, end);
return end > start ? (time >= start) && (time < end) :
(time >= start) || (time < end);
}
/**
@ -625,4 +651,81 @@ void chSemResetI(semaphore_t *sp, cnt_t n) {
}
}
/**
* @brief Adds a set of event flags directly to the specified @p thread_t.
*
* @param[in] tp the thread to be signaled
* @param[in] mask the event flags set to be ORed
*
* @api
*/
void chEvtSignal(thread_t *tp, eventmask_t mask) {
chSysLock();
chEvtSignalI(tp, mask);
chSchRescheduleS();
chSysUnlock();
}
/**
* @brief Adds a set of event flags directly to the specified @p thread_t.
* @post This function does not reschedule so a call to a rescheduling
* function must be performed before unlocking the kernel. Note that
* interrupt handlers always reschedule on exit so an explicit
* reschedule must not be performed in ISRs.
*
* @param[in] tp the thread to be signaled
* @param[in] mask the event flags set to be ORed
*
* @iclass
*/
void chEvtSignalI(thread_t *tp, eventmask_t mask) {
tp->epmask |= mask;
if (NIL_THD_IS_WTOREVT(tp) && ((tp->epmask & tp->u1.ewmask) != 0))
chSchReadyI(tp, MSG_OK);
}
/**
* @brief Waits for any of the specified events.
* @details The function waits for any event among those specified in
* @p mask to become pending then the events are cleared and
* returned.
*
* @param[in] mask mask of the event flags that the function should wait
* for, @p ALL_EVENTS enables all the events
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_IMMEDIATE immediate timeout.
* - @a TIME_INFINITE no timeout.
* .
* @return The mask of the served and cleared events.
* @retval 0 if the operation has timed out.
*
* @api
*/
eventmask_t chEvtWaitAnyTimeout(eventmask_t mask, systime_t timeout) {
thread_t *ctp = nil.current;
eventmask_t m;
chSysLock();
if ((m = (ctp->epmask & mask)) == 0) {
if (TIME_IMMEDIATE == timeout) {
chSysUnlock();
return (eventmask_t)0;
}
ctp->u1.ewmask = mask;
if (chSchGoSleepTimeoutS(NIL_STATE_WTOREVT, timeout) < MSG_OK) {
chSysUnlock();
return (eventmask_t)0;
}
m = ctp->epmask & mask;
}
ctp->epmask &= ~m;
chSysUnlock();
return m;
}
/** @} */

2
os/rt/src/chsys.c
View File

@ -228,7 +228,7 @@ void chSysTimerHandlerI(void) {
*
* @xclass
*/
syssts_t chSysGetStatusAndLockX(void) {
syssts_t chSysGetStatusAndLockX(void) {
syssts_t sts = port_get_irq_status();
if (port_irq_enabled(sts)) {