Fixed bug #520.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7106 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
ff9bc27d92
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a91b8d62dd
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@ -159,6 +159,8 @@ void adc_lld_start(ADCDriver *adcp) {
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}
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#endif /* STM32_ADC_USE_ADC1 */
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ADC->CCR = (ADC->CCR & ADC_CCR_TSVREFE) | (STM32_ADC_ADCPRE << 16);
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/* ADC initial setup, starting the analog part here in order to reduce
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the latency when starting a conversion.*/
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adcp->adc->CR1 = 0;
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@ -175,6 +175,20 @@
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#define STM32_DMA_REQUIRED
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#endif
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/**
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* * @brief ADC frequency.
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* */
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/* ADC clock related settings and checks.*/
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#if STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV1
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#define STM32_ADCCLK STM32_HSICLK
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#elif STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV2
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#define STM32_ADCCLK (STM32_HSICLK / 2)
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#elif STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV4
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#define STM32_ADCCLK (STM32_HSICLK / 4)
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#else
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#error "invalid STM32_ADC_ADCPRE value specified"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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@ -770,11 +770,6 @@
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#error "invalid STM32_RTCSEL value specified"
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#endif
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/**
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* @brief ADC frequency.
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*/
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#define STM32_ADCCLK STM32_HSICLK
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/**
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* @brief USB frequency.
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*/
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