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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4836 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2012-11-22 11:50:50 +00:00
parent 57618ff11d
commit a435774306
2 changed files with 37 additions and 4 deletions
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35
os/ports/GCC/PPC/SPC560BCxx/bam.s
View File

@ -31,7 +31,40 @@
/* BAM info, SWT off, WTE off, VLE from settings.*/
.section .bam, "ax"
.long 0x015A0000
.long _boot_address
.long .clear_ecc
/* RAM clearing, this device requires a write to all RAM location in
order to initialize the ECC detection hardware, this is going to
slow down the startup but there is no way around.*/
.clear_ecc:
xor %r16, %r16, %r16
xor %r17, %r17, %r17
xor %r18, %r18, %r18
xor %r19, %r19, %r19
xor %r20, %r20, %r20
xor %r21, %r21, %r21
xor %r22, %r22, %r22
xor %r23, %r23, %r23
xor %r24, %r24, %r24
xor %r25, %r25, %r25
xor %r26, %r26, %r26
xor %r27, %r27, %r27
xor %r28, %r28, %r28
xor %r29, %r29, %r29
xor %r30, %r30, %r30
xor %r31, %r31, %r31
lis %r4, __ram_start__@h
ori %r4, %r4, __ram_start__@l
lis %r5, __ram_end__@h
ori %r5, %r5, __ram_end__@l
.cleareccloop:
cmpl cr0, %r4, %r5
bge cr0, .cleareccend
stmw %r16, 0(%r4)
addi %r4, %r4, 64
b .cleareccloop
.cleareccend:
b _boot_address
#endif /* !defined(__DOXYGEN__) */

6
os/ports/GCC/PPC/crt0.s
View File

@ -36,8 +36,8 @@ _boot_address:
/*
* Stack setup.
*/
lis %r1, __ram_end__@h
ori %r1, %r1, __ram_end__@l
lis %r1, __process_stack_end__@h
ori %r1, %r1, __process_stack_end__@l
li %r0, 0
stwu %r0, -8(%r1)
/*
@ -45,7 +45,7 @@ _boot_address:
*/
lis %r4, __ivpr_base__@h
ori %r4, %r4, __ivpr_base__@l
mtIVPR %r4
mtIVPR %r4
/*
* Small sections registers initialization.
*/