git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@205 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
ef79349ec1
commit
a40f3424bd
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@ -94,6 +94,8 @@ extern void chSysUnlock(void);
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#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
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#ifdef THUMB
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#define chSysSwitchI chSysSwitchI_thumb
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#define chSysIRQEnterI() { \
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asm(".code 32 \n\t" \
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"stmfd sp!, {r0-r3, r12, lr} \n\t" \
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@ -107,6 +109,8 @@ extern void chSysUnlock(void);
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"bx r0 \n\t"); \
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}
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#else /* !THUMB */
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#define chSysSwitchI chSysSwitchI_arm
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#define chSysIRQEnterI() { \
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asm("stmfd sp!, {r0-r3, r12, lr} \n\t"); \
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}
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@ -116,10 +120,6 @@ extern void chSysUnlock(void);
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}
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#endif /* !THUMB */
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#ifdef THUMB
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#define chSysSwitchI chSysSwitchI_thumb
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#endif /* THUMB */
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/* It requires zero bytes, but better be safe.*/
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#define IDLE_THREAD_STACK_SIZE 8
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void _IdleThread(void *p) __attribute__((noreturn));
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@ -75,8 +75,8 @@ chSysSwitchI_thumb:
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// Jumps into chSysSwitchI in ARM mode
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#endif
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.code 32
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.global chSysSwitchI
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chSysSwitchI:
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.global chSysSwitchI_arm
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chSysSwitchI_arm:
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#ifdef CH_CURRP_REGISTER_CACHE
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stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
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str sp, [r0, #16]
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@ -112,8 +112,8 @@ chSysSwitchI:
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* | R2 | | External context: IRQ handler frame
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* | R1 | |
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* | R0 | |
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* | LR_IRQ | | (user code return address)
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* | SPSR | -+ (user code status)
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* | PC | | (user code return address)
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* | PSR_USR | -+ (user code status)
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* | .... | <- mk_DoRescheduleI() stack frame, optimize it for space
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* | LR | -+ (system code return address)
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* | R11 | |
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@ -102,7 +102,7 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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behavior).
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Note: This option brings a small overhead when sending a message regardless
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if in FIFO or priority order, if you dont need priority ordering for your
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messages it is better to keep disabled the feature in chconf.h.
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messages it is better to keep the feature disabled in chconf.h.
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- Added to the ARM demos load scripts the capability to load code in RAM
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instead flash, the function must be marked as:
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__attribute__((section(".ramtext")))
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