Small fixes to the L1 DMA caused by differences in headers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8167 35acf78f-673a-0410-8e92-d51de3d6d3f4master
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@ -121,28 +121,28 @@
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* @name CR register constants common to all DMA types
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* @{
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*/
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#define STM32_DMA_CR_EN DMA_CCR1_EN
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#define STM32_DMA_CR_TEIE DMA_CCR1_TEIE
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#define STM32_DMA_CR_HTIE DMA_CCR1_HTIE
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#define STM32_DMA_CR_TCIE DMA_CCR1_TCIE
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#define STM32_DMA_CR_DIR_MASK (DMA_CCR1_DIR | DMA_CCR1_MEM2MEM)
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#define STM32_DMA_CR_EN DMA_CCR_EN
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#define STM32_DMA_CR_TEIE DMA_CCR_TEIE
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#define STM32_DMA_CR_HTIE DMA_CCR_HTIE
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#define STM32_DMA_CR_TCIE DMA_CCR_TCIE
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#define STM32_DMA_CR_DIR_MASK (DMA_CCR_DIR | DMA_CCR_MEM2MEM)
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#define STM32_DMA_CR_DIR_P2M 0
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#define STM32_DMA_CR_DIR_M2P DMA_CCR1_DIR
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#define STM32_DMA_CR_DIR_M2M DMA_CCR1_MEM2MEM
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#define STM32_DMA_CR_CIRC DMA_CCR1_CIRC
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#define STM32_DMA_CR_PINC DMA_CCR1_PINC
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#define STM32_DMA_CR_MINC DMA_CCR1_MINC
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#define STM32_DMA_CR_PSIZE_MASK DMA_CCR1_PSIZE
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#define STM32_DMA_CR_DIR_M2P DMA_CCR_DIR
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#define STM32_DMA_CR_DIR_M2M DMA_CCR_MEM2MEM
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#define STM32_DMA_CR_CIRC DMA_CCR_CIRC
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#define STM32_DMA_CR_PINC DMA_CCR_PINC
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#define STM32_DMA_CR_MINC DMA_CCR_MINC
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#define STM32_DMA_CR_PSIZE_MASK DMA_CCR_PSIZE
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#define STM32_DMA_CR_PSIZE_BYTE 0
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#define STM32_DMA_CR_PSIZE_HWORD DMA_CCR1_PSIZE_0
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#define STM32_DMA_CR_PSIZE_WORD DMA_CCR1_PSIZE_1
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#define STM32_DMA_CR_MSIZE_MASK DMA_CCR1_MSIZE
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#define STM32_DMA_CR_PSIZE_HWORD DMA_CCR_PSIZE_0
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#define STM32_DMA_CR_PSIZE_WORD DMA_CCR_PSIZE_1
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#define STM32_DMA_CR_MSIZE_MASK DMA_CCR_MSIZE
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#define STM32_DMA_CR_MSIZE_BYTE 0
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#define STM32_DMA_CR_MSIZE_HWORD DMA_CCR1_MSIZE_0
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#define STM32_DMA_CR_MSIZE_WORD DMA_CCR1_MSIZE_1
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#define STM32_DMA_CR_MSIZE_HWORD DMA_CCR_MSIZE_0
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#define STM32_DMA_CR_MSIZE_WORD DMA_CCR_MSIZE_1
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#define STM32_DMA_CR_SIZE_MASK (STM32_DMA_CR_PSIZE_MASK | \
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STM32_DMA_CR_MSIZE_MASK)
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#define STM32_DMA_CR_PL_MASK DMA_CCR1_PL
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#define STM32_DMA_CR_PL_MASK DMA_CCR_PL
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#define STM32_DMA_CR_PL(n) ((n) << 12)
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/** @} */
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