From 9afc25656cf245314157c310847f100acb54597a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Feb 2013 10:26:57 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5317 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC560Pxx/hal_lld.c | 8 ++--- os/hal/templates/pal_lld.c | 29 ++++++++++++++++ os/hal/templates/pal_lld.h | 27 +++++++++++---- testhal/testbuild/.cproject | 51 ++++++++++++++++++++++++++++ testhal/testbuild/.project | 38 +++++++++++++++++++++ 5 files changed, 143 insertions(+), 10 deletions(-) create mode 100644 testhal/testbuild/.cproject create mode 100644 testhal/testbuild/.project diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.c b/os/hal/platforms/SPC560Pxx/hal_lld.c index 505b777de..72e16be4d 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.c +++ b/os/hal/platforms/SPC560Pxx/hal_lld.c @@ -152,12 +152,12 @@ void spc_clock_init(void) { /* Enables the XOSC in order to check its functionality before proceeding with the initialization.*/ -/* ME.DRUN.R = SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | \ - SPC5_ME_MC_CFLAON_NORMAL | SPC5_ME_MC_CFLAON_NORMAL | - SPC5_ME_MC_MVRON; + ME.DRUN.R = SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | SPC5_ME_MC_MVRON; if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED) { SPC5_CLOCK_FAILURE_HOOK(); - }*/ + } /* Initialization of the FMPLLs settings.*/ CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF | diff --git a/os/hal/templates/pal_lld.c b/os/hal/templates/pal_lld.c index b6030b06e..10e2ae482 100644 --- a/os/hal/templates/pal_lld.c +++ b/os/hal/templates/pal_lld.c @@ -55,6 +55,35 @@ /* Driver exported functions. */ /*===========================================================================*/ +/** + * @brief STM32 I/O ports configuration. + * @details Ports A-D(E, F, G, H) clocks enabled. + * + * @param[in] config the STM32 ports configuration + * + * @notapi + */ +void _pal_lld_init(const PALConfig *config) { + +} + +/** + * @brief Pads mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode + * + * @notapi + */ +void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode) { + +} + #endif /* HAL_USE_PAL */ /** @} */ diff --git a/os/hal/templates/pal_lld.h b/os/hal/templates/pal_lld.h index d6c898e8b..9e109e465 100644 --- a/os/hal/templates/pal_lld.h +++ b/os/hal/templates/pal_lld.h @@ -104,7 +104,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_init(config) +#define pal_lld_init(config) _pal_lld_init(config) /** * @brief Reads the physical I/O port states. @@ -114,7 +114,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_readport(port) +#define pal_lld_readport(port) 0 /** * @brief Reads the output latch. @@ -126,7 +126,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_readlatch(port) +#define pal_lld_readlatch(port) 0 /** * @brief Writes a bits mask on a I/O port. @@ -190,7 +190,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_readgroup(port, mask, offset) +#define pal_lld_readgroup(port, mask, offset) 0 /** * @brief Writes a group of bits. @@ -206,7 +206,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_writegroup(port, mask, offset, bits) +#define pal_lld_writegroup(port, mask, offset, bits) (void)bits /** * @brief Pads group mode setup. @@ -238,7 +238,7 @@ typedef uint32_t ioportid_t; * * @notapi */ -#define pal_lld_readpad(port, pad) +#define pal_lld_readpad(port, pad) PAL_LOW /** * @brief Writes a logical state on an output pad. @@ -312,6 +312,21 @@ typedef uint32_t ioportid_t; */ #define pal_lld_setpadmode(port, pad, mode) +#if !defined(__DOXYGEN__) +extern const PALConfig pal_default_config; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void _pal_lld_init(const PALConfig *config); + void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode); +#ifdef __cplusplus +} +#endif + #endif /* HAL_USE_PAL */ #endif /* _PAL_LLD_H_ */ diff --git a/testhal/testbuild/.cproject b/testhal/testbuild/.cproject new file mode 100644 index 000000000..1ce473e74 --- /dev/null +++ b/testhal/testbuild/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/testbuild/.project b/testhal/testbuild/.project new file mode 100644 index 000000000..177c31184 --- /dev/null +++ b/testhal/testbuild/.project @@ -0,0 +1,38 @@ + + + HAL-BUILD_TEST + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + +