git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5317 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-02-25 10:26:57 +00:00
parent c39343f728
commit 9afc25656c
5 changed files with 143 additions and 10 deletions

View File

@ -152,12 +152,12 @@ void spc_clock_init(void) {
/* Enables the XOSC in order to check its functionality before proceeding
with the initialization.*/
/* ME.DRUN.R = SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_CFLAON_NORMAL | SPC5_ME_MC_CFLAON_NORMAL |
SPC5_ME_MC_MVRON;
ME.DRUN.R = SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | SPC5_ME_MC_MVRON;
if (halSPCSetRunMode(SPC5_RUNMODE_DRUN) == CH_FAILED) {
SPC5_CLOCK_FAILURE_HOOK();
}*/
}
/* Initialization of the FMPLLs settings.*/
CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF |

View File

@ -55,6 +55,35 @@
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief STM32 I/O ports configuration.
* @details Ports A-D(E, F, G, H) clocks enabled.
*
* @param[in] config the STM32 ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode) {
}
#endif /* HAL_USE_PAL */
/** @} */

View File

@ -104,7 +104,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_init(config)
#define pal_lld_init(config) _pal_lld_init(config)
/**
* @brief Reads the physical I/O port states.
@ -114,7 +114,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readport(port)
#define pal_lld_readport(port) 0
/**
* @brief Reads the output latch.
@ -126,7 +126,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readlatch(port)
#define pal_lld_readlatch(port) 0
/**
* @brief Writes a bits mask on a I/O port.
@ -190,7 +190,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readgroup(port, mask, offset)
#define pal_lld_readgroup(port, mask, offset) 0
/**
* @brief Writes a group of bits.
@ -206,7 +206,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits)
#define pal_lld_writegroup(port, mask, offset, bits) (void)bits
/**
* @brief Pads group mode setup.
@ -238,7 +238,7 @@ typedef uint32_t ioportid_t;
*
* @notapi
*/
#define pal_lld_readpad(port, pad)
#define pal_lld_readpad(port, pad) PAL_LOW
/**
* @brief Writes a logical state on an output pad.
@ -312,6 +312,21 @@ typedef uint32_t ioportid_t;
*/
#define pal_lld_setpadmode(port, pad, mode)
#if !defined(__DOXYGEN__)
extern const PALConfig pal_default_config;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void _pal_lld_init(const PALConfig *config);
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_PAL */
#endif /* _PAL_LLD_H_ */

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@ -0,0 +1,51 @@
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@ -0,0 +1,38 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>HAL-BUILD_TEST</name>
<comment></comment>
<projects>
</projects>
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<buildCommand>
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<linkedResources>
<link>
<name>board</name>
<type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F4_DISCOVERY</locationURI>
</link>
<link>
<name>os</name>
<type>2</type>
<locationURI>CHIBIOS/os</locationURI>
</link>
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