diff --git a/os/hal/platforms/STM32/ext_lld.c b/os/hal/platforms/STM32/ext_lld.c
index d9cd22cd7..6d475ddd8 100644
--- a/os/hal/platforms/STM32/ext_lld.c
+++ b/os/hal/platforms/STM32/ext_lld.c
@@ -108,7 +108,10 @@ void ext_lld_stop(EXTDriver *extp) {
 
   EXTI->EMR = 0;
   EXTI->IMR = 0;
-  EXTI->PR = EXT_CHANNELS_MASK;
+  EXTI->PR  = 0xFFFFFFFF;
+#if STM32_EXTI_NUM_CHANNELS > 32
+  EXTI->PR2 = 0xFFFFFFFF;
+#endif
 }
 
 /**
@@ -121,25 +124,52 @@ void ext_lld_stop(EXTDriver *extp) {
  */
 void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) {
 
-  /* Programming edge registers.*/
-  if (extp->config->channels[channel].mode & EXT_CH_MODE_RISING_EDGE)
-    EXTI->RTSR |= (1 << channel);
-  else
-    EXTI->RTSR &= ~(1 << channel);
-  if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE)
-    EXTI->FTSR |= (1 << channel);
-  else
-    EXTI->FTSR &= ~(1 << channel);
+#if STM32_EXTI_NUM_CHANNELS > 32
+  if (channel < 32) {
+#endif
+    /* Programming edge registers.*/
+    if (extp->config->channels[channel].mode & EXT_CH_MODE_RISING_EDGE)
+      EXTI->RTSR |= (1 << channel);
+    else
+      EXTI->RTSR &= ~(1 << channel);
+    if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE)
+      EXTI->FTSR |= (1 << channel);
+    else
+      EXTI->FTSR &= ~(1 << channel);
 
-  /* Programming interrupt and event registers.*/
-  if (extp->config->channels[channel].cb != NULL) {
-    EXTI->IMR |= (1 << channel);
-    EXTI->EMR &= ~(1 << channel);
+    /* Programming interrupt and event registers.*/
+    if (extp->config->channels[channel].cb != NULL) {
+      EXTI->IMR |= (1 << channel);
+      EXTI->EMR &= ~(1 << channel);
+    }
+    else {
+      EXTI->EMR |= (1 << channel);
+      EXTI->IMR &= ~(1 << channel);
+    }
+#if STM32_EXTI_NUM_CHANNELS > 32
   }
   else {
-    EXTI->EMR |= (1 << channel);
-    EXTI->IMR &= ~(1 << channel);
+    /* Programming edge registers.*/
+    if (extp->config->channels[channel].mode & EXT_CH_MODE_RISING_EDGE)
+      EXTI->RTSR2 |= (1 << (32 - channel));
+    else
+      EXTI->RTSR2 &= ~(1 << (32 - channel));
+    if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE)
+      EXTI->FTSR2 |= (1 << (32 - channel));
+    else
+      EXTI->FTSR2 &= ~(1 << (32 - channel));
+
+    /* Programming interrupt and event registers.*/
+    if (extp->config->channels[channel].cb != NULL) {
+      EXTI->IMR2 |= (1 << (32 - channel));
+      EXTI->EMR2 &= ~(1 << (32 - channel));
+    }
+    else {
+      EXTI->EMR2 |= (1 << (32 - channel));
+      EXTI->IMR2 &= ~(1 << (32 - channel));
+    }
   }
+#endif
 
   /* Setting the associated GPIO for external channels.*/
   if (channel < 16) {
@@ -150,7 +180,7 @@ void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) {
                      EXT_MODE_GPIO_OFF) << ((channel & 3) * 4);
 
 #if defined(STM32L1XX_MD) || defined(STM32F0XX) || defined(STM32F2XX) ||    \
-    defined(STM32F4XX)
+    defined(STM32F30X) || defined(STM32F4XX)
   SYSCFG->EXTICR[n] = (SYSCFG->EXTICR[n] & mask) | port;
 #else /* STM32F1XX */
   AFIO->EXTICR[n] = (AFIO->EXTICR[n] & mask) | port;
@@ -170,11 +200,24 @@ void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) {
 
   (void)extp;
 
-  EXTI->IMR  &= ~(1 << channel);
-  EXTI->EMR  &= ~(1 << channel);
-  EXTI->RTSR &= ~(1 << channel);
-  EXTI->FTSR &= ~(1 << channel);
-  EXTI->PR    =  (1 << channel);
+#if STM32_EXTI_NUM_CHANNELS > 32
+  if (channel < 32) {
+#endif
+    EXTI->IMR   &= ~(1 << channel);
+    EXTI->EMR   &= ~(1 << channel);
+    EXTI->RTSR  &= ~(1 << channel);
+    EXTI->FTSR  &= ~(1 << channel);
+    EXTI->PR     =  (1 << channel);
+#if STM32_EXTI_NUM_CHANNELS > 32
+  }
+  else {
+    EXTI->IMR2  &= ~(1 << (32 - channel));
+    EXTI->EMR2  &= ~(1 << (32 - channel));
+    EXTI->RTSR2 &= ~(1 << (32 - channel));
+    EXTI->FTSR2 &= ~(1 << (32 - channel));
+    EXTI->PR2    =  (1 << (32 - channel));
+  }
+#endif
 }
 
 #endif /* HAL_USE_EXT */
diff --git a/os/hal/platforms/STM32/ext_lld.h b/os/hal/platforms/STM32/ext_lld.h
index 5d23b3dcb..43fcf4665 100644
--- a/os/hal/platforms/STM32/ext_lld.h
+++ b/os/hal/platforms/STM32/ext_lld.h
@@ -40,11 +40,6 @@
  */
 #define EXT_MAX_CHANNELS    STM32_EXTI_NUM_CHANNELS
 
-/**
- * @brief   Mask of the available channels.
- */
-#define EXT_CHANNELS_MASK   ((1 << EXT_MAX_CHANNELS) - 1)
-
 /**
  * @name    STM32-specific EXT channel modes
  * @{
diff --git a/os/hal/platforms/STM32F3xx/ext_lld_isr.c b/os/hal/platforms/STM32F3xx/ext_lld_isr.c
new file mode 100644
index 000000000..cf2c2644a
--- /dev/null
+++ b/os/hal/platforms/STM32F3xx/ext_lld_isr.c
@@ -0,0 +1,419 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+                 2011,2012 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    STM32F3xx/ext_lld_isr.c
+ * @brief   STM32F3xx EXT subsystem low level driver ISR code.
+ *
+ * @addtogroup EXT
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#if HAL_USE_EXT || defined(__DOXYGEN__)
+
+#include "ext_lld_isr.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables.                                                   */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver interrupt handlers.                                                */
+/*===========================================================================*/
+
+#if !defined(STM32_DISABLE_EXTI0_HANDLER)
+/**
+ * @brief   EXTI[0] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector58) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 0);
+  EXTD1.config->channels[0].cb(&EXTD1, 0);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI1_HANDLER)
+/**
+ * @brief   EXTI[1] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector5C) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 1);
+  EXTD1.config->channels[1].cb(&EXTD1, 1);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI2_HANDLER)
+/**
+ * @brief   EXTI[2] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector60) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 2);
+  EXTD1.config->channels[2].cb(&EXTD1, 2);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI3_HANDLER)
+/**
+ * @brief   EXTI[3] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector64) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 3);
+  EXTD1.config->channels[3].cb(&EXTD1, 3);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI4_HANDLER)
+/**
+ * @brief   EXTI[4] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector68) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 4);
+  EXTD1.config->channels[4].cb(&EXTD1, 4);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
+/**
+ * @brief   EXTI[5]...EXTI[9] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector9C) {
+  uint32_t pr;
+
+  CH_IRQ_PROLOGUE();
+
+  pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));
+  EXTI->PR = pr;
+  if (pr & (1 << 5))
+    EXTD1.config->channels[5].cb(&EXTD1, 5);
+  if (pr & (1 << 6))
+    EXTD1.config->channels[6].cb(&EXTD1, 6);
+  if (pr & (1 << 7))
+    EXTD1.config->channels[7].cb(&EXTD1, 7);
+  if (pr & (1 << 8))
+    EXTD1.config->channels[8].cb(&EXTD1, 8);
+  if (pr & (1 << 9))
+    EXTD1.config->channels[9].cb(&EXTD1, 9);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
+/**
+ * @brief   EXTI[10]...EXTI[15] interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(VectorE0) {
+  uint32_t pr;
+
+  CH_IRQ_PROLOGUE();
+
+  pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |
+                   (1 << 15));
+  EXTI->PR = pr;
+  if (pr & (1 << 10))
+    EXTD1.config->channels[10].cb(&EXTD1, 10);
+  if (pr & (1 << 11))
+    EXTD1.config->channels[11].cb(&EXTD1, 11);
+  if (pr & (1 << 12))
+    EXTD1.config->channels[12].cb(&EXTD1, 12);
+  if (pr & (1 << 13))
+    EXTD1.config->channels[13].cb(&EXTD1, 13);
+  if (pr & (1 << 14))
+    EXTD1.config->channels[14].cb(&EXTD1, 14);
+  if (pr & (1 << 15))
+    EXTD1.config->channels[15].cb(&EXTD1, 15);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI16_HANDLER)
+/**
+ * @brief   EXTI[16] interrupt handler (PVD).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector44) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 16);
+  EXTD1.config->channels[16].cb(&EXTD1, 16);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI17_HANDLER)
+/**
+ * @brief   EXTI[17] interrupt handler (RTC Alarm).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(VectorE4) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 17);
+  EXTD1.config->channels[17].cb(&EXTD1, 17);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI18_HANDLER)
+/**
+ * @brief   EXTI[18] interrupt handler (USB Wakeup).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(VectorE8) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 18);
+  EXTD1.config->channels[18].cb(&EXTD1, 18);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI19_HANDLER)
+/**
+ * @brief   EXTI[19] interrupt handler (Tamper TimeStamp).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector48) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 19);
+  EXTD1.config->channels[19].cb(&EXTD1, 19);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI20_HANDLER)
+/**
+ * @brief   EXTI[20] interrupt handler (RTC Wakeup).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector4C) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR = (1 << 20);
+  EXTD1.config->channels[20].cb(&EXTD1, 20);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI21_23_HANDLER)
+/**
+ * @brief   EXTI[21]...EXTI[23] interrupt handler (COMP1, COMP2, COMP3).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector140) {
+  uint32_t pr;
+
+  CH_IRQ_PROLOGUE();
+
+  pr = EXTI->PR & ((1 << 21) | (1 << 22) | (1 << 23));
+  EXTI->PR = pr;
+  if (pr & (1 << 21))
+    EXTD1.config->channels[21].cb(&EXTD1, 21);
+  if (pr & (1 << 22))
+    EXTD1.config->channels[22].cb(&EXTD1, 22);
+  if (pr & (1 << 23))
+    EXTD1.config->channels[23].cb(&EXTD1, 23);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI30_32_HANDLER)
+/**
+ * @brief   EXTI[30]...EXTI[32] interrupt handler (COMP4, COMP5, COMP6).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(Vector144) {
+  uint32_t pr;
+
+  CH_IRQ_PROLOGUE();
+
+  pr = EXTI->PR & ((1 << 30) | (1 << 31));
+  EXTI->PR = pr;
+  if (pr & (1 << 30))
+    EXTD1.config->channels[30].cb(&EXTD1, 30);
+  if (pr & (1 << 31))
+    EXTD1.config->channels[31].cb(&EXTD1, 31);
+
+  pr = EXTI->PR2 & (1 << 0);
+  EXTI->PR2 = pr;
+  if (pr & (1 << 0))
+    EXTD1.config->channels[32].cb(&EXTD1, 32);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if !defined(STM32_DISABLE_EXTI33_HANDLER)
+/**
+ * @brief   EXTI[33] interrupt handler (COMP7).
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(RTC_WKUP_IRQHandler) {
+
+  CH_IRQ_PROLOGUE();
+
+  EXTI->PR2 = (1 << 1);
+  EXTD1.config->channels[33].cb(&EXTD1, 33);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables EXTI IRQ sources.
+ *
+ * @notapi
+ */
+void ext_lld_exti_irq_enable(void) {
+
+  nvicEnableVector(EXTI0_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_IRQ_PRIORITY));
+  nvicEnableVector(EXTI1_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI1_IRQ_PRIORITY));
+  nvicEnableVector(EXTI2_TS_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_IRQ_PRIORITY));
+  nvicEnableVector(EXTI3_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI3_IRQ_PRIORITY));
+  nvicEnableVector(EXTI4_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));
+  nvicEnableVector(EXTI9_5_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI5_9_IRQ_PRIORITY));
+  nvicEnableVector(EXTI15_10_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI10_15_IRQ_PRIORITY));
+  nvicEnableVector(PVD_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));
+  nvicEnableVector(RTC_Alarm_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));
+  nvicEnableVector(USBWakeUp_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));
+  nvicEnableVector(TAMPER_STAMP_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));
+  nvicEnableVector(COMP1_2_3_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI20_23_IRQ_PRIORITY));
+  nvicEnableVector(COMP4_5_6_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI30_32_IRQ_PRIORITY));
+  nvicEnableVector(COMP7_IRQn,
+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI33_IRQ_PRIORITY));
+}
+
+/**
+ * @brief   Disables EXTI IRQ sources.
+ *
+ * @notapi
+ */
+void ext_lld_exti_irq_disable(void) {
+
+  nvicDisableVector(EXTI0_IRQn);
+  nvicDisableVector(EXTI1_IRQn);
+  nvicDisableVector(EXTI2_TS_IRQn);
+  nvicDisableVector(EXTI3_IRQn);
+  nvicDisableVector(EXTI4_IRQn);
+  nvicDisableVector(EXTI9_5_IRQn);
+  nvicDisableVector(EXTI15_10_IRQn);
+  nvicDisableVector(PVD_IRQn);
+  nvicDisableVector(RTC_Alarm_IRQn);
+  nvicDisableVector(USBWakeUp_IRQn);
+  nvicDisableVector(TAMPER_STAMP_IRQn);
+  nvicDisableVector(COMP1_2_3_IRQn);
+  nvicDisableVector(COMP4_5_6_IRQn);
+  nvicDisableVector(COMP7_IRQn);
+}
+
+#endif /* HAL_USE_EXT */
+
+/** @} */
diff --git a/os/hal/platforms/STM32F3xx/ext_lld_isr.h b/os/hal/platforms/STM32F3xx/ext_lld_isr.h
new file mode 100644
index 000000000..7b94644cd
--- /dev/null
+++ b/os/hal/platforms/STM32F3xx/ext_lld_isr.h
@@ -0,0 +1,174 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+                 2011,2012 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    STM32F3xx/ext_lld_isr.h
+ * @brief   STM32F3xx EXT subsystem low level driver ISR header.
+ *
+ * @addtogroup EXT
+ * @{
+ */
+
+#ifndef _EXT_LLD_ISR_H_
+#define _EXT_LLD_ISR_H_
+
+#if HAL_USE_EXT || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/**
+ * @name    Configuration options
+ * @{
+ */
+/**
+ * @brief   EXTI0 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#endif
+
+/**
+ * @brief   EXTI1 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#endif
+
+/**
+ * @brief   EXTI2 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#endif
+
+/**
+ * @brief   EXTI3 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#endif
+
+/**
+ * @brief   EXTI4 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI4_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#endif
+
+/**
+ * @brief   EXTI5..9 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI5_9_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#endif
+
+/**
+ * @brief   EXTI10..15 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI10_15_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#endif
+
+/**
+ * @brief   EXTI16 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#endif
+
+/**
+ * @brief   EXTI17 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI17_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
+#endif
+
+/**
+ * @brief   EXTI18 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI18_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#endif
+
+/**
+ * @brief   EXTI19 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI19_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+#endif
+
+/**
+ * @brief   EXTI20 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI20_23_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI20_23_IRQ_PRIORITY    6
+#endif
+
+/**
+ * @brief   EXTI30..32 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI30_32_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI30_32_IRQ_PRIORITY    6
+#endif
+
+/**
+ * @brief   EXTI33 interrupt priority level setting.
+ */
+#if !defined(STM32_EXT_EXTI33_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_EXT_EXTI33_IRQ_PRIORITY       6
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void ext_lld_exti_irq_enable(void);
+  void ext_lld_exti_irq_disable(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_EXT */
+
+#endif /* _EXT_LLD_ISR_H_ */
+
+/** @} */
diff --git a/os/hal/platforms/STM32F3xx/platform.mk b/os/hal/platforms/STM32F3xx/platform.mk
index ae51f0140..8704aa947 100644
--- a/os/hal/platforms/STM32F3xx/platform.mk
+++ b/os/hal/platforms/STM32F3xx/platform.mk
@@ -1,7 +1,9 @@
 # List of all the STM32F3xx platform files.
 PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F3xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32F3xx/hal_lld.c \
+              ${CHIBIOS}/os/hal/platforms/STM32F3xx/ext_lld_isr.c \
               ${CHIBIOS}/os/hal/platforms/STM32/can_lld.c \
+              ${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \
               ${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \
diff --git a/os/hal/platforms/STM32F3xx/stm32f30x.h b/os/hal/platforms/STM32F3xx/stm32f30x.h
index bbb297f80..880fd1d9a 100644
--- a/os/hal/platforms/STM32F3xx/stm32f30x.h
+++ b/os/hal/platforms/STM32F3xx/stm32f30x.h
@@ -177,7 +177,7 @@ typedef enum IRQn
   WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                                         */
   PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detection Interrupt                         */
   TAMPER_STAMP_IRQn           = 2,      /*!< Tamper and TimeStamp interrupts                                   */
-  RTC_WKUP_IRQn               = 3,      /*!< RTC Wakeup interrupt through the EXTI lines 17, 19 & 20           */
+  RTC_WKUP_IRQn               = 3,      /*!< RTC Wakeup interrupt through the  lines 17, 19 & 20           */
   FLASH_IRQn                  = 4,      /*!< FLASH global Interrupt                                            */
   RCC_IRQn                    = 5,      /*!< RCC global Interrupt                                              */
   EXTI0_IRQn                  = 6,      /*!< EXTI Line0 Interrupt                                              */
diff --git a/readme.txt b/readme.txt
index d432bc19b..4ecf7ce5f 100644
--- a/readme.txt
+++ b/readme.txt
@@ -86,6 +86,8 @@
   (backported to 2.4.3).
 - FIX: Fixed wrong SPI path in platform_f105_f107.mk (bug 3598151).
 - FIX: Fixed PHY powerdown issues not fixed (bug 3596911).
+- NEW: Added EXT driver to the STM32F3xx platform.
+- NEW: Improved the STM32 EXT driver to support more than 32 channels.
 - NEW: Added support for Olimex board STM32-LCD.
 
 *** 2.5.1 ***