git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5432 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
060093508d
commit
95a19f5c76
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@ -243,28 +243,21 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
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}
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}
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/* Complementary output setup.*/
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/* Complementary output setup.*/
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/* switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_LOW,
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chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_LOW,
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"pwm_lld_start(), #1",
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"pwm_lld_start_submodule(), #2",
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"the PWM chB must be set in PWM_OUTPUT_ACTIVE_LOW");
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"the PWM chB must be set in PWM_OUTPUT_ACTIVE_LOW");
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//pwmp->flexpwmp->SUB[sid].OCTRL.B.POLA = 1;
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pwmp->flexpwmp->SUB[sid].OCTRL.B.POLA = 1;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->MCTRL.B.IPOL |= (0b0000 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKA |= (0b0000 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0b0000 | (1U << sid));
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//pwmp->flexpwmp->SUB[0].OCTRL.B.POLB = 0;
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break;
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break;
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_HIGH,
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chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_HIGH,
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"pwm_lld_start(), #2",
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"pwm_lld_start_submodule(), #3",
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"the PWM chB must be set in PWM_OUTPUT_ACTIVE_HIGH");
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"the PWM chB must be set in PWM_OUTPUT_ACTIVE_HIGH");
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->MCTRL.B.IPOL |= (0b0000 | (0U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKA |= (0b0000 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0b0000 | (1U << sid));
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// pwmp->flexpwmp->SUB[0].OCTRL.B.POLA = 0;
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//pwmp->flexpwmp->SUB[0].OCTRL.B.POLB = 1;
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break;
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break;
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default:
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default:
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;
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;
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@ -273,31 +266,24 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
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switch (pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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switch (pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
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chDbgAssert(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW,
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chDbgAssert(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW,
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"pwm_lld_start(), #3",
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"pwm_lld_start_submodule(), #4",
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"the PWM chA must be set in PWM_OUTPUT_ACTIVE_LOW");
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"the PWM chA must be set in PWM_OUTPUT_ACTIVE_LOW");
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->MCTRL.B.IPOL &= ~ (0b0000 | (1U << sid));
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pwmp->flexpwmp->MCTRL.B.IPOL &= ~ (0x0 | (1U << sid));
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// pwmp->flexpwmp->SUB[0].OCTRL.B.POLA = 0;
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pwmp->flexpwmp->SUB[sid].OCTRL.B.POLB = 1;
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pwmp->flexpwmp->SUB[sid].OCTRL.B.POLB = 1;
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pwmp->flexpwmp->MASK.B.MASKB |= (0b0000 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0b0000 | (1U << sid));
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break;
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break;
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
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chDbgAssert(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH,
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chDbgAssert(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH,
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"pwm_lld_start(), #4",
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"pwm_lld_start_submodule(), #5",
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"the PWM chA must be set in PWM_OUTPUT_ACTIVE_HIGH");
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"the PWM chA must be set in PWM_OUTPUT_ACTIVE_HIGH");
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
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pwmp->flexpwmp->MCTRL.B.IPOL &= ~ (0b0000 | (1U << sid));
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pwmp->flexpwmp->MCTRL.B.IPOL |= (0x0 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKB |= (0b0000 | (1U << sid));
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pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0b0000 | (1U << sid));
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// pwmp->flexpwmp->SUB[0].OCTRL.B.POLA = 1;
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// pwmp->flexpwmp->SUB[0].OCTRL.B.POLB = 0;
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break;
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break;
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default:
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default:
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;
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;
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}
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}
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*/
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/* Sets the INIT and MASK registers.*/
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/* Sets the INIT and MASK registers.*/
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pwmp->flexpwmp->SUB[sid].CTRL2.B.FRCEN = 1U;
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pwmp->flexpwmp->SUB[sid].CTRL2.B.FRCEN = 1U;
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@ -355,7 +341,11 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
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/* Removes the channel mask if it is necessary.*/
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/* Removes the channel mask if it is necessary.*/
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if ((pwmp->flexpwmp->MASK.B.MASKA & (0x0 | (1U << sid))) == 1)
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if ((pwmp->flexpwmp->MASK.B.MASKA & (0x0 | (1U << sid))) == 1)
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pwmp->flexpwmp->MASK.B.MASKA &= ~ (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKA &= ~(0x0 | (1U << sid));
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if ((pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
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pwmp->flexpwmp->MASK.B.MASKB &= ~(0x0 | (1U << sid));
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}
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}
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}
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/* Active the width interrupt.*/
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/* Active the width interrupt.*/
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else if (channel == 1) {
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else if (channel == 1) {
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@ -382,7 +372,11 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
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/* Removes the channel mask if it is necessary.*/
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/* Removes the channel mask if it is necessary.*/
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if ((pwmp->flexpwmp->MASK.B.MASKB & (0x0 | (1U << sid))) == 1)
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if ((pwmp->flexpwmp->MASK.B.MASKB & (0x0 | (1U << sid))) == 1)
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pwmp->flexpwmp->MASK.B.MASKB &= ~ (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKB &= ~(0x0 | (1U << sid));
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if ((pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
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pwmp->flexpwmp->MASK.B.MASKA &= ~(0x0 | (1U << sid));
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}
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}
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}
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/* Active the periodic interrupt.*/
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/* Active the periodic interrupt.*/
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@ -424,6 +418,11 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp,
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}
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}
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/* Active the channel mask.*/
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/* Active the channel mask.*/
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if ((pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
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pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
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}
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else
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pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
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}
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}
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/* Disable the width interrupt.*/
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/* Disable the width interrupt.*/
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@ -435,6 +434,11 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp,
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}
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}
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/* Active the channel mask.*/
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/* Active the channel mask.*/
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if ((pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
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pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
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}
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else
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pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
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pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
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}
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}
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