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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7405 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2014-10-16 10:37:40 +00:00
parent 005c573424
commit 8a0ff15114
2 changed files with 23 additions and 35 deletions
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4
os/rt/ports/ARM/chcore.h
View File

@ -275,14 +275,14 @@ struct context {
* @details This macro must be inserted at the end of all IRQ handlers * @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs. * enabled to invoke system APIs.
*/ */
#define PORT_IRQ_EPILOGUE() #define PORT_IRQ_EPILOGUE() return chSchIsPreemptionRequired()
/** /**
* @brief IRQ handler function declaration. * @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the * @note @p id can be a function name or a vector number depending on the
* port implementation. * port implementation.
*/ */
#define PORT_IRQ_HANDLER(id) void id(void) #define PORT_IRQ_HANDLER(id) bool id(void)
/** /**
* @brief Fast IRQ handler function declaration. * @brief Fast IRQ handler function declaration.

54
os/rt/ports/ARM/compilers/GCC/chcoreasm.s
View File

@ -147,26 +147,6 @@ _port_switch_arm:
* of a register holding the address of the ISR to be invoked, the ISR * of a register holding the address of the ISR to be invoked, the ISR
* then returns in the common epilogue code where the context switch will * then returns in the common epilogue code where the context switch will
* be performed, if required. * be performed, if required.
*/
.code 32
.func
.global Irq_Handler
Irq_Handler:
stmfd sp!, {r0-r3, r12, lr}
#if defined(THUMB_NO_INTERWORKING)
add r0, pc, #1
bx r0
.code 16
#endif
ldr r0, =ARM_IRQ_VECTOR_REG
ldr r0, [r0]
ldr lr, =_port_irq_common // ISR return point.
bx r0 // Calling the ISR.
.endfunc
/*
* Common exit point for all IRQ routines, it performs the rescheduling if
* required.
* System stack frame structure after a context switch in the * System stack frame structure after a context switch in the
* interrupt handler: * interrupt handler:
* *
@ -192,27 +172,35 @@ Irq_Handler:
* Low +------------+ * Low +------------+
*/ */
.balign 16 .balign 16
#if defined(THUMB_NO_INTERWORKING) .code 32
.func
.global Irq_Handler
Irq_Handler:
stmfd sp!, {r0-r3, r12, lr}
ldr r0, =ARM_IRQ_VECTOR_REG
ldr r0, [r0]
#if !defined(THUMB_NO_INTERWORKING)
ldr lr, =_irq_ret_arm // ISR return point.
bx r0 // Calling the ISR.
_irq_ret_arm:
#else /* defined(THUMB_NO_INTERWORKING) */
add r0, pc, #1
bx r0
.code 16 .code 16
.thumb_func ldr lr, =_irq_ret_thumb // ISR return point.
.globl _port_irq_common bx r0 // Calling the ISR.
_port_irq_common: _irq_ret_thumb:
bl chSchIsPreemptionRequired
mov lr, pc mov lr, pc
bx lr bx lr
.code 32 .code 32
#else /* !defined(THUMB_NO_INTERWORKING) */ #endif /* defined(THUMB_NO_INTERWORKING) */
.code 32
.func
.globl _port_irq_common
_port_irq_common:
bl chSchIsPreemptionRequired
#endif /* !defined(THUMB_NO_INTERWORKING) */
cmp r0, #0 cmp r0, #0
ldmeq sp!, {r0-r3, r12, lr} ldmeq sp!, {r0-r3, r12, lr}
subeqs pc, lr, #4 // No reschedule, returns. subeqs pc, lr, #4 // No reschedule, returns.
// Saves the IRQ mode registers in the system stack. // Now the frame is created in the system stack, the IRQ
// stack is empty.
msr CPSR_c, #MODE_SYS | I_BIT
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_IRQ | I_BIT msr CPSR_c, #MODE_IRQ | I_BIT
mrs r0, SPSR mrs r0, SPSR