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Integrated Liam's patch for Davicom 9161 PHY. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1207 35acf78f-673a-0410-8e92-d51de3d6d3f4
master
gdisirio 2009-10-10 07:49:34 +00:00
parent 660c9df44e
commit 88398a5e21
3 changed files with 25 additions and 9 deletions
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6
os/io/platforms/AT91SAM7X/mac_lld.c
View File

@ -174,16 +174,14 @@ void mac_lld_init(void) {
AT91C_EMAC_CLRSTAT;/* Initial NCR settings.*/ AT91C_EMAC_CLRSTAT;/* Initial NCR settings.*/
mac_lld_set_address(&ETH1, default_mac); mac_lld_set_address(&ETH1, default_mac);
#if PHY_HARDWARE == PHY_MICREL_KS8721
/* /*
* PHY device identification. * PHY device identification.
*/ */
AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE; AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE;
if ((miiGet(&ETH1, MII_PHYSID1) != (MII_KS8721_ID >> 16)) || if ((miiGet(&ETH1, MII_PHYSID1) != (PHY_ID >> 16)) ||
((miiGet(&ETH1, MII_PHYSID2) & 0xFFF0) != (MII_KS8721_ID & 0xFFF0))) ((miiGet(&ETH1, MII_PHYSID2) & 0xFFF0) != (PHY_ID & 0xFFF0)))
chSysHalt(); chSysHalt();
AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE; AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE;
#endif
/* /*
* Interrupt configuration. * Interrupt configuration.

6
os/io/platforms/AT91SAM7X/mii_lld.c
View File

@ -25,8 +25,8 @@
*/ */
#include <ch.h> #include <ch.h>
#include <mac.h>
#include <mii.h> #include <mii.h>
#include <mac.h>
/** /**
* @brief Low level MII driver initialization. * @brief Low level MII driver initialization.
@ -62,8 +62,12 @@ void mii_lld_reset(MACDriver *macp) {
*/ */
AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD_MASK; // Becomes an output. AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD_MASK; // Becomes an output.
AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD_MASK; // Default pullup disabled. AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD_MASK; // Default pullup disabled.
#if (PHY_HARDWARE == PHY_DAVICOM_9161)
AT91C_BASE_PIOB->PIO_CODR = PIOB_PHY_PD_MASK; // Output to low level.
#else
AT91C_BASE_PIOB->PIO_SODR = PIOB_PHY_PD_MASK; // Output to high level. AT91C_BASE_PIOB->PIO_SODR = PIOB_PHY_PD_MASK; // Output to high level.
#endif #endif
#endif // PIOB_PHY_PD_MASK
/* /*
* PHY reset by pulsing the NRST pin. * PHY reset by pulsing the NRST pin.

22
os/io/platforms/AT91SAM7X/mii_lld.h
View File

@ -27,6 +27,9 @@
#ifndef _MII_LLD_H_ #ifndef _MII_LLD_H_
#define _MII_LLD_H_ #define _MII_LLD_H_
#include <mii.h>
#include "board.h"
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */
/*===========================================================================*/ /*===========================================================================*/
@ -43,19 +46,30 @@
/*===========================================================================*/ /*===========================================================================*/
#define PHY_MICREL_KS8721 0 #define PHY_MICREL_KS8721 0
#define PHY_DAVICOM_9161 1
#if PHY_HARDWARE == PHY_MICREL_KS8721
#define PHY_ADDRESS 1
#endif
/** /**
* @brief Pins latched by the PHY at reset. * @brief Pins latched by the PHY at reset.
*/ */
#if (PHY_HARDWARE == PHY_MICREL_KS8721)
#define PHY_ADDRESS 1
#define PHY_ID MII_KS8721_ID
#define PHY_LATCHED_PINS (AT91C_PB4_ECRS | AT91C_PB5_ERX0 | \ #define PHY_LATCHED_PINS (AT91C_PB4_ECRS | AT91C_PB5_ERX0 | \
AT91C_PB6_ERX1 | AT91C_PB7_ERXER | \ AT91C_PB6_ERX1 | AT91C_PB7_ERXER | \
AT91C_PB13_ERX2 | AT91C_PB14_ERX3 | \ AT91C_PB13_ERX2 | AT91C_PB14_ERX3 | \
AT91C_PB15_ERXDV_ECRSDV | AT91C_PB16_ECOL | \ AT91C_PB15_ERXDV_ECRSDV | AT91C_PB16_ECOL | \
AT91C_PIO_PB26) AT91C_PIO_PB26)
#elif (PHY_HARDWARE == PHY_DAVICOM_9161)
#define PHY_ADDRESS 0
#define PHY_ID MII_DM9161_ID
#define PHY_LATCHED_PINS (AT91C_PB4_ECRS | AT91C_PB5_ERX0 | \
AT91C_PB6_ERX1 | AT91C_PB7_ERXER | \
AT91C_PB13_ERX2 | AT91C_PB14_ERX3 | \
AT91C_PB15_ERXDV_ECRSDV | AT91C_PB16_ECOL | \
AT91C_PB17_ERXCK)
#endif /* PHY_HARDWARE */
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */