diff --git a/demos/various/RT-ARM7-GENERIC/.cproject b/demos/various/RT-ARM7-GENERIC/.cproject
new file mode 100644
index 000000000..9b46e0d4b
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/.cproject
@@ -0,0 +1,52 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/demos/various/RT-ARM7-GENERIC/.project b/demos/various/RT-ARM7-GENERIC/.project
new file mode 100644
index 000000000..8fab5aa0f
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/.project
@@ -0,0 +1,90 @@
+
+
+ RT-ARM7-GENERIC
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+ ?name?
+
+
+
+ org.eclipse.cdt.make.core.append_environment
+ true
+
+
+ org.eclipse.cdt.make.core.autoBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.buildArguments
+ -j1
+
+
+ org.eclipse.cdt.make.core.buildCommand
+ make
+
+
+ org.eclipse.cdt.make.core.cleanBuildTarget
+ clean
+
+
+ org.eclipse.cdt.make.core.contents
+ org.eclipse.cdt.make.core.activeConfigSettings
+
+
+ org.eclipse.cdt.make.core.enableAutoBuild
+ false
+
+
+ org.eclipse.cdt.make.core.enableCleanBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enableFullBuild
+ true
+
+
+ org.eclipse.cdt.make.core.fullBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.stopOnError
+ true
+
+
+ org.eclipse.cdt.make.core.useDefaultBuildCmd
+ true
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ os
+ 2
+ CHIBIOS/os
+
+
+ test
+ 2
+ CHIBIOS/test
+
+
+
diff --git a/demos/various/RT-ARM7-GENERIC/Makefile b/demos/various/RT-ARM7-GENERIC/Makefile
new file mode 100644
index 000000000..1560b36e7
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/Makefile
@@ -0,0 +1,223 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the ARM System/User stack. This
+# stack is the stack used by the main() thread.
+ifeq ($(USE_SYSTEM_STACKSIZE),)
+ USE_SYSTEM_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM IRQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_IRQ_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM FIQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_FIQ_STACKSIZE),)
+ USE_FIQ_STACKSIZE = 64
+endif
+
+# Stack size to the allocated to the ARM Supervisor stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_SUPERVISOR_STACKSIZE),)
+ USE_SUPERVISOR_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Undefined stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_UND_STACKSIZE),)
+ USE_UND_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Abort stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_ABT_STACKSIZE),)
+ USE_ABT_STACKSIZE = 8
+endif
+
+# Enables the use of FPU.
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/rt/ports/ARM/compilers/GCC/mk/port_generic.mk
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+# List of the standard inclusion directories.
+INCDIR = $(PORTINC) $(KERNINC)
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = arm7tdmi
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+##############################################################################
+# MISRA check rule, requires PCLint and the setup files, not provided.
+#
+misra:
+ @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt
diff --git a/demos/various/RT-ARM7-GENERIC/armparams.h b/demos/various/RT-ARM7-GENERIC/armparams.h
new file mode 100644
index 000000000..7c3a26cb1
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/armparams.h
@@ -0,0 +1,65 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file armparams.h
+ * @brief Generic ARM parameters.
+ *
+ * @defgroup ARM_GENERIC Generic ARM Parameters
+ * @ingroup ARM_SPECIFIC
+ * @details This file contains the ARM specific parameters for the
+ * a generic platform.
+ * @{
+ */
+
+#ifndef _ARMPARAMS_H_
+#define _ARMPARAMS_H_
+
+/**
+ * @brief ARM core model.
+ */
+#define ARM_CORE ARM_CORE_ARM7TDMI
+
+/**
+ * @brief Thumb-capable.
+ */
+#define ARM_SUPPORTS_THUMB 1
+
+/**
+ * @brief Thumb2-capable.
+ */
+#define ARM_SUPPORTS_THUMB2 0
+
+/**
+ * @brief Implementation of the wait-for-interrupt state enter.
+ */
+#define ARM_WFI_IMPL
+
+#if !defined(__FROM_ASM__) || defined(__DOXYGEN__)
+/**
+ * @brief Address of the IRQ vector register in the interrupt controller.
+ */
+#define ARM_IRQ_VECTOR_REG 0xFFFFF030U
+#else
+#define ARM_IRQ_VECTOR_REG 0xFFFFF030
+#endif
+
+#endif /* _ARMPARAMS_H_ */
+
+/** @} */
diff --git a/demos/various/RT-ARM7-GENERIC/ch.ld b/demos/various/RT-ARM7-GENERIC/ch.ld
new file mode 100644
index 000000000..081996ad7
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/ch.ld
@@ -0,0 +1,29 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * Generic device memory setup, customize it for your device.
+ */
+MEMORY
+{
+ flash : org = 0x00000000, len = 512k - 12k
+ ram : org = 0x40000200, len = 32k - 0x200 - 288
+ ram1 : org = 0, len = 0
+ ram2 : org = 0, len = 0
+ ram3 : org = 0, len = 0
+}
+
+INCLUDE rules.ld
diff --git a/demos/various/RT-ARM7-GENERIC/chconf.h b/demos/various/RT-ARM7-GENERIC/chconf.h
new file mode 100644
index 000000000..441e5b109
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/chconf.h
@@ -0,0 +1,498 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 1000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 0
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop. */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM FALSE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_QUEUES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS TRUE
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS FALSE
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS FALSE
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS FALSE
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_TRACE FALSE
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS FALSE
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* Context switch code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/various/RT-ARM7-GENERIC/debug/RT-ARMCM0-GENERIC (OpenOCD, Flash and Run).launch b/demos/various/RT-ARM7-GENERIC/debug/RT-ARMCM0-GENERIC (OpenOCD, Flash and Run).launch
new file mode 100644
index 000000000..e136b6b24
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/debug/RT-ARMCM0-GENERIC (OpenOCD, Flash and Run).launch
@@ -0,0 +1,52 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/demos/various/RT-ARM7-GENERIC/main.c b/demos/various/RT-ARM7-GENERIC/main.c
new file mode 100644
index 000000000..fd6b6558e
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/main.c
@@ -0,0 +1,57 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+
+/*
+ * This is a periodic thread that does absolutely nothing except sleeping.
+ */
+static THD_WORKING_AREA(waThread1, 128);
+static THD_FUNCTION(Thread1, arg) {
+
+ (void)arg;
+
+ chRegSetThreadName("sleeper");
+
+ while (true) {
+ chThdSleepMilliseconds(1000);
+ }
+}
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ chSysInit();
+
+ /*
+ * Creates the example thread.
+ */
+ (void) chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ /*
+ * Normal main() thread activity, in this demo it just sleeps.
+ */
+ while (true) {
+ chThdSleepMilliseconds(1000);
+ }
+}
diff --git a/demos/various/RT-ARM7-GENERIC/readme.txt b/demos/various/RT-ARM7-GENERIC/readme.txt
new file mode 100644
index 000000000..b3feb7551
--- /dev/null
+++ b/demos/various/RT-ARM7-GENERIC/readme.txt
@@ -0,0 +1,17 @@
+*****************************************************************************
+** ChibiOS/RT port for ARM-Cortex-M0. **
+*****************************************************************************
+
+** TARGET **
+
+The demo targets a generic ARM Cortex-M4 device without HAL support.
+
+** The Demo **
+
+** Build Procedure **
+
+** Notes **
+
+The files ch.ld and cmparams.h must be customized for your device. You also
+need to provide the CMSIS compliant device header from your vendor, it this
+demo an ST header is used.
diff --git a/os/common/ports/ARM/devices/LPC214x/armparams.h b/os/common/ports/ARM/devices/LPC214x/armparams.h
index b57855e1c..05ce875ec 100644
--- a/os/common/ports/ARM/devices/LPC214x/armparams.h
+++ b/os/common/ports/ARM/devices/LPC214x/armparams.h
@@ -51,10 +51,14 @@
*/
#define ARM_WFI_IMPL (PCON = 1)
+#if !defined(__FROM_ASM__) || defined(__DOXYGEN__)
/**
* @brief Address of the IRQ vector register in the interrupt controller.
*/
+#define ARM_IRQ_VECTOR_REG 0xFFFFF030U
+#else
#define ARM_IRQ_VECTOR_REG 0xFFFFF030
+#endif
#endif /* _ARMPARAMS_H_ */
diff --git a/os/rt/ports/ARM/chcore.h b/os/rt/ports/ARM/chcore.h
index 2d672d7ac..9f255ccd2 100644
--- a/os/rt/ports/ARM/chcore.h
+++ b/os/rt/ports/ARM/chcore.h
@@ -120,6 +120,20 @@
#define ARM_ENABLE_WFI_IDLE FALSE
#endif
+/**
+ * @brief Enabled if in the system THUM code is used somewhere.
+ */
+#if !defined(THUMB_PRESENT)
+#define THUMB_PRESENT
+#endif
+
+/**
+ * @brief Enabled if THUMB interworking is not required.
+ */
+#if !defined(THUMB_NO_INTERWORKING)
+#define THUMB_NO_INTERWORKING
+#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -153,15 +167,15 @@
#error "unknown or unsupported ARM core"
#endif
-#if THUMB_PRESENT
-#if THUMB_NO_INTERWORKING
+#if defined(THUMB_PRESENT)
+#if defined(THUMB_NO_INTERWORKING)
#define PORT_INFO "Pure THUMB mode"
-#else /* !THUMB_NO_INTERWORKING */
+#else
#define PORT_INFO "Interworking mode"
-#endif /* !THUMB_NO_INTERWORKING */
-#else /* !THUMB_PRESENT */
+#endif
+#else
#define PORT_INFO "Pure ARM mode"
-#endif /* !THUMB_PRESENT */
+#endif
#endif /* !defined(_FROM_ASM_) */
@@ -293,33 +307,33 @@ struct context {
* @param[in] ntp the thread to be switched in
* @param[in] otp the thread to be switched out
*/
-#ifdef THUMB
+#if defined(THUMB)
-#if CH_DBG_ENABLE_STACK_CHECK
+#if CH_DBG_ENABLE_STACK_CHECK == TRUE
#define port_switch(ntp, otp) { \
register struct port_intctx *r13 asm ("r13"); \
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
chSysHalt("stack overflow"); \
_port_switch_thumb(ntp, otp); \
}
-#else /* !CH_DBG_ENABLE_STACK_CHECK */
+#else
#define port_switch(ntp, otp) _port_switch_thumb(ntp, otp)
-#endif /* !CH_DBG_ENABLE_STACK_CHECK */
+#endif
-#else /* !THUMB */
+#else /* !defined(THUMB) */
-#if CH_DBG_ENABLE_STACK_CHECK
+#if CH_DBG_ENABLE_STACK_CHECK == TRUE
#define port_switch(ntp, otp) { \
register struct port_intctx *r13 asm ("r13"); \
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
chSysHalt("stack overflow"); \
_port_switch_arm(ntp, otp); \
}
-#else /* !CH_DBG_ENABLE_STACK_CHECK */
+#else
#define port_switch(ntp, otp) _port_switch_arm(ntp, otp)
-#endif /* !CH_DBG_ENABLE_STACK_CHECK */
+#endif
-#endif /* !THUMB */
+#endif /* !defined(THUMB) */
/*===========================================================================*/
/* External declarations. */
@@ -328,10 +342,10 @@ struct context {
#ifdef __cplusplus
extern "C" {
#endif
-#ifdef THUMB_PRESENT
+#if defined(THUMB_PRESENT)
syssts_t _port_get_cpsr(void);
#endif
-#ifdef THUMB
+#if defined(THUMB)
void _port_switch_thumb(thread_t *ntp, thread_t *otp);
#else
void _port_switch_arm(thread_t *ntp, thread_t *otp);
@@ -360,12 +374,14 @@ static inline void port_init(void) {
static inline syssts_t port_get_irq_status(void) {
syssts_t sts;
-#ifdef THUMB
+#if defined(THUMB)
sts = _port_get_cpsr();
#else
- asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
+ __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
#endif
+ /*lint -save -e530 [9.1] Asm instruction not seen by lint.*/
return sts;
+ /*lint -restore*/
}
/**
@@ -379,7 +395,7 @@ static inline syssts_t port_get_irq_status(void) {
*/
static inline bool port_irq_enabled(syssts_t sts) {
- return (sts & 0x80) == 0;
+ return (sts & (syssts_t)0x80) == (syssts_t)0;
}
/**
@@ -392,13 +408,15 @@ static inline bool port_irq_enabled(syssts_t sts) {
static inline bool port_is_isr_context(void) {
syssts_t sts;
-#ifdef THUMB
+#if defined(THUMB)
sts = _port_get_cpsr();
#else
- asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
+ __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
#endif
- return (sts & 0x1F) == 0x12;
+ /*lint -save -e530 [9.1] Asm instruction not seen by lint.*/
+ return (sts & (syssts_t)0x1F) == (syssts_t)0x12;
+ /*lint -restore*/
}
/**
@@ -408,10 +426,10 @@ static inline bool port_is_isr_context(void) {
*/
static inline void port_lock(void) {
-#ifdef THUMB
- asm volatile ("bl _port_lock_thumb" : : : "r3", "lr", "memory");
+#if defined(THUMB)
+ __asm volatile ("bl _port_lock_thumb" : : : "r3", "lr", "memory");
#else
- asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
+ __asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
#endif
}
@@ -421,10 +439,10 @@ static inline void port_lock(void) {
*/
static inline void port_unlock(void) {
-#ifdef THUMB
- asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr", "memory");
+#if defined(THUMB)
+ __asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr", "memory");
#else
- asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
+ __asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
#endif
}
@@ -452,10 +470,10 @@ static inline void port_unlock_from_isr(void) {
*/
static inline void port_disable(void) {
-#ifdef THUMB
- asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory");
+#if defined(THUMB)
+ __asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory");
#else
- asm volatile ("mrs r3, CPSR \n\t"
+ __asm volatile ("mrs r3, CPSR \n\t"
"orr r3, #0x80 \n\t"
"msr CPSR_c, r3 \n\t"
"orr r3, #0x40 \n\t"
@@ -471,10 +489,10 @@ static inline void port_disable(void) {
*/
static inline void port_suspend(void) {
-#ifdef THUMB
- asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr", "memory");
+#if defined(THUMB)
+ __asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr", "memory");
#else
- asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
+ __asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
#endif
}
@@ -484,10 +502,10 @@ static inline void port_suspend(void) {
*/
static inline void port_enable(void) {
-#ifdef THUMB
- asm volatile ("bl _port_enable_thumb" : : : "r3", "lr", "memory");
+#if defined(THUMB)
+ __asm volatile ("bl _port_enable_thumb" : : : "r3", "lr", "memory");
#else
- asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
+ __asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
#endif
}
@@ -501,13 +519,13 @@ static inline void port_enable(void) {
*/
static inline void port_wait_for_interrupt(void) {
-#if ARM_ENABLE_WFI_IDLE
+#if ARM_ENABLE_WFI_IDLE == TRUE
ARM_WFI_IMPL;
#endif
}
#if CH_CFG_ST_TIMEDELTA > 0
-#if !PORT_USE_ALT_TIMER
+#if PORT_USE_ALT_TIMER == FALSE
#include "chcore_timer.h"
#else /* PORT_USE_ALT_TIMER */
#include "chcore_timer_alt.h"
diff --git a/os/rt/ports/ARM/compilers/GCC/mk/port_generic.mk b/os/rt/ports/ARM/compilers/GCC/mk/port_generic.mk
new file mode 100644
index 000000000..136e8a0ec
--- /dev/null
+++ b/os/rt/ports/ARM/compilers/GCC/mk/port_generic.mk
@@ -0,0 +1,9 @@
+# List of the ChibiOS/RT ARM generic port files.
+PORTSRC = ${CHIBIOS}/os/rt/ports/ARM/chcore.c
+
+PORTASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/vectors.s \
+ $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/crt0.s \
+ $(CHIBIOS)/os/rt/ports/ARM/compilers/GCC/chcoreasm.s
+
+PORTINC = ${CHIBIOS}/os/rt/ports/ARM \
+ ${CHIBIOS}/os/rt/ports/ARM/compilers/GCC
diff --git a/os/rt/ports/ARM/compilers/GCC/mk/port_lpc214x.mk b/os/rt/ports/ARM/compilers/GCC/mk/port_lpc214x.mk
index 68ea1cdf7..84db3c923 100644
--- a/os/rt/ports/ARM/compilers/GCC/mk/port_lpc214x.mk
+++ b/os/rt/ports/ARM/compilers/GCC/mk/port_lpc214x.mk
@@ -1,4 +1,4 @@
-# List of the ChibiOS/RT Cortex-M3 STM32F1xx port files.
+# List of the ChibiOS/RT ARM LPC214x port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/ARM/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/vectors.s \