diff --git a/demos/various/NIL-ARMCM0-GENERIC/.cproject b/demos/various/NIL-ARMCM0-GENERIC/.cproject
new file mode 100644
index 000000000..57cc581e4
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/.cproject
@@ -0,0 +1,52 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/demos/various/NIL-ARMCM0-GENERIC/.project b/demos/various/NIL-ARMCM0-GENERIC/.project
new file mode 100644
index 000000000..8746134cb
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/.project
@@ -0,0 +1,95 @@
+
+
+ NIL-ARMCM0-GENERIC
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+ ?name?
+
+
+
+ org.eclipse.cdt.make.core.append_environment
+ true
+
+
+ org.eclipse.cdt.make.core.autoBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.buildArguments
+
+
+
+ org.eclipse.cdt.make.core.buildCommand
+ mingw32-make
+
+
+ org.eclipse.cdt.make.core.cleanBuildTarget
+ clean
+
+
+ org.eclipse.cdt.make.core.contents
+ org.eclipse.cdt.make.core.activeConfigSettings
+
+
+ org.eclipse.cdt.make.core.enableAutoBuild
+ false
+
+
+ org.eclipse.cdt.make.core.enableCleanBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enableFullBuild
+ true
+
+
+ org.eclipse.cdt.make.core.fullBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.stopOnError
+ true
+
+
+ org.eclipse.cdt.make.core.useDefaultBuildCmd
+ false
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ board
+ 2
+ CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY
+
+
+ os
+ 2
+ CHIBIOS/os
+
+
+ test
+ 2
+ CHIBIOS/test
+
+
+
diff --git a/demos/various/NIL-ARMCM0-GENERIC/Makefile b/demos/various/NIL-ARMCM0-GENERIC/Makefile
new file mode 100644
index 000000000..ded63b68a
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/Makefile
@@ -0,0 +1,196 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+ USE_PROCESS_STACKSIZE = 0x100
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/os/nil/nil.mk
+include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm0.mk
+
+# Define linker script file here
+LDSCRIPT = ch.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC)
+
+# Make this point to your CMSIS device file.
+INCDIR += $(CHIBIOS)/os/ext/CMSIS/ST
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m0
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+##############################################################################
+# MISRA check rule, requires PCLint and the setup files, not provided.
+#
+misra:
+ @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt
diff --git a/demos/various/NIL-ARMCM0-GENERIC/ch.ld b/demos/various/NIL-ARMCM0-GENERIC/ch.ld
new file mode 100644
index 000000000..2acdc3297
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/ch.ld
@@ -0,0 +1,26 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * Generic device memory setup, customize it for your device.
+ */
+MEMORY
+{
+ flash : org = 0x08000000, len = 64k
+ ram : org = 0x20000000, len = 8k
+}
+
+INCLUDE rules.ld
diff --git a/demos/various/NIL-ARMCM0-GENERIC/cmparams.h b/demos/various/NIL-ARMCM0-GENERIC/cmparams.h
new file mode 100644
index 000000000..420f49dda
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/cmparams.h
@@ -0,0 +1,66 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file cmparams.h
+ * @brief ARM Cortex-M4 parameters.
+ *
+ * @defgroup ARMCMx_ARMCM4 ARM Cortex-M4 Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for a
+ * generic platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL CORTEX_M0
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU 0
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 2
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 32
+
+#if !defined(_FROM_ASM_)
+
+/*
+ * Replace the following inclusion with your vendor-provided CMSIS
+ * device file.
+ */
+#define STM32F051x8
+#include "stm32f0xx.h"
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/demos/various/NIL-ARMCM0-GENERIC/debug/NIL-ARMC0-GENERIC (OpenOCD, Flash and Run).launch b/demos/various/NIL-ARMCM0-GENERIC/debug/NIL-ARMC0-GENERIC (OpenOCD, Flash and Run).launch
new file mode 100644
index 000000000..4ca089dd3
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/debug/NIL-ARMC0-GENERIC (OpenOCD, Flash and Run).launch
@@ -0,0 +1,52 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/demos/various/NIL-ARMCM0-GENERIC/main.c b/demos/various/NIL-ARMCM0-GENERIC/main.c
new file mode 100644
index 000000000..20af5d493
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/main.c
@@ -0,0 +1,58 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "nil.h"
+
+/*
+ * Blinker thread #1.
+ */
+static THD_WORKING_AREA(waThread1, 128);
+static THD_FUNCTION(Thread1, arg) {
+
+ (void)arg;
+
+ while (true) {
+ chThdSleepMilliseconds(1000);
+ }
+}
+
+/*
+ * Threads static table, one entry per thread. The number of entries must
+ * match NIL_CFG_NUM_THREADS.
+ */
+THD_TABLE_BEGIN
+ THD_TABLE_ENTRY(waThread1, "sleeper", Thread1, NULL)
+THD_TABLE_END
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ chSysInit();
+
+ /* This is now the idle thread loop, you may perform here a low priority
+ task but you must never try to sleep or wait in this loop. Note that
+ this tasks runs at the lowest priority level so any instruction added
+ here will be executed after all other tasks have been started.*/
+ while (true) {
+ }
+}
diff --git a/demos/various/NIL-ARMCM0-GENERIC/misra.txt b/demos/various/NIL-ARMCM0-GENERIC/misra.txt
new file mode 100644
index 000000000..1debaa068
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/misra.txt
@@ -0,0 +1,28 @@
+PC-lint for C/C++ (NT) Vers. 9.00L, Copyright Gimpel Software 1985-2014
+_
+}
+..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c 371 Warning 438: Last
+ value assigned to variable 'psp' (defined at line 274) not used [MISRA 2012
+ Rule 2.2, required]
+..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c 371 Warning 438: Last
+ value assigned to variable 'reg' (defined at line 274) not used [MISRA 2012
+ Rule 2.2, required]
+..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c 371 Warning 550: Symbol
+ 'psp' (line 274) not accessed
+..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c 371 Warning 550: Symbol
+ 'reg' (line 274) not accessed
+ _
+extern uint32_t __main_stack_end__;
+..\..\..\os\common\ports\ARMCMx\compilers\GCC\vectors.c 85 Note 9004:
+ object/function '__main_stack_end__' previously declared [MISRA 2012 Rule
+ 8.5, required]
+ _
+int main(void) {
+main.c 43 Error 18: Symbol 'main(void)' redeclared (void/nonvoid) conflicts
+ with line 218, file ..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c
+ [MISRA 2012 Rule 8.2, required], [MISRA 2012 Rule 8.3, required]
+main.c 43 Note 9075: external symbol 'main(void)' defined without a prior
+ declaration [MISRA 2012 Rule 8.4, required]
+main.c 43 Warning 532: Return mode of function 'main(void)' inconsistent with
+ line 218, file ..\..\..\os\common\ports\ARMCMx\compilers\GCC\crt0.c [MISRA
+ 2012 Rule 8.3, required]
diff --git a/demos/various/NIL-ARMCM0-GENERIC/nilconf.h b/demos/various/NIL-ARMCM0-GENERIC/nilconf.h
new file mode 100644
index 000000000..6718e19ff
--- /dev/null
+++ b/demos/various/NIL-ARMCM0-GENERIC/nilconf.h
@@ -0,0 +1,179 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file nilconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _NILCONF_H_
+#define _NILCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Number of user threads in the application.
+ * @note This number is not inclusive of the idle thread which is
+ * Implicitly handled.
+ */
+#define NIL_CFG_NUM_THREADS 1
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System timer settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define NIL_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @note This value together with the @p NIL_CFG_ST_RESOLUTION
+ * option defines the maximum amount of time allowed for
+ * timeouts.
+ */
+#define NIL_CFG_ST_FREQUENCY 1000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define NIL_CFG_ST_TIMEDELTA 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define NIL_CFG_USE_EVENTS TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System assertions.
+ */
+#define NIL_CFG_ENABLE_ASSERTS FALSE
+
+/**
+ * @brief Stack check.
+ */
+#define NIL_CFG_ENABLE_STACK_CHECK FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System initialization hook.
+ */
+#if !defined(NIL_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
+#define NIL_CFG_SYSTEM_INIT_HOOK() { \
+}
+#endif
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define NIL_CFG_THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ */
+#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) { \
+ /* Add custom threads initialization code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define NIL_CFG_IDLE_ENTER_HOOK() { \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define NIL_CFG_IDLE_LEAVE_HOOK() { \
+}
+
+/**
+ * @brief System halt hook.
+ */
+#if !defined(NIL_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define NIL_CFG_SYSTEM_HALT_HOOK(reason) { \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in nilcore.h). */
+/*===========================================================================*/
+
+#endif /* _NILCONF_H_ */
+
+/** @} */
diff --git a/demos/various/NIL-ARMCM4-GENERIC/Makefile b/demos/various/NIL-ARMCM4-GENERIC/Makefile
index 305cba9b0..299754ac6 100644
--- a/demos/various/NIL-ARMCM4-GENERIC/Makefile
+++ b/demos/various/NIL-ARMCM4-GENERIC/Makefile
@@ -82,7 +82,7 @@ PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../..
include $(CHIBIOS)/os/nil/nil.mk
-include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic.mk
+include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm4.mk
# Define linker script file here
LDSCRIPT = ch.ld
diff --git a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm0.mk b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm0.mk
new file mode 100644
index 000000000..3561841ef
--- /dev/null
+++ b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm0.mk
@@ -0,0 +1,11 @@
+# List of the ChibiOS/NIL Cortex-M0 generic port files.
+PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \
+ $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore.c \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore_v6m.c
+
+PORTASM = $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/nilcoreasm_v6m.s
+
+PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
+ ${CHIBIOS}/os/nil/ports/ARMCMx \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/compilers/GCC
diff --git a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm4.mk b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm4.mk
new file mode 100644
index 000000000..81179a65b
--- /dev/null
+++ b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_generic_cm4.mk
@@ -0,0 +1,11 @@
+# List of the ChibiOS/NIL Cortex-M4 generic port files.
+PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \
+ $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore.c \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore_v7m.c
+
+PORTASM = $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/nilcoreasm_v7m.s
+
+PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \
+ ${CHIBIOS}/os/nil/ports/ARMCMx \
+ ${CHIBIOS}/os/nil/ports/ARMCMx/compilers/GCC