From 8579b5559cb2501dd8d0f56ab42f9209a3860c58 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 2 Oct 2012 12:41:17 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4731 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC560Pxx/hal_lld.c | 20 ++++++++++- os/hal/platforms/SPC560Pxx/hal_lld.h | 33 ++++++++++--------- .../platforms/SPC5xx/LINFlex_v1/serial_lld.c | 12 ++++--- .../platforms/SPC5xx/LINFlex_v1/serial_lld.h | 24 +++++++------- 4 files changed, 56 insertions(+), 33 deletions(-) diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.c b/os/hal/platforms/SPC560Pxx/hal_lld.c index 822e75cb2..de1467e97 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.c +++ b/os/hal/platforms/SPC560Pxx/hal_lld.c @@ -92,7 +92,8 @@ void hal_lld_init(void) { to run in DRUN,RUN0...RUN3 and HALT0 modes, the clock is gated in other modes.*/ INTC.PSR[127].R = SPC5_PIT3_IRQ_PRIORITY; - ME.PCTL[92].R = SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2); + halSPC560PSetPeripheralClockMode(92, + SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2)); reg = halSPC560PGetSystemClock() / CH_FREQUENCY - 1; PIT.PITMCR.R = 1; /* PIT clock enabled, stop while debugging. */ PIT.CH[3].LDVAL.R = reg; @@ -207,6 +208,23 @@ bool_t halSPC560PSetRunMode(spc560prunmode_t mode) { return CH_SUCCESS; } +/** + * @brief Changes the clock mode of a peripheral. + * + * @param[in] n index of the @p PCTL register + * @param[in] pctl new value for the @p PCTL register + * + * @notapi + */ +void halSPC560PSetPeripheralClockMode(uint32_t n, uint32_t pctl) { + uint32_t mode; + + ME.PCTL[n].R = pctl; + mode = ME.MCTL.B.TARGET_MODE; + ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY; + ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY_INV; +} + #if !SPC5_NO_INIT || defined(__DOXYGEN__) /** * @brief Returns the system clock under the current run mode. diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.h b/os/hal/platforms/SPC560Pxx/hal_lld.h index f02194c2e..fcd94fd9e 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.h +++ b/os/hal/platforms/SPC560Pxx/hal_lld.h @@ -416,11 +416,20 @@ /** * @brief Peripheral mode 0 (run mode). - * @note Do not change this setting, it is expected to be the "always run" + * @note Do not change this setting, it is expected to be the "never run" * mode. */ #if !defined(SPC5_ME_RUN_PC0_BITS) || defined(__DOXYGEN__) -#define SPC5_ME_RUN_PC0_BITS (SPC5_ME_RUN_PC_TEST | \ +#define SPC5_ME_RUN_PC0_BITS 0 +#endif + +/** + * @brief Peripheral mode 1 (run mode). + * @note Do not change this setting, it is expected to be the "always run" + * mode. + */ +#if !defined(SPC5_ME_RUN_PC1_BITS) || defined(__DOXYGEN__) +#define SPC5_ME_RUN_PC1_BITS (SPC5_ME_RUN_PC_TEST | \ SPC5_ME_RUN_PC_SAFE | \ SPC5_ME_RUN_PC_DRUN | \ SPC5_ME_RUN_PC_RUN0 | \ @@ -429,15 +438,6 @@ SPC5_ME_RUN_PC_RUN3) #endif -/** - * @brief Peripheral mode 1 (run mode). - * @note Do not change this setting, it is expected to be the "never run" - * mode. - */ -#if !defined(SPC5_ME_RUN_PC1_BITS) || defined(__DOXYGEN__) -#define SPC5_ME_RUN_PC1_BITS 0 -#endif - /** * @brief Peripheral mode 2 (run mode). * @note Do not change this setting, it is expected to be the "only during @@ -508,21 +508,21 @@ /** * @brief Peripheral mode 0 (low power mode). - * @note Do not change this setting, it is expected to be the "always run" + * @note Do not change this setting, it is expected to be the "never run" * mode. */ #if !defined(SPC5_ME_LP_PC0_BITS) || defined(__DOXYGEN__) -#define SPC5_ME_LP_PC0_BITS (SPC5_ME_LP_PC_HALT0 | \ - SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC0_BITS 0 #endif /** * @brief Peripheral mode 1 (low power mode). - * @note Do not change this setting, it is expected to be the "never run" + * @note Do not change this setting, it is expected to be the "always run" * mode. */ #if !defined(SPC5_ME_LP_PC1_BITS) || defined(__DOXYGEN__) -#define SPC5_ME_LP_PC1_BITS 0 +#define SPC5_ME_LP_PC1_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) #endif /** @@ -720,6 +720,7 @@ extern "C" { void hal_lld_init(void); void spc560p_clock_init(void); bool_t halSPC560PSetRunMode(spc560prunmode_t mode); + void halSPC560PSetPeripheralClockMode(uint32_t n, uint32_t pctl); #if !SPC5_NO_INIT uint32_t halSPC560PGetSystemClock(void); #endif diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c index a84dfc815..92c1c1a1d 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c @@ -363,12 +363,14 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (sdp->state == SD_STOP) { #if SPC5_SERIAL_USE_LINFLEX0 if (&SD1 == sdp) { - ME.PCTL[SPC5_LINFLEX0_PCTL].R = SPC5_SERIAL_LINFLEX0_START_PCTL; + halSPC560PSetPeripheralClockMode(SPC5_LINFLEX0_PCTL, + SPC5_SERIAL_LINFLEX0_START_PCTL); } #endif #if SPC5_SERIAL_USE_LINFLEX1 if (&SD2 == sdp) { - ME.PCTL[SPC5_LINFLEX1_PCTL].R = SPC5_SERIAL_LINFLEX1_START_PCTL; + halSPC560PSetPeripheralClockMode(SPC5_LINFLEX1_PCTL, + SPC5_SERIAL_LINFLEX1_START_PCTL); } #endif } @@ -389,13 +391,15 @@ void sd_lld_stop(SerialDriver *sdp) { #if SPC5_SERIAL_USE_LINFLEX0 if (&SD1 == sdp) { - ME.PCTL[SPC5_LINFLEX0_PCTL].R = SPC5_SERIAL_LINFLEX0_STOP_PCTL; + halSPC560PSetPeripheralClockMode(SPC5_LINFLEX0_PCTL, + SPC5_SERIAL_LINFLEX0_STOP_PCTL); return; } #endif #if SPC5_SERIAL_USE_LINFLEX1 if (&SD2 == sdp) { - ME.PCTL[SPC5_LINFLEX1_PCTL].R = SPC5_SERIAL_LINFLEX1_STOP_PCTL; + halSPC560PSetPeripheralClockMode(SPC5_LINFLEX1_PCTL, + SPC5_SERIAL_LINFLEX1_STOP_PCTL); return; } #endif diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h index 71287b484..8982566a9 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h @@ -135,46 +135,46 @@ /** * @brief LINFlex-0 peripheral configuration when started. - * @note The default configuration is 0 (always run) in run mode and + * @note The default configuration is 1 (always run) in run mode and * 2 (only halt) in low power mode. The defaults of the run modes * are defined in @p hal_lld.h. */ #if !defined(SPC5_SERIAL_LINFLEX0_START_PCTL) || defined(__DOXYGEN__) -#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(0) | \ +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #endif /** * @brief LINFlex-0 peripheral configuration when stopped. - * @note The default configuration is 1 (never run) in run mode and - * 1 (never run) in low power mode. The defaults of the run modes + * @note The default configuration is 0 (never run) in run mode and + * 0 (never run) in low power mode. The defaults of the run modes * are defined in @p hal_lld.h. */ #if !defined(SPC5_SERIAL_LINFLEX0_STOP_PCTL) || defined(__DOXYGEN__) -#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(1) | \ - SPC5_ME_PCTL_LP(1)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) #endif /** * @brief LINFlex-1 peripheral configuration when started. - * @note The default configuration is 0 (always run) in run mode and + * @note The default configuration is 1 (always run) in run mode and * 2 (only halt) in low power mode. The defaults of the run modes * are defined in @p hal_lld.h. */ #if !defined(SPC5_SERIAL_LINFLEX1_START_PCTL) || defined(__DOXYGEN__) -#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(0) | \ +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #endif /** * @brief LINFlex-1 peripheral configuration when stopped. - * @note The default configuration is 1 (never run) in run mode and - * 1 (never run) in low power mode. The defaults of the run modes + * @note The default configuration is 0 (never run) in run mode and + * 0 (never run) in low power mode. The defaults of the run modes * are defined in @p hal_lld.h. */ #if !defined(SPC5_SERIAL_LINFLEX1_STOP_PCTL) || defined(__DOXYGEN__) -#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(1) | \ - SPC5_ME_PCTL_LP(1)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) #endif /*===========================================================================*/