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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3504 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2011-11-16 21:21:28 +00:00
parent d70b7e5992
commit 83d562f6b2
2 changed files with 13 additions and 7 deletions
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8
os/hal/include/adc.h
View File

@ -134,15 +134,15 @@ typedef enum {
* @notapi * @notapi
*/ */
#define _adc_wakeup_isr(adcp) { \ #define _adc_wakeup_isr(adcp) { \
chSysLockFromIsr(); \
if ((adcp)->thread != NULL) { \ if ((adcp)->thread != NULL) { \
Thread *tp; \ Thread *tp; \
chSysLockFromIsr(); \
tp = (adcp)->thread; \ tp = (adcp)->thread; \
(adcp)->thread = NULL; \ (adcp)->thread = NULL; \
tp->p_u.rdymsg = RDY_OK; \ tp->p_u.rdymsg = RDY_OK; \
chSchReadyI(tp); \ chSchReadyI(tp); \
chSysUnlockFromIsr(); \
} \ } \
chSysUnlockFromIsr(); \
} }
/** /**
@ -153,15 +153,15 @@ typedef enum {
* @notapi * @notapi
*/ */
#define _adc_timeout_isr(adcp) { \ #define _adc_timeout_isr(adcp) { \
chSysLockFromIsr(); \
if ((adcp)->thread != NULL) { \ if ((adcp)->thread != NULL) { \
Thread *tp; \ Thread *tp; \
chSysLockFromIsr(); \
tp = (adcp)->thread; \ tp = (adcp)->thread; \
(adcp)->thread = NULL; \ (adcp)->thread = NULL; \
tp->p_u.rdymsg = RDY_TIMEOUT; \ tp->p_u.rdymsg = RDY_TIMEOUT; \
chSchReadyI(tp); \ chSchReadyI(tp); \
chSysUnlockFromIsr(); \
} \ } \
chSysUnlockFromIsr(); \
} }
#else /* !ADC_USE_WAIT */ #else /* !ADC_USE_WAIT */

12
os/hal/platforms/STM32F4xx/adc_lld.c
View File

@ -170,9 +170,11 @@ void adc_lld_init(void) {
ADCD1.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC1_DMA_STREAM); ADCD1.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC1_DMA_STREAM);
ADCD1.dmamode = STM32_DMA_CR_CHSEL(ADC1_DMA_CHANNEL) | ADCD1.dmamode = STM32_DMA_CR_CHSEL(ADC1_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC1_DMA_PRIORITY) | STM32_DMA_CR_PL(STM32_ADC_ADC1_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
STM32_DMA_CR_EN;
#endif #endif
#if STM32_ADC_USE_ADC2 #if STM32_ADC_USE_ADC2
@ -182,9 +184,11 @@ void adc_lld_init(void) {
ADCD2.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC2_DMA_STREAM); ADCD2.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC2_DMA_STREAM);
ADCD2.dmamode = STM32_DMA_CR_CHSEL(ADC2_DMA_CHANNEL) | ADCD2.dmamode = STM32_DMA_CR_CHSEL(ADC2_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC2_DMA_PRIORITY) | STM32_DMA_CR_PL(STM32_ADC_ADC2_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
STM32_DMA_CR_EN;
#endif #endif
#if STM32_ADC_USE_ADC3 #if STM32_ADC_USE_ADC3
@ -194,9 +198,11 @@ void adc_lld_init(void) {
ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM); ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM);
ADCD3.dmamode = STM32_DMA_CR_CHSEL(ADC3_DMA_CHANNEL) | ADCD3.dmamode = STM32_DMA_CR_CHSEL(ADC3_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) | STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
STM32_DMA_CR_EN;
#endif #endif
/* The shared vector is initialized on driver initialization and never /* The shared vector is initialized on driver initialization and never