From 83d562f6b2842c4ec03ff08662ddc629ccc4e424 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 16 Nov 2011 21:21:28 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3504 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/adc.h | 8 ++++---- os/hal/platforms/STM32F4xx/adc_lld.c | 12 +++++++++--- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/os/hal/include/adc.h b/os/hal/include/adc.h index ff9e6b18f..9ebe3754c 100644 --- a/os/hal/include/adc.h +++ b/os/hal/include/adc.h @@ -134,15 +134,15 @@ typedef enum { * @notapi */ #define _adc_wakeup_isr(adcp) { \ + chSysLockFromIsr(); \ if ((adcp)->thread != NULL) { \ Thread *tp; \ - chSysLockFromIsr(); \ tp = (adcp)->thread; \ (adcp)->thread = NULL; \ tp->p_u.rdymsg = RDY_OK; \ chSchReadyI(tp); \ - chSysUnlockFromIsr(); \ } \ + chSysUnlockFromIsr(); \ } /** @@ -153,15 +153,15 @@ typedef enum { * @notapi */ #define _adc_timeout_isr(adcp) { \ + chSysLockFromIsr(); \ if ((adcp)->thread != NULL) { \ Thread *tp; \ - chSysLockFromIsr(); \ tp = (adcp)->thread; \ (adcp)->thread = NULL; \ tp->p_u.rdymsg = RDY_TIMEOUT; \ chSchReadyI(tp); \ - chSysUnlockFromIsr(); \ } \ + chSysUnlockFromIsr(); \ } #else /* !ADC_USE_WAIT */ diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c index 97d1623d8..69cef5d57 100644 --- a/os/hal/platforms/STM32F4xx/adc_lld.c +++ b/os/hal/platforms/STM32F4xx/adc_lld.c @@ -170,9 +170,11 @@ void adc_lld_init(void) { ADCD1.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC1_DMA_STREAM); ADCD1.dmamode = STM32_DMA_CR_CHSEL(ADC1_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_ADC_ADC1_DMA_PRIORITY) | + STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | - STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; + STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | + STM32_DMA_CR_EN; #endif #if STM32_ADC_USE_ADC2 @@ -182,9 +184,11 @@ void adc_lld_init(void) { ADCD2.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC2_DMA_STREAM); ADCD2.dmamode = STM32_DMA_CR_CHSEL(ADC2_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_ADC_ADC2_DMA_PRIORITY) | + STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | - STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; + STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | + STM32_DMA_CR_EN; #endif #if STM32_ADC_USE_ADC3 @@ -194,9 +198,11 @@ void adc_lld_init(void) { ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM); ADCD3.dmamode = STM32_DMA_CR_CHSEL(ADC3_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) | + STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | - STM32_DMA_CR_TEIE | STM32_DMA_CR_EN; + STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | + STM32_DMA_CR_EN; #endif /* The shared vector is initialized on driver initialization and never