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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5644 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2013-04-29 09:23:58 +00:00
parent 9bbb4ac554
commit 7f4de1c13e
3 changed files with 61 additions and 46 deletions
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12
docs/reports/SPC56EL60-120.txt
View File

@ -6,7 +6,7 @@ Settings: SYSCLK=120
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.5.2unstable *** Kernel: 2.5.2unstable
*** Compiled: Apr 29 2013 - 09:53:43 *** Compiled: Apr 29 2013 - 11:20:37
*** Compiler: GCC 4.6.3 build on 2013-01-07 *** Compiler: GCC 4.6.3 build on 2013-01-07
*** Architecture: Power Architecture *** Architecture: Power Architecture
*** Core Variant: e200z4 *** Core Variant: e200z4
@ -100,7 +100,7 @@ Settings: SYSCLK=120
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1) --- Test Case 11.1 (Benchmark, messages #1)
--- Score : 379276 msgs/S, 758552 ctxswc/S --- Score : 379277 msgs/S, 758554 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2) --- Test Case 11.2 (Benchmark, messages #2)
@ -108,7 +108,7 @@ Settings: SYSCLK=120
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3) --- Test Case 11.3 (Benchmark, messages #3)
--- Score : 312930 msgs/S, 625860 ctxswc/S --- Score : 312931 msgs/S, 625862 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch) --- Test Case 11.4 (Benchmark, context switch)
@ -120,7 +120,7 @@ Settings: SYSCLK=120
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only) --- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 369919 threads/S --- Score : 369918 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
@ -136,11 +136,11 @@ Settings: SYSCLK=120
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset) --- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 1309916 timers/S --- Score : 1309908 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal) --- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 1762552 wait+signal/S --- Score : 1762548 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock) --- Test Case 11.12 (Benchmark, mutexes lock/unlock)

2
os/ports/GCC/PPC/SPC564Axx/core.s
View File

@ -208,7 +208,7 @@ _ramcode:
.type _coreinit, @function .type _coreinit, @function
_coreinit: _coreinit:
/* /*
* Invalidating all TLBs except one. * Invalidating all TLBs except TLB1.
*/ */
lis %r3, 0 lis %r3, 0
mtspr 625, %r3 /* MAS1 */ mtspr 625, %r3 /* MAS1 */

93
os/ports/GCC/PPC/SPC56ELxx/core.s
View File

@ -127,7 +127,7 @@
#define TLB1_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(1)) #define TLB1_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(1))
#define TLB1_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_128K) #define TLB1_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_128K)
#define TLB1_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE | MAS2_I) #define TLB1_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE)
#define TLB1_MAS3 (MAS3_RPN(0x40000000) | \ #define TLB1_MAS3 (MAS3_RPN(0x40000000) | \
MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \ MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
MAS3_UR | MAS3_SR) MAS3_UR | MAS3_SR)
@ -213,6 +213,59 @@ _ramcode:
.globl _coreinit .globl _coreinit
.type _coreinit, @function .type _coreinit, @function
_coreinit: _coreinit:
/*
* Invalidating all TLBs except TLB0.
*/
lis %r3, 0
mtspr 625, %r3 /* MAS1 */
mtspr 626, %r3 /* MAS2 */
mtspr 627, %r3 /* MAS3 */
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
/* /*
* TLB1 allocated to internal RAM. * TLB1 allocated to internal RAM.
*/ */
@ -293,44 +346,6 @@ _coreinit:
mtspr 627, %r3 /* MAS3 */ mtspr 627, %r3 /* MAS3 */
tlbwe tlbwe
/*
* Invalidating the remaining TLBs (because debuggers).
*/
lis %r3, 0
mtspr 625, %r3 /* MAS1 */
mtspr 626, %r3 /* MAS2 */
mtspr 627, %r3 /* MAS3 */
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
mtspr 624, %r3 /* MAS0 */
tlbwe
/* /*
* RAM clearing, this device requires a write to all RAM location in * RAM clearing, this device requires a write to all RAM location in
* order to initialize the ECC detection hardware, this is going to * order to initialize the ECC detection hardware, this is going to