From 7eb7630d937ea87275bafee866e9fd6aaea61902 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 18 Mar 2008 16:31:24 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@241 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- ports/ARMCM3/chcore.c | 34 +++++++++++++++++++++++++++++----- readme.txt | 7 ++++--- 2 files changed, 33 insertions(+), 8 deletions(-) diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c index 7ef8f8daf..e54d52542 100644 --- a/ports/ARMCM3/chcore.c +++ b/ports/ARMCM3/chcore.c @@ -70,6 +70,32 @@ void threadstart(void) { void *retaddr; +/* + * Software-generated interrupt, it must have the lowest possible priority so + * it is executed last in the interrupts tail-chain. + */ +void PendSVVector(void) { + + chSysLock(); + + if (!chSchRescRequiredI()) { + + chSysUnlock(); + return; + } + + asm volatile ("mrs r0, PSP \n\t" \ + "ldr r1, =retaddr \n\t" \ + "ldr r2, [r0, #18] \n\t" \ + "str r2, [r1] \n\t" \ + "ldr r1, =threadswitch \n\t" \ + "str r1, [r0, #18] "); +} + +/* + * This code is execute in thread mode when exiting from an ISR routine that + * requires rescheduling. + */ __attribute__((naked, weak)) void threadswitch(void) { @@ -78,11 +104,9 @@ void threadswitch(void) { "mrs r0, XPSR \n\t" \ "push {r0} \n\t" \ "ldr r0, =retaddr \n\t" \ - "str r0, [sp, #28] "); - - chSchDoRescheduleI(); - - asm volatile ("pop {r0} \n\t" \ + "str r0, [sp, #28] \n\t" \ + "b chSchDoRescheduleI \n\t" \ + "pop {r0} \n\t" \ "msr XPSR, r0 \n\t" \ "pop {r0-r3, r12, lr} \n\t" \ "cpsie i \n\t" \ diff --git a/readme.txt b/readme.txt index e8c068bab..b748143bc 100644 --- a/readme.txt +++ b/readme.txt @@ -61,9 +61,10 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process, ***************************************************************************** *** 0.6.2 *** -- Fixed a minor problem in the ARM7 port, the structure extctx definition was - missing one field, the effect was to allocate stacks 4 bytes shorter. This - was not a problem in most scenarios. +- Fixed a minor problem in the ARM7 port, the extctx structure definition was + missing one field, the effect was to allocate stacks 4 bytes shorter than + the declared size. +- More work on the ARM-CM3 port but it is still not complete. *** 0.6.1 *** - Removed some redundant checks from the scheduler code: improved threads