git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1335 35acf78f-673a-0410-8e92-d51de3d6d3f4
parent
8b412a5a70
commit
78550c25e5
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@ -57,6 +57,8 @@ LDSCRIPT= ch.ld
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# Imported source files
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CHIBIOS = ../..
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include ${CHIBIOS}/os/hal/hal.mk
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include ${CHIBIOS}/os/hal/platforms/STM32/platform.mk
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include ${CHIBIOS}/os/ports/GCC/ARMCM3/port.mk
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include ${CHIBIOS}/os/kernel/kernel.mk
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include ${CHIBIOS}/test/test.mk
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@ -66,12 +68,10 @@ include ${CHIBIOS}/test/test.mk
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CSRC = ${PORTSRC} \
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${KERNSRC} \
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${TESTSRC} \
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${CHIBIOS}/os/io/pal.c \
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${CHIBIOS}/os/io/serial.c \
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${CHIBIOS}/os/io/platforms/STM32/pal_lld.c \
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${CHIBIOS}/os/io/platforms/STM32/serial_lld.c \
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${CHIBIOS}/os/io/platforms/STM32/stm32_dma.c \
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${HALSRC} \
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${PLATFORMSRC} \
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${CHIBIOS}/os/various/evtimer.c \
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${CHIBIOS}/os/various/syscalls.c \
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board.c main.c
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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@ -102,9 +102,7 @@ TCPPSRC =
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ASMSRC = $(PORTASM) \
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${CHIBIOS}/os/ports/GCC/ARMCM3/STM32F103/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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${CHIBIOS}/os/io \
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${CHIBIOS}/os/io/platforms/STM32 \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) $(HALINC) $(PLATFORMINC) \
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${CHIBIOS}/os/various
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#
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@ -17,32 +17,8 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <ch.h>
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#include <pal.h>
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#include <serial.h>
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#include <nvic.h>
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#include "board.h"
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#define AIRCR_VECTKEY 0x05FA0000
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/*
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* Digital I/O ports static configuration as defined in @p board.h.
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*/
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static const STM32GPIOConfig pal_config =
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{
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{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
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{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
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{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
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{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
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#if !defined(STM32F10X_LD)
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{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
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#endif
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#if defined(STM32F10X_HD)
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{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
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{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
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#endif
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};
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#include "ch.h"
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#include "hal.h"
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/*
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* Early initialization code.
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@ -51,39 +27,7 @@ static const STM32GPIOConfig pal_config =
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*/
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void hwinit0(void) {
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/*
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* Clocks and PLL initialization.
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*/
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// HSI setup.
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RCC->CR = RCC_CR_HSITRIM_RESET_BITS | RCC_CR_HSION;
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while (!(RCC->CR & RCC_CR_HSIRDY))
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; // Waits until HSI stable, it should already be.
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// HSE setup.
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RCC->CR |= RCC_CR_HSEON;
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while (!(RCC->CR & RCC_CR_HSERDY))
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; // Waits until HSE stable.
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// PLL setup.
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RCC->CFGR = RCC_CFGR_PLLSRC_HSE_BITS | PLLPREBITS | PLLMULBITS;
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RCC->CR |= RCC_CR_PLLON;
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while (!(RCC->CR & RCC_CR_PLLRDY))
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; // Waits until PLL stable.
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// Clock sources.
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RCC->CFGR |= RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE1_DIV2 |
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RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV8 |
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RCC_CFGR_MCO_NOCLOCK | USBPREBITS;
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/*
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* Flash setup and final clock selection.
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*/
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FLASH->ACR = FLASHBITS; // Flash wait states depending on clock.
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RCC->CFGR |= RCC_CFGR_SW_PLL; // Switches on the PLL clock.
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while ((RCC->CFGR & RCC_CFGR_SW) != RCC_CFGR_SW_PLL)
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;
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/*
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* I/O ports initialization as specified in board.h.
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*/
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palInit(&pal_config);
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stm32_clock_init();
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}
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/*
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@ -95,24 +39,13 @@ void hwinit1(void) {
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/*
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* NVIC/SCB initialization.
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* Note: PRIGROUP 4:0 (4:4).
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*/
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SCB->AIRCR = AIRCR_VECTKEY | SCB_AIRCR_PRIGROUP_0 | SCB_AIRCR_PRIGROUP_1;
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NVICSetSystemHandlerPriority(HANDLER_SVCALL, PRIORITY_SVCALL);
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NVICSetSystemHandlerPriority(HANDLER_SYSTICK, PRIORITY_SYSTICK);
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NVICSetSystemHandlerPriority(HANDLER_PENDSV, PRIORITY_PENDSV);
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stm32_nvic_init();
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/*
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* SysTick initialization.
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* HAL initialization.
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*/
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SysTick->LOAD = SYSCLK / (8000000 / CH_FREQUENCY) - 1;
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SysTick->VAL = 0;
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SysTick->CTRL = SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT;
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/*
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* Other subsystems initialization.
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*/
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sdInit();
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halInit();
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/*
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* ChibiOS/RT initialization.
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@ -0,0 +1,88 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file templates/halconf.h
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* @brief HAL configuration header.
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* @addtogroup HAL
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* @{
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*/
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#ifndef _HALCONF_H_
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#define _HALCONF_H_
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/**
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* @brief Enables the PAL subsystem.
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*/
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#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
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#define CH_HAL_USE_PAL TRUE
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#endif
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/**
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* @brief Enables the ADC subsystem.
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*/
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#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
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#define CH_HAL_USE_ADC FALSE
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#endif
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/**
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* @brief Enables the CAN subsystem.
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*/
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#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
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#define CH_HAL_USE_CAN FALSE
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#endif
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/**
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* @brief Enables the MAC subsystem.
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*/
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#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
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#define CH_HAL_USE_MAC FALSE
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#endif
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/**
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* @brief Enables the MII subsystem.
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*/
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#if !defined(CH_HAL_USE_MII) || defined(__DOXYGEN__)
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#define CH_HAL_USE_MII FALSE
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#endif
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/**
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* @brief Enables the SERIAL subsystem.
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*/
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#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
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#define CH_HAL_USE_SERIAL TRUE
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#endif
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/**
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* @brief Enables the SPI subsystem.
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*/
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#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
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#define CH_HAL_USE_SPI FALSE
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#endif
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/**
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* @brief Enables the MMC_SPI subsystem.
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*/
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#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
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#define CH_HAL_USE_MMC_SPI FALSE
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#endif
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#endif /* _HALCONF_H_ */
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/** @} */
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@ -17,13 +17,9 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <ch.h>
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#include <pal.h>
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#include <serial.h>
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#include <spi.h>
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#include <test.h>
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#include "board.h"
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#include "ch.h"
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#include "hal.h"
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#include "test.h"
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/*
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* Red LEDs blinker thread, times are in milliseconds.
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