Fixed bug 3602150.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5096 35acf78f-673a-0410-8e92-d51de3d6d3f4master
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757d877e02
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75a75a7ddc
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@ -528,6 +528,60 @@
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* @api
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*/
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#define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
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/**
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* @brief Enables the CRC peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableCRC(lp) rccEnableAHB(RCC_AHBENR_CRCEN, lp)
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/**
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* @brief Disables the CRC peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp)
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/**
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* @brief Resets the CRC peripheral.
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*
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* @api
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*/
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#define rccResetCRC() rccResetAHB(RCC_AHBRSTR_CRCRST)
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/**
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* @brief Enables the WWDG peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp)
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/**
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* @brief Disables the WWDG peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableWWDG(lp) rccDisableAPB1(RCC_APB1ENR_WWDGEN, lp)
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/**
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* @brief Resets the WWDG peripheral.
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*
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* @api
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*/
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#define rccResetWWDG() rccResetAPB1(RCC_APB1RSTR_WWDGRST)
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/** @} */
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/*===========================================================================*/
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@ -82,6 +82,8 @@
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*****************************************************************************
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*** 2.5.2 ***
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- FIX: Fixed STM32F0 RCC enable/disable/reset functions for CRC and WWDG
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(bug 3602150).
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- FIX: Fixed missing parenthesis in use of macro arguments (bug 3601638).
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- FIX: Fixed compile errors in Posix-GCC demo (bug 3601621)(backported
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to 2.4.4).
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