git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7756 35acf78f-673a-0410-8e92-d51de3d6d3f4
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file crt0_v6m.s
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* @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS.
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*
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* @addtogroup ARMCMx_GCC_STARTUP
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* @{
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*/
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/*===========================================================================*/
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/* Module constants. */
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/*===========================================================================*/
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#if !defined(FALSE) || defined(__DOXYGEN__)
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#define FALSE 0
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#endif
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#if !defined(TRUE) || defined(__DOXYGEN__)
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#define TRUE 1
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#endif
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#define CONTROL_MODE_PRIVILEGED 0
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#define CONTROL_MODE_UNPRIVILEGED 1
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#define CONTROL_USE_MSP 0
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#define CONTROL_USE_PSP 2
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/*===========================================================================*/
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief Control special register initialization value.
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* @details The system is setup to run in privileged mode using the PSP
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* stack (dual stack mode).
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*/
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#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__)
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#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \
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CONTROL_MODE_PRIVILEGED)
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#endif
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/**
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* @brief Stack segments initialization switch.
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*/
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#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
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#define CRT0_STACKS_FILL_PATTERN 0x55555555
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#endif
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/**
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* @brief Stack segments initialization switch.
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*/
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#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
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#define CRT0_INIT_STACKS TRUE
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#endif
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/**
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* @brief DATA segment initialization switch.
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*/
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#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
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#define CRT0_INIT_DATA TRUE
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#endif
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/**
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* @brief BSS segment initialization switch.
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*/
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#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
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#define CRT0_INIT_BSS TRUE
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#endif
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/**
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* @brief Constructors invocation switch.
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*/
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#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
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#define CRT0_CALL_CONSTRUCTORS TRUE
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#endif
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/**
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* @brief Destructors invocation switch.
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*/
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#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
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#define CRT0_CALL_DESTRUCTORS TRUE
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#endif
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/*===========================================================================*/
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/* Code section. */
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/*===========================================================================*/
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#if !defined(__DOXYGEN__)
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.cpu cortex-m0
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.fpu softvfp
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.thumb
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.text
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/*
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* Reset handler.
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*/
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.thumb_func
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.global Reset_Handler
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.weak Reset_Handler
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Reset_Handler:
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/* Interrupts are globally masked initially.*/
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cpsid i
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/* PSP stack pointers initialization.*/
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ldr r0, =__process_stack_end__
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msr PSP, r0
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/* CPU mode initialization as configured.*/
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movs r0, #CRT0_CONTROL_INIT
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msr CONTROL, r0
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isb
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/* Early initialization..*/
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bl __early_init
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#if CRT0_INIT_STACKS == TRUE
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ldr r0, =CRT0_STACKS_FILL_PATTERN
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/* Main Stack initialization. Note, it assumes that the
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stack size is a multiple of 4 so the linker file must
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ensure this.*/
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ldr r1, =__main_stack_base__
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ldr r2, =__main_stack_end__
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msloop:
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cmp r1, r2
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bge endmsloop
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str r0, [r1]
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add r1, r1, #4
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b msloop
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endmsloop:
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/* Process Stack initialization. Note, it assumes that the
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stack size is a multiple of 4 so the linker file must
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ensure this.*/
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ldr r1, =__process_stack_base__
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ldr r2, =__process_stack_end__
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psloop:
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cmp r1, r2
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bge endpsloop
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str r0, [r1]
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add r1, r1, #4
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b psloop
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endpsloop:
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#endif
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#if CRT0_INIT_DATA == TRUE
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/* Data initialization. Note, it assumes that the DATA size
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is a multiple of 4 so the linker file must ensure this.*/
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ldr r1, =_textdata
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ldr r2, =_data
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ldr r3, =_edata
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dloop:
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cmp r2, r3
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bge enddloop
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ldr r0, [r1]
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str r0, [r2]
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add r1, r1, #4
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add r2, r2, #4
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b dloop
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enddloop:
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#endif
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#if CRT0_INIT_BSS == TRUE
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/* BSS initialization. Note, it assumes that the DATA size
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is a multiple of 4 so the linker file must ensure this.*/
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movs r0, #0
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ldr r1, =_bss_start
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ldr r2, =_bss_end
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bloop:
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cmp r1, r2
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bge endbloop
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str r0, [r1]
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add r1, r1, #4
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b bloop
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endbloop:
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#endif
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/* Late initialization..*/
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bl __late_init
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#if CRT0_CALL_CONSTRUCTORS == TRUE
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/* Constructors invocation.*/
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ldr r4, =__init_array_start
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ldr r5, =__init_array_end
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initloop:
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cmp r4, r5
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bge endinitloop
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ldr r1, [r4]
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blx r1
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add r4, r4, #4
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b initloop
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endinitloop:
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#endif
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/* Main program invocation, r0 contains the returned value.*/
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bl main
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#if CRT0_CALL_CONSTRUCTORS == TRUE
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/* Destructors invocation.*/
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ldr r4, =__fini_array_start
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ldr r5, =__fini_array_end
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finiloop:
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cmp r4, r5
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bge endfiniloop
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ldr r1, [r4]
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blx r1
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add r4, r4, #4
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b finiloop
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endfiniloop:
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#endif
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/* Branching to the defined exit handler.*/
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b __default_exit
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/*--------------------------------------------------------------------------*
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* Default main exit code, the system is halted.
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* It is a weak symbol, the application code can redefine the behavior.
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* R0 contains the value returned by the main function.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.weak __default_exit
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__default_exit:
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cpsid i
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.loop: b .loop
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/*--------------------------------------------------------------------------*
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* Default early initialization code. It is declared weak in order to be
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* replaced by the real initialization code.
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* The early initialization is performed just after stacks setup RAM areas
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* initialization.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.weak __early_init
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__early_init:
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bx lr
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/*--------------------------------------------------------------------------*
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* Default late initialization code. It is declared weak in order to be
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* replaced by the real initialization code.
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* The late initialization is performed just after RAM areas initialization
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* and before invoking the static constructors.
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*--------------------------------------------------------------------------*/
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.thumb_func
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.weak __late_init
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__late_init:
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bx lr
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#endif
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/** @} */
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@ -0,0 +1,144 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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---
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes ChibiOS/RT, without being obliged to provide
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the source code for any proprietary components. See the file exception.txt
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for full details of how and when the exception can be applied.
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*/
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/**
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* @file crt0_v7m.s
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* @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS.
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*
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* @addtogroup ARMCMx_GCC_STARTUP
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* @{
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*/
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#if !defined(FALSE) || defined(__DOXYGEN__)
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#define FALSE 0
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#endif
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#if !defined(TRUE) || defined(__DOXYGEN__)
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#define TRUE 1
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#endif
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#if !defined(__DOXYGEN__)
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.set CONTROL_MODE_PRIVILEGED, 0
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.set CONTROL_MODE_UNPRIVILEGED, 1
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.set CONTROL_USE_MSP, 0
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.set CONTROL_USE_PSP, 2
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.cpu cortex-m0
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.fpu softvfp
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.thumb
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.text
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/*
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* Reset handler.
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*/
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.thumb_func
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.global ResetHandler
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.weak ResetHandler
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ResetHandler:
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/*
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* Interrupts are globally masked initially.
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*/
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cpsid i
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/*
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* Stack pointers initialization.
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*/
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ldr r0, =__ram_end__
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ldr r1, =__main_stack_size__
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subs r0, r0, r1
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/*
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* Note that r0 is the main stack low boundary address and process
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* stack initial top address.
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*/
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msr PSP, r0
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/*
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* Early initialization phase, it is empty by default.
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*/
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bl __early_init
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/*
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* Data initialization.
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* NOTE: It assumes that the DATA size is a multiple of 4.
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*/
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ldr r1, =_textdata
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ldr r2, =_data
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ldr r3, =_edata
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dloop:
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cmp r2, r3
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ittt lo
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ldrlo r0, [r1], #4
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strlo r0, [r2], #4
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blo dloop
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/*
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* BSS initialization.
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* NOTE: It assumes that the BSS size is a multiple of 4.
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*/
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movs r0, #0
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ldr r1, =_bss_start
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ldr r2, =_bss_end
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bloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo bloop
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/*
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* Switches to the Process Stack and uses a barrier just to be safe.
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*/
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movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
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msr CONTROL, r0
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isb
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/*
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* Main program invocation.
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*/
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bl main
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b _main_exit_handler
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/*
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* Default main exit code, just a loop.
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* It is a weak symbol, the application code can redefine the behavior.
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*/
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.thumb_func
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.global _main_exit_handler
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.weak _main_exit_handler
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_main_exit_handler:
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.loop: b .loop
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/*
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* Default early initialization code. It is declared weak in order to be
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* replaced by the real initialization code.
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* The arly initialization is performed just after stacks setup and before BSS
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* and DATA segments initialization.
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*/
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.thumb_func
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.global __early_init
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.weak __early_init
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__early_init:
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bx lr
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#endif
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/** @} */
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